1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx2 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL 3# TODO: add tests for additional configuration after the legalization supported 4--- | 5 define void @test_sub_v32i8() { 6 %ret = sub <32 x i8> undef, undef 7 ret void 8 } 9 10 define void @test_sub_v16i16() { 11 %ret = sub <16 x i16> undef, undef 12 ret void 13 } 14 15 define void @test_sub_v8i32() { 16 %ret = sub <8 x i32> undef, undef 17 ret void 18 } 19 20 define void @test_sub_v4i64() { 21 %ret = sub <4 x i64> undef, undef 22 ret void 23 } 24 25... 26--- 27name: test_sub_v32i8 28alignment: 16 29legalized: false 30regBankSelected: false 31registers: 32 - { id: 0, class: _ } 33 - { id: 1, class: _ } 34 - { id: 2, class: _ } 35body: | 36 bb.1 (%ir-block.0): 37 liveins: $ymm0, $ymm1 38 39 ; ALL-LABEL: name: test_sub_v32i8 40 ; ALL: [[DEF:%[0-9]+]]:_(<32 x s8>) = IMPLICIT_DEF 41 ; ALL: [[DEF1:%[0-9]+]]:_(<32 x s8>) = IMPLICIT_DEF 42 ; ALL: [[SUB:%[0-9]+]]:_(<32 x s8>) = G_SUB [[DEF]], [[DEF1]] 43 ; ALL: $ymm0 = COPY [[SUB]](<32 x s8>) 44 ; ALL: RET 0 45 %0(<32 x s8>) = IMPLICIT_DEF 46 %1(<32 x s8>) = IMPLICIT_DEF 47 %2(<32 x s8>) = G_SUB %0, %1 48 $ymm0 = COPY %2 49 RET 0 50 51... 52--- 53name: test_sub_v16i16 54alignment: 16 55legalized: false 56regBankSelected: false 57registers: 58 - { id: 0, class: _ } 59 - { id: 1, class: _ } 60 - { id: 2, class: _ } 61body: | 62 bb.1 (%ir-block.0): 63 liveins: $ymm0, $ymm1 64 65 ; ALL-LABEL: name: test_sub_v16i16 66 ; ALL: [[DEF:%[0-9]+]]:_(<16 x s16>) = IMPLICIT_DEF 67 ; ALL: [[DEF1:%[0-9]+]]:_(<16 x s16>) = IMPLICIT_DEF 68 ; ALL: [[SUB:%[0-9]+]]:_(<16 x s16>) = G_SUB [[DEF]], [[DEF1]] 69 ; ALL: $ymm0 = COPY [[SUB]](<16 x s16>) 70 ; ALL: RET 0 71 %0(<16 x s16>) = IMPLICIT_DEF 72 %1(<16 x s16>) = IMPLICIT_DEF 73 %2(<16 x s16>) = G_SUB %0, %1 74 $ymm0 = COPY %2 75 RET 0 76 77... 78--- 79name: test_sub_v8i32 80alignment: 16 81legalized: false 82regBankSelected: false 83registers: 84 - { id: 0, class: _ } 85 - { id: 1, class: _ } 86 - { id: 2, class: _ } 87body: | 88 bb.1 (%ir-block.0): 89 liveins: $ymm0, $ymm1 90 91 ; ALL-LABEL: name: test_sub_v8i32 92 ; ALL: [[DEF:%[0-9]+]]:_(<8 x s32>) = IMPLICIT_DEF 93 ; ALL: [[DEF1:%[0-9]+]]:_(<8 x s32>) = IMPLICIT_DEF 94 ; ALL: [[SUB:%[0-9]+]]:_(<8 x s32>) = G_SUB [[DEF]], [[DEF1]] 95 ; ALL: $ymm0 = COPY [[SUB]](<8 x s32>) 96 ; ALL: RET 0 97 %0(<8 x s32>) = IMPLICIT_DEF 98 %1(<8 x s32>) = IMPLICIT_DEF 99 %2(<8 x s32>) = G_SUB %0, %1 100 $ymm0 = COPY %2 101 RET 0 102 103... 104--- 105name: test_sub_v4i64 106alignment: 16 107legalized: false 108regBankSelected: false 109registers: 110 - { id: 0, class: _ } 111 - { id: 1, class: _ } 112 - { id: 2, class: _ } 113body: | 114 bb.1 (%ir-block.0): 115 liveins: $ymm0, $ymm1 116 117 ; ALL-LABEL: name: test_sub_v4i64 118 ; ALL: [[DEF:%[0-9]+]]:_(<4 x s64>) = IMPLICIT_DEF 119 ; ALL: [[DEF1:%[0-9]+]]:_(<4 x s64>) = IMPLICIT_DEF 120 ; ALL: [[SUB:%[0-9]+]]:_(<4 x s64>) = G_SUB [[DEF]], [[DEF1]] 121 ; ALL: $ymm0 = COPY [[SUB]](<4 x s64>) 122 ; ALL: RET 0 123 %0(<4 x s64>) = IMPLICIT_DEF 124 %1(<4 x s64>) = IMPLICIT_DEF 125 %2(<4 x s64>) = G_SUB %0, %1 126 $ymm0 = COPY %2 127 RET 0 128 129... 130