1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 3--- | 4 5 define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) { 6 %res = ashr i64 %arg1, %arg2 7 ret i64 %res 8 } 9 10 define i64 @test_ashr_i64_imm(i64 %arg1) { 11 %res = ashr i64 %arg1, 5 12 ret i64 %res 13 } 14 15 define i64 @test_ashr_i64_imm1(i64 %arg1) { 16 %res = ashr i64 %arg1, 1 17 ret i64 %res 18 } 19 20 define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) { 21 %res = ashr i32 %arg1, %arg2 22 ret i32 %res 23 } 24 25 define i32 @test_ashr_i32_imm(i32 %arg1) { 26 %res = ashr i32 %arg1, 5 27 ret i32 %res 28 } 29 30 define i32 @test_ashr_i32_imm1(i32 %arg1) { 31 %res = ashr i32 %arg1, 1 32 ret i32 %res 33 } 34 35 define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) { 36 %a = trunc i32 %arg1 to i16 37 %a2 = trunc i32 %arg2 to i16 38 %res = ashr i16 %a, %a2 39 ret i16 %res 40 } 41 42 define i16 @test_ashr_i16_imm(i32 %arg1) { 43 %a = trunc i32 %arg1 to i16 44 %res = ashr i16 %a, 5 45 ret i16 %res 46 } 47 48 define i16 @test_ashr_i16_imm1(i32 %arg1) { 49 %a = trunc i32 %arg1 to i16 50 %res = ashr i16 %a, 1 51 ret i16 %res 52 } 53 54 define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) { 55 %a = trunc i32 %arg1 to i8 56 %a2 = trunc i32 %arg2 to i8 57 %res = ashr i8 %a, %a2 58 ret i8 %res 59 } 60 61 define i8 @test_ashr_i8_imm(i32 %arg1) { 62 %a = trunc i32 %arg1 to i8 63 %res = ashr i8 %a, 5 64 ret i8 %res 65 } 66 67 define i8 @test_ashr_i8_imm1(i32 %arg1) { 68 %a = trunc i32 %arg1 to i8 69 %res = ashr i8 %a, 1 70 ret i8 %res 71 } 72... 73--- 74name: test_ashr_i64 75alignment: 16 76legalized: true 77regBankSelected: true 78tracksRegLiveness: true 79registers: 80 - { id: 0, class: gpr, preferred-register: '' } 81 - { id: 1, class: gpr, preferred-register: '' } 82 - { id: 2, class: gpr, preferred-register: '' } 83 - { id: 3, class: gpr, preferred-register: '' } 84liveins: 85fixedStack: 86stack: 87constants: 88body: | 89 bb.1 (%ir-block.0): 90 liveins: $rdi, $rsi 91 92 ; ALL-LABEL: name: test_ashr_i64 93 ; ALL: liveins: $rdi, $rsi 94 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 95 ; ALL: [[COPY1:%[0-9]+]]:gr64_with_sub_8bit = COPY $rsi 96 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 97 ; ALL: $cl = COPY [[COPY2]] 98 ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl 99 ; ALL: $rax = COPY [[SAR64rCL]] 100 ; ALL: RET 0, implicit $rax 101 %0(s64) = COPY $rdi 102 %1(s64) = COPY $rsi 103 %2(s8) = G_TRUNC %1 104 %3(s64) = G_ASHR %0, %2 105 $rax = COPY %3(s64) 106 RET 0, implicit $rax 107 108... 109--- 110name: test_ashr_i64_imm 111alignment: 16 112legalized: true 113regBankSelected: true 114tracksRegLiveness: true 115registers: 116 - { id: 0, class: gpr, preferred-register: '' } 117 - { id: 1, class: gpr, preferred-register: '' } 118 - { id: 2, class: gpr, preferred-register: '' } 119liveins: 120fixedStack: 121stack: 122constants: 123body: | 124 bb.1 (%ir-block.0): 125 liveins: $rdi 126 127 ; ALL-LABEL: name: test_ashr_i64_imm 128 ; ALL: liveins: $rdi 129 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 130 ; ALL: [[SAR64ri:%[0-9]+]]:gr64 = SAR64ri [[COPY]], 5, implicit-def $eflags 131 ; ALL: $rax = COPY [[SAR64ri]] 132 ; ALL: RET 0, implicit $rax 133 %0(s64) = COPY $rdi 134 %1(s8) = G_CONSTANT i8 5 135 %2(s64) = G_ASHR %0, %1 136 $rax = COPY %2(s64) 137 RET 0, implicit $rax 138 139... 140--- 141name: test_ashr_i64_imm1 142alignment: 16 143legalized: true 144regBankSelected: true 145tracksRegLiveness: true 146registers: 147 - { id: 0, class: gpr, preferred-register: '' } 148 - { id: 1, class: gpr, preferred-register: '' } 149 - { id: 2, class: gpr, preferred-register: '' } 150liveins: 151fixedStack: 152stack: 153constants: 154body: | 155 bb.1 (%ir-block.0): 156 liveins: $rdi 157 158 ; ALL-LABEL: name: test_ashr_i64_imm1 159 ; ALL: liveins: $rdi 160 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 161 ; ALL: [[SAR64r1_:%[0-9]+]]:gr64 = SAR64r1 [[COPY]], implicit-def $eflags 162 ; ALL: $rax = COPY [[SAR64r1_]] 163 ; ALL: RET 0, implicit $rax 164 %0(s64) = COPY $rdi 165 %1(s8) = G_CONSTANT i8 1 166 %2(s64) = G_ASHR %0, %1 167 $rax = COPY %2(s64) 168 RET 0, implicit $rax 169 170... 171--- 172name: test_ashr_i32 173alignment: 16 174legalized: true 175regBankSelected: true 176tracksRegLiveness: true 177registers: 178 - { id: 0, class: gpr, preferred-register: '' } 179 - { id: 1, class: gpr, preferred-register: '' } 180 - { id: 2, class: gpr, preferred-register: '' } 181 - { id: 3, class: gpr, preferred-register: '' } 182liveins: 183fixedStack: 184stack: 185constants: 186body: | 187 bb.1 (%ir-block.0): 188 liveins: $edi, $esi 189 190 ; ALL-LABEL: name: test_ashr_i32 191 ; ALL: liveins: $edi, $esi 192 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 193 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 194 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 195 ; ALL: $cl = COPY [[COPY2]] 196 ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl 197 ; ALL: $eax = COPY [[SAR32rCL]] 198 ; ALL: RET 0, implicit $eax 199 %0(s32) = COPY $edi 200 %1(s32) = COPY $esi 201 %2(s8) = G_TRUNC %1 202 %3(s32) = G_ASHR %0, %2 203 $eax = COPY %3(s32) 204 RET 0, implicit $eax 205 206... 207--- 208name: test_ashr_i32_imm 209alignment: 16 210legalized: true 211regBankSelected: true 212tracksRegLiveness: true 213registers: 214 - { id: 0, class: gpr, preferred-register: '' } 215 - { id: 1, class: gpr, preferred-register: '' } 216 - { id: 2, class: gpr, preferred-register: '' } 217liveins: 218fixedStack: 219stack: 220constants: 221body: | 222 bb.1 (%ir-block.0): 223 liveins: $edi 224 225 ; ALL-LABEL: name: test_ashr_i32_imm 226 ; ALL: liveins: $edi 227 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 228 ; ALL: [[SAR32ri:%[0-9]+]]:gr32 = SAR32ri [[COPY]], 5, implicit-def $eflags 229 ; ALL: $eax = COPY [[SAR32ri]] 230 ; ALL: RET 0, implicit $eax 231 %0(s32) = COPY $edi 232 %1(s8) = G_CONSTANT i8 5 233 %2(s32) = G_ASHR %0, %1 234 $eax = COPY %2(s32) 235 RET 0, implicit $eax 236 237... 238--- 239name: test_ashr_i32_imm1 240alignment: 16 241legalized: true 242regBankSelected: true 243tracksRegLiveness: true 244registers: 245 - { id: 0, class: gpr, preferred-register: '' } 246 - { id: 1, class: gpr, preferred-register: '' } 247 - { id: 2, class: gpr, preferred-register: '' } 248liveins: 249fixedStack: 250stack: 251constants: 252body: | 253 bb.1 (%ir-block.0): 254 liveins: $edi 255 256 ; ALL-LABEL: name: test_ashr_i32_imm1 257 ; ALL: liveins: $edi 258 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 259 ; ALL: [[SAR32r1_:%[0-9]+]]:gr32 = SAR32r1 [[COPY]], implicit-def $eflags 260 ; ALL: $eax = COPY [[SAR32r1_]] 261 ; ALL: RET 0, implicit $eax 262 %0(s32) = COPY $edi 263 %1(s8) = G_CONSTANT i8 1 264 %2(s32) = G_ASHR %0, %1 265 $eax = COPY %2(s32) 266 RET 0, implicit $eax 267 268... 269--- 270name: test_ashr_i16 271alignment: 16 272legalized: true 273regBankSelected: true 274tracksRegLiveness: true 275registers: 276 - { id: 0, class: gpr, preferred-register: '' } 277 - { id: 1, class: gpr, preferred-register: '' } 278 - { id: 2, class: gpr, preferred-register: '' } 279 - { id: 3, class: gpr, preferred-register: '' } 280 - { id: 4, class: gpr, preferred-register: '' } 281liveins: 282fixedStack: 283stack: 284constants: 285body: | 286 bb.1 (%ir-block.0): 287 liveins: $edi, $esi 288 289 ; ALL-LABEL: name: test_ashr_i16 290 ; ALL: liveins: $edi, $esi 291 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 292 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 293 ; ALL: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 294 ; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 295 ; ALL: $cl = COPY [[COPY3]] 296 ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY2]], implicit-def $eflags, implicit $cl 297 ; ALL: $ax = COPY [[SAR16rCL]] 298 ; ALL: RET 0, implicit $ax 299 %0(s32) = COPY $edi 300 %1(s32) = COPY $esi 301 %2(s16) = G_TRUNC %0(s32) 302 %3(s8) = G_TRUNC %1(s32) 303 %4(s16) = G_ASHR %2, %3 304 $ax = COPY %4(s16) 305 RET 0, implicit $ax 306 307... 308--- 309name: test_ashr_i16_imm 310alignment: 16 311legalized: true 312regBankSelected: true 313tracksRegLiveness: true 314registers: 315 - { id: 0, class: gpr, preferred-register: '' } 316 - { id: 1, class: gpr, preferred-register: '' } 317 - { id: 2, class: gpr, preferred-register: '' } 318 - { id: 3, class: gpr, preferred-register: '' } 319liveins: 320fixedStack: 321stack: 322constants: 323body: | 324 bb.1 (%ir-block.0): 325 liveins: $edi 326 327 ; ALL-LABEL: name: test_ashr_i16_imm 328 ; ALL: liveins: $edi 329 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 330 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 331 ; ALL: [[SAR16ri:%[0-9]+]]:gr16 = SAR16ri [[COPY1]], 5, implicit-def $eflags 332 ; ALL: $ax = COPY [[SAR16ri]] 333 ; ALL: RET 0, implicit $ax 334 %0(s32) = COPY $edi 335 %2(s8) = G_CONSTANT i8 5 336 %1(s16) = G_TRUNC %0(s32) 337 %3(s16) = G_ASHR %1, %2 338 $ax = COPY %3(s16) 339 RET 0, implicit $ax 340 341... 342--- 343name: test_ashr_i16_imm1 344alignment: 16 345legalized: true 346regBankSelected: true 347tracksRegLiveness: true 348registers: 349 - { id: 0, class: gpr, preferred-register: '' } 350 - { id: 1, class: gpr, preferred-register: '' } 351 - { id: 2, class: gpr, preferred-register: '' } 352 - { id: 3, class: gpr, preferred-register: '' } 353liveins: 354fixedStack: 355stack: 356constants: 357body: | 358 bb.1 (%ir-block.0): 359 liveins: $edi 360 361 ; ALL-LABEL: name: test_ashr_i16_imm1 362 ; ALL: liveins: $edi 363 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 364 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 365 ; ALL: [[SAR16r1_:%[0-9]+]]:gr16 = SAR16r1 [[COPY1]], implicit-def $eflags 366 ; ALL: $ax = COPY [[SAR16r1_]] 367 ; ALL: RET 0, implicit $ax 368 %0(s32) = COPY $edi 369 %2(s8) = G_CONSTANT i8 1 370 %1(s16) = G_TRUNC %0(s32) 371 %3(s16) = G_ASHR %1, %2 372 $ax = COPY %3(s16) 373 RET 0, implicit $ax 374 375... 376--- 377name: test_ashr_i8 378alignment: 16 379legalized: true 380regBankSelected: true 381tracksRegLiveness: true 382registers: 383 - { id: 0, class: gpr, preferred-register: '' } 384 - { id: 1, class: gpr, preferred-register: '' } 385 - { id: 2, class: gpr, preferred-register: '' } 386 - { id: 3, class: gpr, preferred-register: '' } 387 - { id: 4, class: gpr, preferred-register: '' } 388liveins: 389fixedStack: 390stack: 391constants: 392body: | 393 bb.1 (%ir-block.0): 394 liveins: $edi, $esi 395 396 ; ALL-LABEL: name: test_ashr_i8 397 ; ALL: liveins: $edi, $esi 398 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 399 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 400 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 401 ; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 402 ; ALL: $cl = COPY [[COPY3]] 403 ; ALL: [[SAR8rCL:%[0-9]+]]:gr8 = SAR8rCL [[COPY2]], implicit-def $eflags, implicit $cl 404 ; ALL: $al = COPY [[SAR8rCL]] 405 ; ALL: RET 0, implicit $al 406 %0(s32) = COPY $edi 407 %1(s32) = COPY $esi 408 %2(s8) = G_TRUNC %0(s32) 409 %3(s8) = G_TRUNC %1(s32) 410 %4(s8) = G_ASHR %2, %3 411 $al = COPY %4(s8) 412 RET 0, implicit $al 413 414... 415--- 416name: test_ashr_i8_imm 417alignment: 16 418legalized: true 419regBankSelected: true 420tracksRegLiveness: true 421registers: 422 - { id: 0, class: gpr, preferred-register: '' } 423 - { id: 1, class: gpr, preferred-register: '' } 424 - { id: 2, class: gpr, preferred-register: '' } 425 - { id: 3, class: gpr, preferred-register: '' } 426liveins: 427fixedStack: 428stack: 429constants: 430body: | 431 bb.1 (%ir-block.0): 432 liveins: $edi 433 434 ; ALL-LABEL: name: test_ashr_i8_imm 435 ; ALL: liveins: $edi 436 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 437 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 438 ; ALL: [[SAR8ri:%[0-9]+]]:gr8 = SAR8ri [[COPY1]], 5, implicit-def $eflags 439 ; ALL: $al = COPY [[SAR8ri]] 440 ; ALL: RET 0, implicit $al 441 %0(s32) = COPY $edi 442 %2(s8) = G_CONSTANT i8 5 443 %1(s8) = G_TRUNC %0(s32) 444 %3(s8) = G_ASHR %1, %2 445 $al = COPY %3(s8) 446 RET 0, implicit $al 447 448... 449--- 450name: test_ashr_i8_imm1 451alignment: 16 452legalized: true 453regBankSelected: true 454tracksRegLiveness: true 455registers: 456 - { id: 0, class: gpr, preferred-register: '' } 457 - { id: 1, class: gpr, preferred-register: '' } 458 - { id: 2, class: gpr, preferred-register: '' } 459 - { id: 3, class: gpr, preferred-register: '' } 460liveins: 461fixedStack: 462stack: 463constants: 464body: | 465 bb.1 (%ir-block.0): 466 liveins: $edi 467 468 ; ALL-LABEL: name: test_ashr_i8_imm1 469 ; ALL: liveins: $edi 470 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 471 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 472 ; ALL: [[SAR8r1_:%[0-9]+]]:gr8 = SAR8r1 [[COPY1]], implicit-def $eflags 473 ; ALL: $al = COPY [[SAR8r1_]] 474 ; ALL: RET 0, implicit $al 475 %0(s32) = COPY $edi 476 %2(s8) = G_CONSTANT i8 1 477 %1(s8) = G_TRUNC %0(s32) 478 %3(s8) = G_ASHR %1, %2 479 $al = COPY %3(s8) 480 RET 0, implicit $al 481 482... 483