1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 3--- | 4 5 define i64 @test_shl_i64(i64 %arg1, i64 %arg2) { 6 %res = shl i64 %arg1, %arg2 7 ret i64 %res 8 } 9 10 define i64 @test_shl_i64_imm(i64 %arg1) { 11 %res = shl i64 %arg1, 5 12 ret i64 %res 13 } 14 15 define i64 @test_shl_i64_imm1(i64 %arg1) { 16 %res = shl i64 %arg1, 1 17 ret i64 %res 18 } 19 20 define i32 @test_shl_i32(i32 %arg1, i32 %arg2) { 21 %res = shl i32 %arg1, %arg2 22 ret i32 %res 23 } 24 25 define i32 @test_shl_i32_imm(i32 %arg1) { 26 %res = shl i32 %arg1, 5 27 ret i32 %res 28 } 29 30 define i32 @test_shl_i32_imm1(i32 %arg1) { 31 %res = shl i32 %arg1, 1 32 ret i32 %res 33 } 34 35 define i16 @test_shl_i16(i32 %arg1, i32 %arg2) { 36 %a = trunc i32 %arg1 to i16 37 %a2 = trunc i32 %arg2 to i16 38 %res = shl i16 %a, %a2 39 ret i16 %res 40 } 41 42 define i16 @test_shl_i16_imm(i32 %arg1) { 43 %a = trunc i32 %arg1 to i16 44 %res = shl i16 %a, 5 45 ret i16 %res 46 } 47 48 define i16 @test_shl_i16_imm1(i32 %arg1) { 49 %a = trunc i32 %arg1 to i16 50 %res = shl i16 %a, 1 51 ret i16 %res 52 } 53 54 define i8 @test_shl_i8(i32 %arg1, i32 %arg2) { 55 %a = trunc i32 %arg1 to i8 56 %a2 = trunc i32 %arg2 to i8 57 %res = shl i8 %a, %a2 58 ret i8 %res 59 } 60 61 define i8 @test_shl_i8_imm(i32 %arg1) { 62 %a = trunc i32 %arg1 to i8 63 %res = shl i8 %a, 5 64 ret i8 %res 65 } 66 67 define i8 @test_shl_i8_imm1(i32 %arg1) { 68 %a = trunc i32 %arg1 to i8 69 %res = shl i8 %a, 1 70 ret i8 %res 71 } 72 73... 74--- 75name: test_shl_i64 76alignment: 16 77legalized: true 78regBankSelected: true 79tracksRegLiveness: true 80registers: 81 - { id: 0, class: gpr, preferred-register: '' } 82 - { id: 1, class: gpr, preferred-register: '' } 83 - { id: 2, class: gpr, preferred-register: '' } 84 - { id: 3, class: gpr, preferred-register: '' } 85liveins: 86fixedStack: 87stack: 88constants: 89body: | 90 bb.1 (%ir-block.0): 91 liveins: $rdi, $rsi 92 93 ; ALL-LABEL: name: test_shl_i64 94 ; ALL: liveins: $rdi, $rsi 95 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 96 ; ALL: [[COPY1:%[0-9]+]]:gr64_with_sub_8bit = COPY $rsi 97 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 98 ; ALL: $cl = COPY [[COPY2]] 99 ; ALL: [[SHL64rCL:%[0-9]+]]:gr64 = SHL64rCL [[COPY]], implicit-def $eflags, implicit $cl 100 ; ALL: $rax = COPY [[SHL64rCL]] 101 ; ALL: RET 0, implicit $rax 102 %0(s64) = COPY $rdi 103 %1(s64) = COPY $rsi 104 %2(s8) = G_TRUNC %1 105 %3(s64) = G_SHL %0, %2 106 $rax = COPY %3(s64) 107 RET 0, implicit $rax 108 109... 110--- 111name: test_shl_i64_imm 112alignment: 16 113legalized: true 114regBankSelected: true 115tracksRegLiveness: true 116registers: 117 - { id: 0, class: gpr, preferred-register: '' } 118 - { id: 1, class: gpr, preferred-register: '' } 119 - { id: 2, class: gpr, preferred-register: '' } 120liveins: 121fixedStack: 122stack: 123constants: 124body: | 125 bb.1 (%ir-block.0): 126 liveins: $rdi 127 128 ; ALL-LABEL: name: test_shl_i64_imm 129 ; ALL: liveins: $rdi 130 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 131 ; ALL: [[SHL64ri:%[0-9]+]]:gr64 = SHL64ri [[COPY]], 5, implicit-def $eflags 132 ; ALL: $rax = COPY [[SHL64ri]] 133 ; ALL: RET 0, implicit $rax 134 %0(s64) = COPY $rdi 135 %1(s8) = G_CONSTANT i8 5 136 %2(s64) = G_SHL %0, %1 137 $rax = COPY %2(s64) 138 RET 0, implicit $rax 139 140... 141--- 142name: test_shl_i64_imm1 143alignment: 16 144legalized: true 145regBankSelected: true 146tracksRegLiveness: true 147registers: 148 - { id: 0, class: gpr, preferred-register: '' } 149 - { id: 1, class: gpr, preferred-register: '' } 150 - { id: 2, class: gpr, preferred-register: '' } 151liveins: 152fixedStack: 153stack: 154constants: 155body: | 156 bb.1 (%ir-block.0): 157 liveins: $rdi 158 159 ; ALL-LABEL: name: test_shl_i64_imm1 160 ; ALL: liveins: $rdi 161 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 162 ; ALL: [[ADD64rr:%[0-9]+]]:gr64 = ADD64rr [[COPY]], [[COPY]], implicit-def $eflags 163 ; ALL: $rax = COPY [[ADD64rr]] 164 ; ALL: RET 0, implicit $rax 165 %0(s64) = COPY $rdi 166 %1(s8) = G_CONSTANT i8 1 167 %2(s64) = G_SHL %0, %1 168 $rax = COPY %2(s64) 169 RET 0, implicit $rax 170 171... 172--- 173name: test_shl_i32 174alignment: 16 175legalized: true 176regBankSelected: true 177tracksRegLiveness: true 178registers: 179 - { id: 0, class: gpr, preferred-register: '' } 180 - { id: 1, class: gpr, preferred-register: '' } 181 - { id: 2, class: gpr, preferred-register: '' } 182 - { id: 3, class: gpr, preferred-register: '' } 183liveins: 184fixedStack: 185stack: 186constants: 187body: | 188 bb.1 (%ir-block.0): 189 liveins: $edi, $esi 190 191 ; ALL-LABEL: name: test_shl_i32 192 ; ALL: liveins: $edi, $esi 193 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 194 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 195 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 196 ; ALL: $cl = COPY [[COPY2]] 197 ; ALL: [[SHL32rCL:%[0-9]+]]:gr32 = SHL32rCL [[COPY]], implicit-def $eflags, implicit $cl 198 ; ALL: $eax = COPY [[SHL32rCL]] 199 ; ALL: RET 0, implicit $eax 200 %0(s32) = COPY $edi 201 %1(s32) = COPY $esi 202 %2(s8) = G_TRUNC %1 203 %3(s32) = G_SHL %0, %2 204 $eax = COPY %3(s32) 205 RET 0, implicit $eax 206 207... 208--- 209name: test_shl_i32_imm 210alignment: 16 211legalized: true 212regBankSelected: true 213tracksRegLiveness: true 214registers: 215 - { id: 0, class: gpr, preferred-register: '' } 216 - { id: 1, class: gpr, preferred-register: '' } 217 - { id: 2, class: gpr, preferred-register: '' } 218liveins: 219fixedStack: 220stack: 221constants: 222body: | 223 bb.1 (%ir-block.0): 224 liveins: $edi 225 226 ; ALL-LABEL: name: test_shl_i32_imm 227 ; ALL: liveins: $edi 228 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 229 ; ALL: [[SHL32ri:%[0-9]+]]:gr32 = SHL32ri [[COPY]], 5, implicit-def $eflags 230 ; ALL: $eax = COPY [[SHL32ri]] 231 ; ALL: RET 0, implicit $eax 232 %0(s32) = COPY $edi 233 %1(s8) = G_CONSTANT i8 5 234 %2(s32) = G_SHL %0, %1 235 $eax = COPY %2(s32) 236 RET 0, implicit $eax 237 238... 239--- 240name: test_shl_i32_imm1 241alignment: 16 242legalized: true 243regBankSelected: true 244tracksRegLiveness: true 245registers: 246 - { id: 0, class: gpr, preferred-register: '' } 247 - { id: 1, class: gpr, preferred-register: '' } 248 - { id: 2, class: gpr, preferred-register: '' } 249liveins: 250fixedStack: 251stack: 252constants: 253body: | 254 bb.1 (%ir-block.0): 255 liveins: $edi 256 257 ; ALL-LABEL: name: test_shl_i32_imm1 258 ; ALL: liveins: $edi 259 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 260 ; ALL: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[COPY]], [[COPY]], implicit-def $eflags 261 ; ALL: $eax = COPY [[ADD32rr]] 262 ; ALL: RET 0, implicit $eax 263 %0(s32) = COPY $edi 264 %1(s8) = G_CONSTANT i8 1 265 %2(s32) = G_SHL %0, %1 266 $eax = COPY %2(s32) 267 RET 0, implicit $eax 268 269... 270--- 271name: test_shl_i16 272alignment: 16 273legalized: true 274regBankSelected: true 275tracksRegLiveness: true 276registers: 277 - { id: 0, class: gpr, preferred-register: '' } 278 - { id: 1, class: gpr, preferred-register: '' } 279 - { id: 2, class: gpr, preferred-register: '' } 280 - { id: 3, class: gpr, preferred-register: '' } 281 - { id: 4, class: gpr, preferred-register: '' } 282liveins: 283fixedStack: 284stack: 285constants: 286body: | 287 bb.1 (%ir-block.0): 288 liveins: $edi, $esi 289 290 ; ALL-LABEL: name: test_shl_i16 291 ; ALL: liveins: $edi, $esi 292 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 293 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 294 ; ALL: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 295 ; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 296 ; ALL: $cl = COPY [[COPY3]] 297 ; ALL: [[SHL16rCL:%[0-9]+]]:gr16 = SHL16rCL [[COPY2]], implicit-def $eflags, implicit $cl 298 ; ALL: $ax = COPY [[SHL16rCL]] 299 ; ALL: RET 0, implicit $ax 300 %0(s32) = COPY $edi 301 %1(s32) = COPY $esi 302 %2(s16) = G_TRUNC %0(s32) 303 %3(s8) = G_TRUNC %1(s32) 304 %4(s16) = G_SHL %2, %3 305 $ax = COPY %4(s16) 306 RET 0, implicit $ax 307 308... 309--- 310name: test_shl_i16_imm 311alignment: 16 312legalized: true 313regBankSelected: true 314tracksRegLiveness: true 315registers: 316 - { id: 0, class: gpr, preferred-register: '' } 317 - { id: 1, class: gpr, preferred-register: '' } 318 - { id: 2, class: gpr, preferred-register: '' } 319 - { id: 3, class: gpr, preferred-register: '' } 320liveins: 321fixedStack: 322stack: 323constants: 324body: | 325 bb.1 (%ir-block.0): 326 liveins: $edi 327 328 ; ALL-LABEL: name: test_shl_i16_imm 329 ; ALL: liveins: $edi 330 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 331 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 332 ; ALL: [[SHL16ri:%[0-9]+]]:gr16 = SHL16ri [[COPY1]], 5, implicit-def $eflags 333 ; ALL: $ax = COPY [[SHL16ri]] 334 ; ALL: RET 0, implicit $ax 335 %0(s32) = COPY $edi 336 %2(s8) = G_CONSTANT i8 5 337 %1(s16) = G_TRUNC %0(s32) 338 %3(s16) = G_SHL %1, %2 339 $ax = COPY %3(s16) 340 RET 0, implicit $ax 341 342... 343--- 344name: test_shl_i16_imm1 345alignment: 16 346legalized: true 347regBankSelected: true 348tracksRegLiveness: true 349registers: 350 - { id: 0, class: gpr, preferred-register: '' } 351 - { id: 1, class: gpr, preferred-register: '' } 352 - { id: 2, class: gpr, preferred-register: '' } 353 - { id: 3, class: gpr, preferred-register: '' } 354liveins: 355fixedStack: 356stack: 357constants: 358body: | 359 bb.1 (%ir-block.0): 360 liveins: $edi 361 362 ; ALL-LABEL: name: test_shl_i16_imm1 363 ; ALL: liveins: $edi 364 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 365 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 366 ; ALL: [[ADD16rr:%[0-9]+]]:gr16 = ADD16rr [[COPY1]], [[COPY1]], implicit-def $eflags 367 ; ALL: $ax = COPY [[ADD16rr]] 368 ; ALL: RET 0, implicit $ax 369 %0(s32) = COPY $edi 370 %2(s8) = G_CONSTANT i8 1 371 %1(s16) = G_TRUNC %0(s32) 372 %3(s16) = G_SHL %1, %2 373 $ax = COPY %3(s16) 374 RET 0, implicit $ax 375 376... 377--- 378name: test_shl_i8 379alignment: 16 380legalized: true 381regBankSelected: true 382tracksRegLiveness: true 383registers: 384 - { id: 0, class: gpr, preferred-register: '' } 385 - { id: 1, class: gpr, preferred-register: '' } 386 - { id: 2, class: gpr, preferred-register: '' } 387 - { id: 3, class: gpr, preferred-register: '' } 388 - { id: 4, class: gpr, preferred-register: '' } 389liveins: 390fixedStack: 391stack: 392constants: 393body: | 394 bb.1 (%ir-block.0): 395 liveins: $edi, $esi 396 397 ; ALL-LABEL: name: test_shl_i8 398 ; ALL: liveins: $edi, $esi 399 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 400 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 401 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 402 ; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 403 ; ALL: $cl = COPY [[COPY3]] 404 ; ALL: [[SHL8rCL:%[0-9]+]]:gr8 = SHL8rCL [[COPY2]], implicit-def $eflags, implicit $cl 405 ; ALL: $al = COPY [[SHL8rCL]] 406 ; ALL: RET 0, implicit $al 407 %0(s32) = COPY $edi 408 %1(s32) = COPY $esi 409 %2(s8) = G_TRUNC %0(s32) 410 %3(s8) = G_TRUNC %1(s32) 411 %4(s8) = G_SHL %2, %3 412 $al = COPY %4(s8) 413 RET 0, implicit $al 414 415... 416--- 417name: test_shl_i8_imm 418alignment: 16 419legalized: true 420regBankSelected: true 421tracksRegLiveness: true 422registers: 423 - { id: 0, class: gpr, preferred-register: '' } 424 - { id: 1, class: gpr, preferred-register: '' } 425 - { id: 2, class: gpr, preferred-register: '' } 426 - { id: 3, class: gpr, preferred-register: '' } 427liveins: 428fixedStack: 429stack: 430constants: 431body: | 432 bb.1 (%ir-block.0): 433 liveins: $edi 434 435 ; ALL-LABEL: name: test_shl_i8_imm 436 ; ALL: liveins: $edi 437 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 438 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 439 ; ALL: [[SHL8ri:%[0-9]+]]:gr8 = SHL8ri [[COPY1]], 5, implicit-def $eflags 440 ; ALL: $al = COPY [[SHL8ri]] 441 ; ALL: RET 0, implicit $al 442 %0(s32) = COPY $edi 443 %2(s8) = G_CONSTANT i8 5 444 %1(s8) = G_TRUNC %0(s32) 445 %3(s8) = G_SHL %1, %2 446 $al = COPY %3(s8) 447 RET 0, implicit $al 448 449... 450--- 451name: test_shl_i8_imm1 452alignment: 16 453legalized: true 454regBankSelected: true 455tracksRegLiveness: true 456registers: 457 - { id: 0, class: gpr, preferred-register: '' } 458 - { id: 1, class: gpr, preferred-register: '' } 459 - { id: 2, class: gpr, preferred-register: '' } 460 - { id: 3, class: gpr, preferred-register: '' } 461liveins: 462fixedStack: 463stack: 464constants: 465body: | 466 bb.1 (%ir-block.0): 467 liveins: $edi 468 469 ; ALL-LABEL: name: test_shl_i8_imm1 470 ; ALL: liveins: $edi 471 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 472 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 473 ; ALL: [[ADD8rr:%[0-9]+]]:gr8 = ADD8rr [[COPY1]], [[COPY1]], implicit-def $eflags 474 ; ALL: $al = COPY [[ADD8rr]] 475 ; ALL: RET 0, implicit $al 476 %0(s32) = COPY $edi 477 %2(s8) = G_CONSTANT i8 1 478 %1(s8) = G_TRUNC %0(s32) 479 %3(s8) = G_SHL %1, %2 480 $al = COPY %3(s8) 481 RET 0, implicit $al 482 483... 484