1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX 3 4define <16 x i8> @test_sub_v16i8(<16 x i8> %arg1, <16 x i8> %arg2) { 5; SKX-LABEL: test_sub_v16i8: 6; SKX: # %bb.0: 7; SKX-NEXT: vpsubb %xmm1, %xmm0, %xmm0 8; SKX-NEXT: retq 9 %ret = sub <16 x i8> %arg1, %arg2 10 ret <16 x i8> %ret 11} 12 13define <8 x i16> @test_sub_v8i16(<8 x i16> %arg1, <8 x i16> %arg2) { 14; SKX-LABEL: test_sub_v8i16: 15; SKX: # %bb.0: 16; SKX-NEXT: vpsubw %xmm1, %xmm0, %xmm0 17; SKX-NEXT: retq 18 %ret = sub <8 x i16> %arg1, %arg2 19 ret <8 x i16> %ret 20} 21 22define <4 x i32> @test_sub_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) { 23; SKX-LABEL: test_sub_v4i32: 24; SKX: # %bb.0: 25; SKX-NEXT: vpsubd %xmm1, %xmm0, %xmm0 26; SKX-NEXT: retq 27 %ret = sub <4 x i32> %arg1, %arg2 28 ret <4 x i32> %ret 29} 30 31define <2 x i64> @test_sub_v2i64(<2 x i64> %arg1, <2 x i64> %arg2) { 32; SKX-LABEL: test_sub_v2i64: 33; SKX: # %bb.0: 34; SKX-NEXT: vpsubq %xmm1, %xmm0, %xmm0 35; SKX-NEXT: retq 36 %ret = sub <2 x i64> %arg1, %arg2 37 ret <2 x i64> %ret 38} 39 40define <32 x i8> @test_sub_v32i8(<32 x i8> %arg1, <32 x i8> %arg2) { 41; SKX-LABEL: test_sub_v32i8: 42; SKX: # %bb.0: 43; SKX-NEXT: vpsubb %ymm1, %ymm0, %ymm0 44; SKX-NEXT: retq 45 %ret = sub <32 x i8> %arg1, %arg2 46 ret <32 x i8> %ret 47} 48 49define <16 x i16> @test_sub_v16i16(<16 x i16> %arg1, <16 x i16> %arg2) { 50; SKX-LABEL: test_sub_v16i16: 51; SKX: # %bb.0: 52; SKX-NEXT: vpsubw %ymm1, %ymm0, %ymm0 53; SKX-NEXT: retq 54 %ret = sub <16 x i16> %arg1, %arg2 55 ret <16 x i16> %ret 56} 57 58define <8 x i32> @test_sub_v8i32(<8 x i32> %arg1, <8 x i32> %arg2) { 59; SKX-LABEL: test_sub_v8i32: 60; SKX: # %bb.0: 61; SKX-NEXT: vpsubd %ymm1, %ymm0, %ymm0 62; SKX-NEXT: retq 63 %ret = sub <8 x i32> %arg1, %arg2 64 ret <8 x i32> %ret 65} 66 67define <4 x i64> @test_sub_v4i64(<4 x i64> %arg1, <4 x i64> %arg2) { 68; SKX-LABEL: test_sub_v4i64: 69; SKX: # %bb.0: 70; SKX-NEXT: vpsubq %ymm1, %ymm0, %ymm0 71; SKX-NEXT: retq 72 %ret = sub <4 x i64> %arg1, %arg2 73 ret <4 x i64> %ret 74} 75 76define <64 x i8> @test_sub_v64i8(<64 x i8> %arg1, <64 x i8> %arg2) { 77; SKX-LABEL: test_sub_v64i8: 78; SKX: # %bb.0: 79; SKX-NEXT: vpsubb %zmm1, %zmm0, %zmm0 80; SKX-NEXT: retq 81 %ret = sub <64 x i8> %arg1, %arg2 82 ret <64 x i8> %ret 83} 84 85define <32 x i16> @test_sub_v32i16(<32 x i16> %arg1, <32 x i16> %arg2) { 86; SKX-LABEL: test_sub_v32i16: 87; SKX: # %bb.0: 88; SKX-NEXT: vpsubw %zmm1, %zmm0, %zmm0 89; SKX-NEXT: retq 90 %ret = sub <32 x i16> %arg1, %arg2 91 ret <32 x i16> %ret 92} 93 94define <16 x i32> @test_sub_v16i32(<16 x i32> %arg1, <16 x i32> %arg2) { 95; SKX-LABEL: test_sub_v16i32: 96; SKX: # %bb.0: 97; SKX-NEXT: vpsubd %zmm1, %zmm0, %zmm0 98; SKX-NEXT: retq 99 %ret = sub <16 x i32> %arg1, %arg2 100 ret <16 x i32> %ret 101} 102 103define <8 x i64> @test_sub_v8i64(<8 x i64> %arg1, <8 x i64> %arg2) { 104; SKX-LABEL: test_sub_v8i64: 105; SKX: # %bb.0: 106; SKX-NEXT: vpsubq %zmm1, %zmm0, %zmm0 107; SKX-NEXT: retq 108 %ret = sub <8 x i64> %arg1, %arg2 109 ret <8 x i64> %ret 110} 111 112