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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=CHECK,X86
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=CHECK,X64
4
5; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512dq-builtins.c
6
7define zeroext i8 @test_mm512_mask_fpclass_pd_mask(i8 zeroext %__U, <8 x double> %__A) {
8; X86-LABEL: test_mm512_mask_fpclass_pd_mask:
9; X86:       # %bb.0: # %entry
10; X86-NEXT:    vfpclasspd $4, %zmm0, %k0
11; X86-NEXT:    kmovw %k0, %eax
12; X86-NEXT:    andb {{[0-9]+}}(%esp), %al
13; X86-NEXT:    # kill: def $al killed $al killed $eax
14; X86-NEXT:    vzeroupper
15; X86-NEXT:    retl
16;
17; X64-LABEL: test_mm512_mask_fpclass_pd_mask:
18; X64:       # %bb.0: # %entry
19; X64-NEXT:    vfpclasspd $4, %zmm0, %k0
20; X64-NEXT:    kmovw %k0, %eax
21; X64-NEXT:    andb %dil, %al
22; X64-NEXT:    # kill: def $al killed $al killed $eax
23; X64-NEXT:    vzeroupper
24; X64-NEXT:    retq
25entry:
26  %0 = tail call <8 x i1> @llvm.x86.avx512.fpclass.pd.512(<8 x double> %__A, i32 4)
27  %1 = bitcast i8 %__U to <8 x i1>
28  %2 = and <8 x i1> %0, %1
29  %3 = bitcast <8 x i1> %2 to i8
30  ret i8 %3
31}
32
33declare <8 x i1> @llvm.x86.avx512.fpclass.pd.512(<8 x double>, i32)
34
35define zeroext i8 @test_mm512_fpclass_pd_mask(<8 x double> %__A) {
36; CHECK-LABEL: test_mm512_fpclass_pd_mask:
37; CHECK:       # %bb.0: # %entry
38; CHECK-NEXT:    vfpclasspd $4, %zmm0, %k0
39; CHECK-NEXT:    kmovw %k0, %eax
40; CHECK-NEXT:    # kill: def $al killed $al killed $eax
41; CHECK-NEXT:    vzeroupper
42; CHECK-NEXT:    ret{{[l|q]}}
43entry:
44  %0 = tail call <8 x i1> @llvm.x86.avx512.fpclass.pd.512(<8 x double> %__A, i32 4)
45  %1 = bitcast <8 x i1> %0 to i8
46  ret i8 %1
47}
48
49define zeroext i16 @test_mm512_mask_fpclass_ps_mask(i16 zeroext %__U, <16 x float> %__A) {
50; X86-LABEL: test_mm512_mask_fpclass_ps_mask:
51; X86:       # %bb.0: # %entry
52; X86-NEXT:    vfpclassps $4, %zmm0, %k0
53; X86-NEXT:    kmovw %k0, %eax
54; X86-NEXT:    andw {{[0-9]+}}(%esp), %ax
55; X86-NEXT:    # kill: def $ax killed $ax killed $eax
56; X86-NEXT:    vzeroupper
57; X86-NEXT:    retl
58;
59; X64-LABEL: test_mm512_mask_fpclass_ps_mask:
60; X64:       # %bb.0: # %entry
61; X64-NEXT:    vfpclassps $4, %zmm0, %k0
62; X64-NEXT:    kmovw %k0, %eax
63; X64-NEXT:    andl %edi, %eax
64; X64-NEXT:    # kill: def $ax killed $ax killed $eax
65; X64-NEXT:    vzeroupper
66; X64-NEXT:    retq
67entry:
68  %0 = tail call <16 x i1> @llvm.x86.avx512.fpclass.ps.512(<16 x float> %__A, i32 4)
69  %1 = bitcast i16 %__U to <16 x i1>
70  %2 = and <16 x i1> %0, %1
71  %3 = bitcast <16 x i1> %2 to i16
72  ret i16 %3
73}
74
75declare <16 x i1> @llvm.x86.avx512.fpclass.ps.512(<16 x float>, i32)
76
77define zeroext i16 @test_mm512_fpclass_ps_mask(<16 x float> %__A) {
78; CHECK-LABEL: test_mm512_fpclass_ps_mask:
79; CHECK:       # %bb.0: # %entry
80; CHECK-NEXT:    vfpclassps $4, %zmm0, %k0
81; CHECK-NEXT:    kmovw %k0, %eax
82; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
83; CHECK-NEXT:    vzeroupper
84; CHECK-NEXT:    ret{{[l|q]}}
85entry:
86  %0 = tail call <16 x i1> @llvm.x86.avx512.fpclass.ps.512(<16 x float> %__A, i32 4)
87  %1 = bitcast <16 x i1> %0 to i16
88  ret i16 %1
89}
90
91define zeroext i8 @test_mm_fpclass_sd_mask(<4 x float> %__A) {
92; CHECK-LABEL: test_mm_fpclass_sd_mask:
93; CHECK:       # %bb.0: # %entry
94; CHECK-NEXT:    vfpclasssd $2, %xmm0, %k0
95; CHECK-NEXT:    kmovw %k0, %eax
96; CHECK-NEXT:    # kill: def $al killed $al killed $eax
97; CHECK-NEXT:    ret{{[l|q]}}
98entry:
99  %0 = bitcast <4 x float> %__A to <2 x double>
100  %1 = tail call i8 @llvm.x86.avx512.mask.fpclass.sd(<2 x double> %0, i32 2, i8 -1)
101  ret i8 %1
102}
103
104declare i8 @llvm.x86.avx512.mask.fpclass.sd(<2 x double>, i32, i8)
105
106define zeroext i8 @test_mm_mask_fpclass_sd_mask(i8 zeroext %__U, <4 x float> %__A) {
107; X86-LABEL: test_mm_mask_fpclass_sd_mask:
108; X86:       # %bb.0: # %entry
109; X86-NEXT:    kmovb {{[0-9]+}}(%esp), %k1
110; X86-NEXT:    vfpclasssd $2, %xmm0, %k0 {%k1}
111; X86-NEXT:    kmovw %k0, %eax
112; X86-NEXT:    # kill: def $al killed $al killed $eax
113; X86-NEXT:    retl
114;
115; X64-LABEL: test_mm_mask_fpclass_sd_mask:
116; X64:       # %bb.0: # %entry
117; X64-NEXT:    kmovw %edi, %k1
118; X64-NEXT:    vfpclasssd $2, %xmm0, %k0 {%k1}
119; X64-NEXT:    kmovw %k0, %eax
120; X64-NEXT:    # kill: def $al killed $al killed $eax
121; X64-NEXT:    retq
122entry:
123  %0 = bitcast <4 x float> %__A to <2 x double>
124  %1 = tail call i8 @llvm.x86.avx512.mask.fpclass.sd(<2 x double> %0, i32 2, i8 %__U)
125  ret i8 %1
126}
127
128define zeroext i8 @test_mm_fpclass_ss_mask(<4 x float> %__A) {
129; CHECK-LABEL: test_mm_fpclass_ss_mask:
130; CHECK:       # %bb.0: # %entry
131; CHECK-NEXT:    vfpclassss $2, %xmm0, %k0
132; CHECK-NEXT:    kmovw %k0, %eax
133; CHECK-NEXT:    # kill: def $al killed $al killed $eax
134; CHECK-NEXT:    ret{{[l|q]}}
135entry:
136  %0 = tail call i8 @llvm.x86.avx512.mask.fpclass.ss(<4 x float> %__A, i32 2, i8 -1)
137  ret i8 %0
138}
139
140declare i8 @llvm.x86.avx512.mask.fpclass.ss(<4 x float>, i32, i8)
141
142define zeroext i8 @test_mm_mask_fpclass_ss_mask(i8 zeroext %__U, <4 x float> %__A) {
143; X86-LABEL: test_mm_mask_fpclass_ss_mask:
144; X86:       # %bb.0: # %entry
145; X86-NEXT:    kmovb {{[0-9]+}}(%esp), %k1
146; X86-NEXT:    vfpclassss $2, %xmm0, %k0 {%k1}
147; X86-NEXT:    kmovw %k0, %eax
148; X86-NEXT:    # kill: def $al killed $al killed $eax
149; X86-NEXT:    retl
150;
151; X64-LABEL: test_mm_mask_fpclass_ss_mask:
152; X64:       # %bb.0: # %entry
153; X64-NEXT:    kmovw %edi, %k1
154; X64-NEXT:    vfpclassss $2, %xmm0, %k0 {%k1}
155; X64-NEXT:    kmovw %k0, %eax
156; X64-NEXT:    # kill: def $al killed $al killed $eax
157; X64-NEXT:    retq
158entry:
159  %0 = tail call i8 @llvm.x86.avx512.mask.fpclass.ss(<4 x float> %__A, i32 2, i8 %__U)
160  ret i8 %0
161}
162