1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-NOSSSE3,CHECK-SSE-X86,CHECK-NOSSSE3-X86 3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-NOSSSE3,CHECK-NOSSSE3-X64 4; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-SSSE3 5; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-AVX,CHECK-AVX2 6 7declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>) 8declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) 9declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) 10 11define <8 x i16> @test1(<8 x i16> %v) { 12; CHECK-NOSSSE3-LABEL: test1: 13; CHECK-NOSSSE3: # %bb.0: # %entry 14; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm1 15; CHECK-NOSSSE3-NEXT: psrlw $8, %xmm1 16; CHECK-NOSSSE3-NEXT: psllw $8, %xmm0 17; CHECK-NOSSSE3-NEXT: por %xmm1, %xmm0 18; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 19; 20; CHECK-SSSE3-LABEL: test1: 21; CHECK-SSSE3: # %bb.0: # %entry 22; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14] 23; CHECK-SSSE3-NEXT: retq 24; 25; CHECK-AVX-LABEL: test1: 26; CHECK-AVX: # %bb.0: # %entry 27; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14] 28; CHECK-AVX-NEXT: retq 29entry: 30 %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v) 31 ret <8 x i16> %r 32} 33 34define <4 x i32> @test2(<4 x i32> %v) { 35; CHECK-NOSSSE3-LABEL: test2: 36; CHECK-NOSSSE3: # %bb.0: 37; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1 38; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2 39; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] 40; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7] 41; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4] 42; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 43; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7] 44; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4] 45; CHECK-NOSSSE3-NEXT: packuswb %xmm2, %xmm0 46; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 47; 48; CHECK-SSSE3-LABEL: test2: 49; CHECK-SSSE3: # %bb.0: 50; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12] 51; CHECK-SSSE3-NEXT: retq 52; 53; CHECK-AVX-LABEL: test2: 54; CHECK-AVX: # %bb.0: 55; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12] 56; CHECK-AVX-NEXT: retq 57 %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v) 58 ret <4 x i32> %r 59} 60 61define <4 x i32> @or_bswap(<4 x i32> %x, <4 x i32> %y, <4 x i32>* %p1, <4 x i32>* %p2) { 62; CHECK-NOSSSE3-LABEL: or_bswap: 63; CHECK-NOSSSE3: # %bb.0: 64; CHECK-NOSSSE3-NEXT: por %xmm1, %xmm0 65; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1 66; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2 67; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] 68; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7] 69; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4] 70; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 71; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7] 72; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4] 73; CHECK-NOSSSE3-NEXT: packuswb %xmm2, %xmm0 74; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 75; 76; CHECK-SSSE3-LABEL: or_bswap: 77; CHECK-SSSE3: # %bb.0: 78; CHECK-SSSE3-NEXT: por %xmm1, %xmm0 79; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12] 80; CHECK-SSSE3-NEXT: retq 81; 82; CHECK-AVX-LABEL: or_bswap: 83; CHECK-AVX: # %bb.0: 84; CHECK-AVX-NEXT: vpor %xmm1, %xmm0, %xmm0 85; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12] 86; CHECK-AVX-NEXT: retq 87 %xt = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %x) 88 %yt = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %y) 89 %r = or <4 x i32> %xt, %yt 90 ret <4 x i32> %r 91} 92 93define <2 x i64> @test3(<2 x i64> %v) { 94; CHECK-NOSSSE3-LABEL: test3: 95; CHECK-NOSSSE3: # %bb.0: # %entry 96; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1 97; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2 98; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] 99; CHECK-NOSSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 100; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7] 101; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4] 102; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 103; CHECK-NOSSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 104; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7] 105; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4] 106; CHECK-NOSSSE3-NEXT: packuswb %xmm2, %xmm0 107; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 108; 109; CHECK-SSSE3-LABEL: test3: 110; CHECK-SSSE3: # %bb.0: # %entry 111; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8] 112; CHECK-SSSE3-NEXT: retq 113; 114; CHECK-AVX-LABEL: test3: 115; CHECK-AVX: # %bb.0: # %entry 116; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8] 117; CHECK-AVX-NEXT: retq 118entry: 119 %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v) 120 ret <2 x i64> %r 121} 122 123declare <16 x i16> @llvm.bswap.v16i16(<16 x i16>) 124declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>) 125declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>) 126 127define <16 x i16> @test4(<16 x i16> %v) { 128; CHECK-NOSSSE3-LABEL: test4: 129; CHECK-NOSSSE3: # %bb.0: # %entry 130; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2 131; CHECK-NOSSSE3-NEXT: psrlw $8, %xmm2 132; CHECK-NOSSSE3-NEXT: psllw $8, %xmm0 133; CHECK-NOSSSE3-NEXT: por %xmm2, %xmm0 134; CHECK-NOSSSE3-NEXT: movdqa %xmm1, %xmm2 135; CHECK-NOSSSE3-NEXT: psrlw $8, %xmm2 136; CHECK-NOSSSE3-NEXT: psllw $8, %xmm1 137; CHECK-NOSSSE3-NEXT: por %xmm2, %xmm1 138; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 139; 140; CHECK-SSSE3-LABEL: test4: 141; CHECK-SSSE3: # %bb.0: # %entry 142; CHECK-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14] 143; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm0 144; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm1 145; CHECK-SSSE3-NEXT: retq 146; 147; CHECK-AVX-LABEL: test4: 148; CHECK-AVX: # %bb.0: # %entry 149; CHECK-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14,17,16,19,18,21,20,23,22,25,24,27,26,29,28,31,30] 150; CHECK-AVX-NEXT: retq 151entry: 152 %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v) 153 ret <16 x i16> %r 154} 155 156define <8 x i32> @test5(<8 x i32> %v) { 157; CHECK-NOSSSE3-LABEL: test5: 158; CHECK-NOSSSE3: # %bb.0: # %entry 159; CHECK-NOSSSE3-NEXT: pxor %xmm2, %xmm2 160; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm3 161; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] 162; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7] 163; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4] 164; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 165; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7] 166; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4] 167; CHECK-NOSSSE3-NEXT: packuswb %xmm3, %xmm0 168; CHECK-NOSSSE3-NEXT: movdqa %xmm1, %xmm3 169; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] 170; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7] 171; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4] 172; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 173; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[3,2,1,0,4,5,6,7] 174; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4] 175; CHECK-NOSSSE3-NEXT: packuswb %xmm3, %xmm1 176; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 177; 178; CHECK-SSSE3-LABEL: test5: 179; CHECK-SSSE3: # %bb.0: # %entry 180; CHECK-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12] 181; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm0 182; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm1 183; CHECK-SSSE3-NEXT: retq 184; 185; CHECK-AVX-LABEL: test5: 186; CHECK-AVX: # %bb.0: # %entry 187; CHECK-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12,19,18,17,16,23,22,21,20,27,26,25,24,31,30,29,28] 188; CHECK-AVX-NEXT: retq 189entry: 190 %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v) 191 ret <8 x i32> %r 192} 193 194define <4 x i64> @test6(<4 x i64> %v) { 195; CHECK-NOSSSE3-LABEL: test6: 196; CHECK-NOSSSE3: # %bb.0: # %entry 197; CHECK-NOSSSE3-NEXT: pxor %xmm2, %xmm2 198; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm3 199; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] 200; CHECK-NOSSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] 201; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7] 202; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4] 203; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 204; CHECK-NOSSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 205; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7] 206; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4] 207; CHECK-NOSSSE3-NEXT: packuswb %xmm3, %xmm0 208; CHECK-NOSSSE3-NEXT: movdqa %xmm1, %xmm3 209; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] 210; CHECK-NOSSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] 211; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7] 212; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4] 213; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 214; CHECK-NOSSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 215; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[3,2,1,0,4,5,6,7] 216; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4] 217; CHECK-NOSSSE3-NEXT: packuswb %xmm3, %xmm1 218; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 219; 220; CHECK-SSSE3-LABEL: test6: 221; CHECK-SSSE3: # %bb.0: # %entry 222; CHECK-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8] 223; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm0 224; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm1 225; CHECK-SSSE3-NEXT: retq 226; 227; CHECK-AVX-LABEL: test6: 228; CHECK-AVX: # %bb.0: # %entry 229; CHECK-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24] 230; CHECK-AVX-NEXT: retq 231entry: 232 %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v) 233 ret <4 x i64> %r 234} 235 236declare <4 x i16> @llvm.bswap.v4i16(<4 x i16>) 237 238define <4 x i16> @test7(<4 x i16> %v) { 239; CHECK-NOSSSE3-LABEL: test7: 240; CHECK-NOSSSE3: # %bb.0: # %entry 241; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm1 242; CHECK-NOSSSE3-NEXT: psrlw $8, %xmm1 243; CHECK-NOSSSE3-NEXT: psllw $8, %xmm0 244; CHECK-NOSSSE3-NEXT: por %xmm1, %xmm0 245; CHECK-NOSSSE3-NEXT: ret{{[l|q]}} 246; 247; CHECK-SSSE3-LABEL: test7: 248; CHECK-SSSE3: # %bb.0: # %entry 249; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14] 250; CHECK-SSSE3-NEXT: retq 251; 252; CHECK-AVX-LABEL: test7: 253; CHECK-AVX: # %bb.0: # %entry 254; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14] 255; CHECK-AVX-NEXT: retq 256entry: 257 %r = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v) 258 ret <4 x i16> %r 259} 260 261; 262; Double BSWAP -> Identity 263; 264 265define <8 x i16> @identity_v8i16(<8 x i16> %v) { 266; CHECK-ALL-LABEL: identity_v8i16: 267; CHECK-ALL: # %bb.0: # %entry 268; CHECK-ALL-NEXT: ret{{[l|q]}} 269entry: 270 %bs1 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v) 271 %bs2 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %bs1) 272 ret <8 x i16> %bs2 273} 274 275define <4 x i32> @identity_v4i32(<4 x i32> %v) { 276; CHECK-ALL-LABEL: identity_v4i32: 277; CHECK-ALL: # %bb.0: # %entry 278; CHECK-ALL-NEXT: ret{{[l|q]}} 279entry: 280 %bs1 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v) 281 %bs2 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %bs1) 282 ret <4 x i32> %bs2 283} 284 285define <2 x i64> @identity_v2i64(<2 x i64> %v) { 286; CHECK-ALL-LABEL: identity_v2i64: 287; CHECK-ALL: # %bb.0: # %entry 288; CHECK-ALL-NEXT: ret{{[l|q]}} 289entry: 290 %bs1 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v) 291 %bs2 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %bs1) 292 ret <2 x i64> %bs2 293} 294 295define <16 x i16> @identity_v16i16(<16 x i16> %v) { 296; CHECK-ALL-LABEL: identity_v16i16: 297; CHECK-ALL: # %bb.0: # %entry 298; CHECK-ALL-NEXT: ret{{[l|q]}} 299entry: 300 %bs1 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v) 301 %bs2 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %bs1) 302 ret <16 x i16> %bs2 303} 304 305define <8 x i32> @identity_v8i32(<8 x i32> %v) { 306; CHECK-ALL-LABEL: identity_v8i32: 307; CHECK-ALL: # %bb.0: # %entry 308; CHECK-ALL-NEXT: ret{{[l|q]}} 309entry: 310 %bs1 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v) 311 %bs2 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %bs1) 312 ret <8 x i32> %bs2 313} 314 315define <4 x i64> @identity_v4i64(<4 x i64> %v) { 316; CHECK-ALL-LABEL: identity_v4i64: 317; CHECK-ALL: # %bb.0: # %entry 318; CHECK-ALL-NEXT: ret{{[l|q]}} 319entry: 320 %bs1 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v) 321 %bs2 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %bs1) 322 ret <4 x i64> %bs2 323} 324 325define <4 x i16> @identity_v4i16(<4 x i16> %v) { 326; CHECK-ALL-LABEL: identity_v4i16: 327; CHECK-ALL: # %bb.0: # %entry 328; CHECK-ALL-NEXT: ret{{[l|q]}} 329entry: 330 %bs1 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v) 331 %bs2 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %bs1) 332 ret <4 x i16> %bs2 333} 334 335; 336; Constant Folding 337; 338 339define <8 x i16> @fold_v8i16() { 340; CHECK-SSE-LABEL: fold_v8i16: 341; CHECK-SSE: # %bb.0: # %entry 342; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536] 343; CHECK-SSE-NEXT: ret{{[l|q]}} 344; 345; CHECK-AVX-LABEL: fold_v8i16: 346; CHECK-AVX: # %bb.0: # %entry 347; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536] 348; CHECK-AVX-NEXT: retq 349entry: 350 %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> <i16 0, i16 1, i16 -1, i16 2, i16 -3, i16 4, i16 -5, i16 6>) 351 ret <8 x i16> %r 352} 353 354define <4 x i32> @fold_v4i32() { 355; CHECK-SSE-LABEL: fold_v4i32: 356; CHECK-SSE: # %bb.0: # %entry 357; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863] 358; CHECK-SSE-NEXT: ret{{[l|q]}} 359; 360; CHECK-AVX-LABEL: fold_v4i32: 361; CHECK-AVX: # %bb.0: # %entry 362; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863] 363; CHECK-AVX-NEXT: retq 364entry: 365 %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> <i32 0, i32 -1, i32 2, i32 -3>) 366 ret <4 x i32> %r 367} 368 369define <2 x i64> @fold_v2i64() { 370; CHECK-SSE-X86-LABEL: fold_v2i64: 371; CHECK-SSE-X86: # %bb.0: # %entry 372; CHECK-SSE-X86-NEXT: movaps {{.*#+}} xmm0 = [0,4278190080,4294967295,4294967295] 373; CHECK-SSE-X86-NEXT: retl 374; 375; CHECK-SSE-X64-LABEL: fold_v2i64: 376; CHECK-SSE-X64: # %bb.0: # %entry 377; CHECK-SSE-X64-NEXT: movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615] 378; CHECK-SSE-X64-NEXT: retq 379; 380; CHECK-AVX-LABEL: fold_v2i64: 381; CHECK-AVX: # %bb.0: # %entry 382; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615] 383; CHECK-AVX-NEXT: retq 384entry: 385 %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> <i64 255, i64 -1>) 386 ret <2 x i64> %r 387} 388 389define <16 x i16> @fold_v16i16() { 390; CHECK-SSE-LABEL: fold_v16i16: 391; CHECK-SSE: # %bb.0: # %entry 392; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536] 393; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [63999,2048,63487,2560,62975,3072,62463,3584] 394; CHECK-SSE-NEXT: ret{{[l|q]}} 395; 396; CHECK-AVX-LABEL: fold_v16i16: 397; CHECK-AVX: # %bb.0: # %entry 398; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,256,65535,512,65023,1024,64511,1536,63999,2048,63487,2560,62975,3072,62463,3584] 399; CHECK-AVX-NEXT: retq 400entry: 401 %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> <i16 0, i16 1, i16 -1, i16 2, i16 -3, i16 4, i16 -5, i16 6, i16 -7, i16 8, i16 -9, i16 10, i16 -11, i16 12, i16 -13, i16 14>) 402 ret <16 x i16> %r 403} 404 405define <8 x i32> @fold_v8i32() { 406; CHECK-SSE-LABEL: fold_v8i32: 407; CHECK-SSE: # %bb.0: # %entry 408; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,16777216,4294967295,33554432] 409; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [4261412863,67108864,4227858431,100663296] 410; CHECK-SSE-NEXT: ret{{[l|q]}} 411; 412; CHECK-AVX-LABEL: fold_v8i32: 413; CHECK-AVX: # %bb.0: # %entry 414; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,16777216,4294967295,33554432,4261412863,67108864,4227858431,100663296] 415; CHECK-AVX-NEXT: retq 416entry: 417 %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> <i32 0, i32 1, i32 -1, i32 2, i32 -3, i32 4, i32 -5, i32 6>) 418 ret <8 x i32> %r 419} 420 421define <4 x i64> @fold_v4i64() { 422; CHECK-SSE-X86-LABEL: fold_v4i64: 423; CHECK-SSE-X86: # %bb.0: # %entry 424; CHECK-SSE-X86-NEXT: movaps {{.*#+}} xmm0 = [0,4278190080,4294967295,4294967295] 425; CHECK-SSE-X86-NEXT: movaps {{.*#+}} xmm1 = [0,4294901760,0,16776960] 426; CHECK-SSE-X86-NEXT: retl 427; 428; CHECK-SSE-X64-LABEL: fold_v4i64: 429; CHECK-SSE-X64: # %bb.0: # %entry 430; CHECK-SSE-X64-NEXT: movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615] 431; CHECK-SSE-X64-NEXT: movaps {{.*#+}} xmm1 = [18446462598732840960,72056494526300160] 432; CHECK-SSE-X64-NEXT: retq 433; 434; CHECK-AVX-LABEL: fold_v4i64: 435; CHECK-AVX: # %bb.0: # %entry 436; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18374686479671623680,18446744073709551615,18446462598732840960,72056494526300160] 437; CHECK-AVX-NEXT: retq 438entry: 439 %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> <i64 255, i64 -1, i64 65535, i64 16776960>) 440 ret <4 x i64> %r 441} 442