1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,SSE-X86,SSE2-X86 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64 4; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X86,SSE-X86,SSE41-X86 5; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X64,SSE-X64,SSE41-X64 6; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,AVX-X86 7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,AVX-X64 8; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse -enable-legalize-types-checking | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64 9; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse -enable-legalize-types-checking | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64 10 11define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind { 12; SSE2-X86-LABEL: extract_i8_0: 13; SSE2-X86: # %bb.0: 14; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 15; SSE2-X86-NEXT: movd %xmm0, %ecx 16; SSE2-X86-NEXT: movb %cl, (%eax) 17; SSE2-X86-NEXT: retl 18; 19; SSE2-X64-LABEL: extract_i8_0: 20; SSE2-X64: # %bb.0: 21; SSE2-X64-NEXT: movd %xmm0, %eax 22; SSE2-X64-NEXT: movb %al, (%rdi) 23; SSE2-X64-NEXT: retq 24; 25; SSE41-X86-LABEL: extract_i8_0: 26; SSE41-X86: # %bb.0: 27; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 28; SSE41-X86-NEXT: pextrb $0, %xmm0, (%eax) 29; SSE41-X86-NEXT: retl 30; 31; SSE41-X64-LABEL: extract_i8_0: 32; SSE41-X64: # %bb.0: 33; SSE41-X64-NEXT: pextrb $0, %xmm0, (%rdi) 34; SSE41-X64-NEXT: retq 35; 36; AVX-X86-LABEL: extract_i8_0: 37; AVX-X86: # %bb.0: 38; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 39; AVX-X86-NEXT: vpextrb $0, %xmm0, (%eax) 40; AVX-X86-NEXT: retl 41; 42; AVX-X64-LABEL: extract_i8_0: 43; AVX-X64: # %bb.0: 44; AVX-X64-NEXT: vpextrb $0, %xmm0, (%rdi) 45; AVX-X64-NEXT: retq 46 %vecext = extractelement <16 x i8> %foo, i32 0 47 store i8 %vecext, i8* %dst, align 1 48 ret void 49} 50 51define void @extract_i8_3(i8* nocapture %dst, <16 x i8> %foo) nounwind { 52; SSE2-X86-LABEL: extract_i8_3: 53; SSE2-X86: # %bb.0: 54; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 55; SSE2-X86-NEXT: movd %xmm0, %ecx 56; SSE2-X86-NEXT: shrl $24, %ecx 57; SSE2-X86-NEXT: movb %cl, (%eax) 58; SSE2-X86-NEXT: retl 59; 60; SSE2-X64-LABEL: extract_i8_3: 61; SSE2-X64: # %bb.0: 62; SSE2-X64-NEXT: movd %xmm0, %eax 63; SSE2-X64-NEXT: shrl $24, %eax 64; SSE2-X64-NEXT: movb %al, (%rdi) 65; SSE2-X64-NEXT: retq 66; 67; SSE41-X86-LABEL: extract_i8_3: 68; SSE41-X86: # %bb.0: 69; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 70; SSE41-X86-NEXT: pextrb $3, %xmm0, (%eax) 71; SSE41-X86-NEXT: retl 72; 73; SSE41-X64-LABEL: extract_i8_3: 74; SSE41-X64: # %bb.0: 75; SSE41-X64-NEXT: pextrb $3, %xmm0, (%rdi) 76; SSE41-X64-NEXT: retq 77; 78; AVX-X86-LABEL: extract_i8_3: 79; AVX-X86: # %bb.0: 80; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 81; AVX-X86-NEXT: vpextrb $3, %xmm0, (%eax) 82; AVX-X86-NEXT: retl 83; 84; AVX-X64-LABEL: extract_i8_3: 85; AVX-X64: # %bb.0: 86; AVX-X64-NEXT: vpextrb $3, %xmm0, (%rdi) 87; AVX-X64-NEXT: retq 88 %vecext = extractelement <16 x i8> %foo, i32 3 89 store i8 %vecext, i8* %dst, align 1 90 ret void 91} 92 93define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) nounwind { 94; SSE2-X86-LABEL: extract_i8_15: 95; SSE2-X86: # %bb.0: 96; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 97; SSE2-X86-NEXT: pextrw $7, %xmm0, %ecx 98; SSE2-X86-NEXT: movb %ch, (%eax) 99; SSE2-X86-NEXT: retl 100; 101; SSE2-X64-LABEL: extract_i8_15: 102; SSE2-X64: # %bb.0: 103; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax 104; SSE2-X64-NEXT: movb %ah, (%rdi) 105; SSE2-X64-NEXT: retq 106; 107; SSE41-X86-LABEL: extract_i8_15: 108; SSE41-X86: # %bb.0: 109; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 110; SSE41-X86-NEXT: pextrb $15, %xmm0, (%eax) 111; SSE41-X86-NEXT: retl 112; 113; SSE41-X64-LABEL: extract_i8_15: 114; SSE41-X64: # %bb.0: 115; SSE41-X64-NEXT: pextrb $15, %xmm0, (%rdi) 116; SSE41-X64-NEXT: retq 117; 118; AVX-X86-LABEL: extract_i8_15: 119; AVX-X86: # %bb.0: 120; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 121; AVX-X86-NEXT: vpextrb $15, %xmm0, (%eax) 122; AVX-X86-NEXT: retl 123; 124; AVX-X64-LABEL: extract_i8_15: 125; AVX-X64: # %bb.0: 126; AVX-X64-NEXT: vpextrb $15, %xmm0, (%rdi) 127; AVX-X64-NEXT: retq 128 %vecext = extractelement <16 x i8> %foo, i32 15 129 store i8 %vecext, i8* %dst, align 1 130 ret void 131} 132 133define void @extract_i16_0(i16* nocapture %dst, <8 x i16> %foo) nounwind { 134; SSE2-X86-LABEL: extract_i16_0: 135; SSE2-X86: # %bb.0: 136; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 137; SSE2-X86-NEXT: movd %xmm0, %ecx 138; SSE2-X86-NEXT: movw %cx, (%eax) 139; SSE2-X86-NEXT: retl 140; 141; SSE2-X64-LABEL: extract_i16_0: 142; SSE2-X64: # %bb.0: 143; SSE2-X64-NEXT: movd %xmm0, %eax 144; SSE2-X64-NEXT: movw %ax, (%rdi) 145; SSE2-X64-NEXT: retq 146; 147; SSE41-X86-LABEL: extract_i16_0: 148; SSE41-X86: # %bb.0: 149; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 150; SSE41-X86-NEXT: pextrw $0, %xmm0, (%eax) 151; SSE41-X86-NEXT: retl 152; 153; SSE41-X64-LABEL: extract_i16_0: 154; SSE41-X64: # %bb.0: 155; SSE41-X64-NEXT: pextrw $0, %xmm0, (%rdi) 156; SSE41-X64-NEXT: retq 157; 158; AVX-X86-LABEL: extract_i16_0: 159; AVX-X86: # %bb.0: 160; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 161; AVX-X86-NEXT: vpextrw $0, %xmm0, (%eax) 162; AVX-X86-NEXT: retl 163; 164; AVX-X64-LABEL: extract_i16_0: 165; AVX-X64: # %bb.0: 166; AVX-X64-NEXT: vpextrw $0, %xmm0, (%rdi) 167; AVX-X64-NEXT: retq 168 %vecext = extractelement <8 x i16> %foo, i32 0 169 store i16 %vecext, i16* %dst, align 1 170 ret void 171} 172 173define void @extract_i16_7(i16* nocapture %dst, <8 x i16> %foo) nounwind { 174; SSE2-X86-LABEL: extract_i16_7: 175; SSE2-X86: # %bb.0: 176; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 177; SSE2-X86-NEXT: pextrw $7, %xmm0, %ecx 178; SSE2-X86-NEXT: movw %cx, (%eax) 179; SSE2-X86-NEXT: retl 180; 181; SSE2-X64-LABEL: extract_i16_7: 182; SSE2-X64: # %bb.0: 183; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax 184; SSE2-X64-NEXT: movw %ax, (%rdi) 185; SSE2-X64-NEXT: retq 186; 187; SSE41-X86-LABEL: extract_i16_7: 188; SSE41-X86: # %bb.0: 189; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 190; SSE41-X86-NEXT: pextrw $7, %xmm0, (%eax) 191; SSE41-X86-NEXT: retl 192; 193; SSE41-X64-LABEL: extract_i16_7: 194; SSE41-X64: # %bb.0: 195; SSE41-X64-NEXT: pextrw $7, %xmm0, (%rdi) 196; SSE41-X64-NEXT: retq 197; 198; AVX-X86-LABEL: extract_i16_7: 199; AVX-X86: # %bb.0: 200; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 201; AVX-X86-NEXT: vpextrw $7, %xmm0, (%eax) 202; AVX-X86-NEXT: retl 203; 204; AVX-X64-LABEL: extract_i16_7: 205; AVX-X64: # %bb.0: 206; AVX-X64-NEXT: vpextrw $7, %xmm0, (%rdi) 207; AVX-X64-NEXT: retq 208 %vecext = extractelement <8 x i16> %foo, i32 7 209 store i16 %vecext, i16* %dst, align 1 210 ret void 211} 212 213define void @extract_i32_0(i32* nocapture %dst, <4 x i32> %foo) nounwind { 214; SSE-X86-LABEL: extract_i32_0: 215; SSE-X86: # %bb.0: 216; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 217; SSE-X86-NEXT: movss %xmm0, (%eax) 218; SSE-X86-NEXT: retl 219; 220; SSE-X64-LABEL: extract_i32_0: 221; SSE-X64: # %bb.0: 222; SSE-X64-NEXT: movss %xmm0, (%rdi) 223; SSE-X64-NEXT: retq 224; 225; AVX-X86-LABEL: extract_i32_0: 226; AVX-X86: # %bb.0: 227; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 228; AVX-X86-NEXT: vmovss %xmm0, (%eax) 229; AVX-X86-NEXT: retl 230; 231; AVX-X64-LABEL: extract_i32_0: 232; AVX-X64: # %bb.0: 233; AVX-X64-NEXT: vmovss %xmm0, (%rdi) 234; AVX-X64-NEXT: retq 235 %vecext = extractelement <4 x i32> %foo, i32 0 236 store i32 %vecext, i32* %dst, align 1 237 ret void 238} 239 240define void @extract_i32_3(i32* nocapture %dst, <4 x i32> %foo) nounwind { 241; SSE2-X86-LABEL: extract_i32_3: 242; SSE2-X86: # %bb.0: 243; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 244; SSE2-X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3] 245; SSE2-X86-NEXT: movd %xmm0, (%eax) 246; SSE2-X86-NEXT: retl 247; 248; SSE2-X64-LABEL: extract_i32_3: 249; SSE2-X64: # %bb.0: 250; SSE2-X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3] 251; SSE2-X64-NEXT: movd %xmm0, (%rdi) 252; SSE2-X64-NEXT: retq 253; 254; SSE41-X86-LABEL: extract_i32_3: 255; SSE41-X86: # %bb.0: 256; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 257; SSE41-X86-NEXT: extractps $3, %xmm0, (%eax) 258; SSE41-X86-NEXT: retl 259; 260; SSE41-X64-LABEL: extract_i32_3: 261; SSE41-X64: # %bb.0: 262; SSE41-X64-NEXT: extractps $3, %xmm0, (%rdi) 263; SSE41-X64-NEXT: retq 264; 265; AVX-X86-LABEL: extract_i32_3: 266; AVX-X86: # %bb.0: 267; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 268; AVX-X86-NEXT: vextractps $3, %xmm0, (%eax) 269; AVX-X86-NEXT: retl 270; 271; AVX-X64-LABEL: extract_i32_3: 272; AVX-X64: # %bb.0: 273; AVX-X64-NEXT: vextractps $3, %xmm0, (%rdi) 274; AVX-X64-NEXT: retq 275 %vecext = extractelement <4 x i32> %foo, i32 3 276 store i32 %vecext, i32* %dst, align 1 277 ret void 278} 279 280define void @extract_i64_0(i64* nocapture %dst, <2 x i64> %foo) nounwind { 281; SSE-X86-LABEL: extract_i64_0: 282; SSE-X86: # %bb.0: 283; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 284; SSE-X86-NEXT: movlps %xmm0, (%eax) 285; SSE-X86-NEXT: retl 286; 287; SSE-X64-LABEL: extract_i64_0: 288; SSE-X64: # %bb.0: 289; SSE-X64-NEXT: movlps %xmm0, (%rdi) 290; SSE-X64-NEXT: retq 291; 292; AVX-X86-LABEL: extract_i64_0: 293; AVX-X86: # %bb.0: 294; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 295; AVX-X86-NEXT: vmovlps %xmm0, (%eax) 296; AVX-X86-NEXT: retl 297; 298; AVX-X64-LABEL: extract_i64_0: 299; AVX-X64: # %bb.0: 300; AVX-X64-NEXT: vmovlps %xmm0, (%rdi) 301; AVX-X64-NEXT: retq 302 %vecext = extractelement <2 x i64> %foo, i32 0 303 store i64 %vecext, i64* %dst, align 1 304 ret void 305} 306 307define void @extract_i64_1(i64* nocapture %dst, <2 x i64> %foo) nounwind { 308; SSE-X86-LABEL: extract_i64_1: 309; SSE-X86: # %bb.0: 310; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 311; SSE-X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3] 312; SSE-X86-NEXT: movq %xmm0, (%eax) 313; SSE-X86-NEXT: retl 314; 315; SSE2-X64-LABEL: extract_i64_1: 316; SSE2-X64: # %bb.0: 317; SSE2-X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3] 318; SSE2-X64-NEXT: movq %xmm0, (%rdi) 319; SSE2-X64-NEXT: retq 320; 321; SSE41-X64-LABEL: extract_i64_1: 322; SSE41-X64: # %bb.0: 323; SSE41-X64-NEXT: pextrq $1, %xmm0, (%rdi) 324; SSE41-X64-NEXT: retq 325; 326; AVX-X86-LABEL: extract_i64_1: 327; AVX-X86: # %bb.0: 328; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 329; AVX-X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,0,1] 330; AVX-X86-NEXT: vmovlps %xmm0, (%eax) 331; AVX-X86-NEXT: retl 332; 333; AVX-X64-LABEL: extract_i64_1: 334; AVX-X64: # %bb.0: 335; AVX-X64-NEXT: vpextrq $1, %xmm0, (%rdi) 336; AVX-X64-NEXT: retq 337 %vecext = extractelement <2 x i64> %foo, i32 1 338 store i64 %vecext, i64* %dst, align 1 339 ret void 340} 341 342define void @extract_f32_0(float* nocapture %dst, <4 x float> %foo) nounwind { 343; SSE-X86-LABEL: extract_f32_0: 344; SSE-X86: # %bb.0: 345; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 346; SSE-X86-NEXT: movss %xmm0, (%eax) 347; SSE-X86-NEXT: retl 348; 349; SSE-X64-LABEL: extract_f32_0: 350; SSE-X64: # %bb.0: 351; SSE-X64-NEXT: movss %xmm0, (%rdi) 352; SSE-X64-NEXT: retq 353; 354; AVX-X86-LABEL: extract_f32_0: 355; AVX-X86: # %bb.0: 356; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 357; AVX-X86-NEXT: vmovss %xmm0, (%eax) 358; AVX-X86-NEXT: retl 359; 360; AVX-X64-LABEL: extract_f32_0: 361; AVX-X64: # %bb.0: 362; AVX-X64-NEXT: vmovss %xmm0, (%rdi) 363; AVX-X64-NEXT: retq 364 %vecext = extractelement <4 x float> %foo, i32 0 365 store float %vecext, float* %dst, align 1 366 ret void 367} 368 369define void @extract_f32_3(float* nocapture %dst, <4 x float> %foo) nounwind { 370; SSE2-X86-LABEL: extract_f32_3: 371; SSE2-X86: # %bb.0: 372; SSE2-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 373; SSE2-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3] 374; SSE2-X86-NEXT: movss %xmm0, (%eax) 375; SSE2-X86-NEXT: retl 376; 377; SSE2-X64-LABEL: extract_f32_3: 378; SSE2-X64: # %bb.0: 379; SSE2-X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3] 380; SSE2-X64-NEXT: movss %xmm0, (%rdi) 381; SSE2-X64-NEXT: retq 382; 383; SSE41-X86-LABEL: extract_f32_3: 384; SSE41-X86: # %bb.0: 385; SSE41-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 386; SSE41-X86-NEXT: extractps $3, %xmm0, (%eax) 387; SSE41-X86-NEXT: retl 388; 389; SSE41-X64-LABEL: extract_f32_3: 390; SSE41-X64: # %bb.0: 391; SSE41-X64-NEXT: extractps $3, %xmm0, (%rdi) 392; SSE41-X64-NEXT: retq 393; 394; AVX-X86-LABEL: extract_f32_3: 395; AVX-X86: # %bb.0: 396; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 397; AVX-X86-NEXT: vextractps $3, %xmm0, (%eax) 398; AVX-X86-NEXT: retl 399; 400; AVX-X64-LABEL: extract_f32_3: 401; AVX-X64: # %bb.0: 402; AVX-X64-NEXT: vextractps $3, %xmm0, (%rdi) 403; AVX-X64-NEXT: retq 404 %vecext = extractelement <4 x float> %foo, i32 3 405 store float %vecext, float* %dst, align 1 406 ret void 407} 408 409define void @extract_f64_0(double* nocapture %dst, <2 x double> %foo) nounwind { 410; SSE-X86-LABEL: extract_f64_0: 411; SSE-X86: # %bb.0: 412; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 413; SSE-X86-NEXT: movlps %xmm0, (%eax) 414; SSE-X86-NEXT: retl 415; 416; SSE-X64-LABEL: extract_f64_0: 417; SSE-X64: # %bb.0: 418; SSE-X64-NEXT: movlps %xmm0, (%rdi) 419; SSE-X64-NEXT: retq 420; 421; AVX-X86-LABEL: extract_f64_0: 422; AVX-X86: # %bb.0: 423; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 424; AVX-X86-NEXT: vmovlps %xmm0, (%eax) 425; AVX-X86-NEXT: retl 426; 427; AVX-X64-LABEL: extract_f64_0: 428; AVX-X64: # %bb.0: 429; AVX-X64-NEXT: vmovlps %xmm0, (%rdi) 430; AVX-X64-NEXT: retq 431 %vecext = extractelement <2 x double> %foo, i32 0 432 store double %vecext, double* %dst, align 1 433 ret void 434} 435 436define void @extract_f64_1(double* nocapture %dst, <2 x double> %foo) nounwind { 437; SSE-X86-LABEL: extract_f64_1: 438; SSE-X86: # %bb.0: 439; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 440; SSE-X86-NEXT: movhps %xmm0, (%eax) 441; SSE-X86-NEXT: retl 442; 443; SSE-X64-LABEL: extract_f64_1: 444; SSE-X64: # %bb.0: 445; SSE-X64-NEXT: movhps %xmm0, (%rdi) 446; SSE-X64-NEXT: retq 447; 448; AVX-X86-LABEL: extract_f64_1: 449; AVX-X86: # %bb.0: 450; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 451; AVX-X86-NEXT: vmovhps %xmm0, (%eax) 452; AVX-X86-NEXT: retl 453; 454; AVX-X64-LABEL: extract_f64_1: 455; AVX-X64: # %bb.0: 456; AVX-X64-NEXT: vmovhps %xmm0, (%rdi) 457; AVX-X64-NEXT: retq 458 %vecext = extractelement <2 x double> %foo, i32 1 459 store double %vecext, double* %dst, align 1 460 ret void 461} 462 463define void @extract_f128_0(fp128* nocapture %dst, <2 x fp128> %foo) nounwind { 464; SSE-X86-LABEL: extract_f128_0: 465; SSE-X86: # %bb.0: 466; SSE-X86-NEXT: pushl %edi 467; SSE-X86-NEXT: pushl %esi 468; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 469; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 470; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %edx 471; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %esi 472; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %edi 473; SSE-X86-NEXT: movl %esi, 12(%edi) 474; SSE-X86-NEXT: movl %edx, 8(%edi) 475; SSE-X86-NEXT: movl %ecx, 4(%edi) 476; SSE-X86-NEXT: movl %eax, (%edi) 477; SSE-X86-NEXT: popl %esi 478; SSE-X86-NEXT: popl %edi 479; SSE-X86-NEXT: retl 480; 481; SSE-X64-LABEL: extract_f128_0: 482; SSE-X64: # %bb.0: 483; SSE-X64-NEXT: movups %xmm0, (%rdi) 484; SSE-X64-NEXT: retq 485; 486; AVX-X86-LABEL: extract_f128_0: 487; AVX-X86: # %bb.0: 488; AVX-X86-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0 489; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 490; AVX-X86-NEXT: vmovups %xmm0, (%eax) 491; AVX-X86-NEXT: retl 492; 493; AVX-X64-LABEL: extract_f128_0: 494; AVX-X64: # %bb.0: 495; AVX-X64-NEXT: vmovups %xmm0, (%rdi) 496; AVX-X64-NEXT: retq 497 %vecext = extractelement <2 x fp128> %foo, i32 0 498 store fp128 %vecext, fp128* %dst, align 1 499 ret void 500} 501 502define void @extract_f128_1(fp128* nocapture %dst, <2 x fp128> %foo) nounwind { 503; SSE-X86-LABEL: extract_f128_1: 504; SSE-X86: # %bb.0: 505; SSE-X86-NEXT: pushl %edi 506; SSE-X86-NEXT: pushl %esi 507; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 508; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 509; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %edx 510; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %esi 511; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %edi 512; SSE-X86-NEXT: movl %esi, 12(%edi) 513; SSE-X86-NEXT: movl %edx, 8(%edi) 514; SSE-X86-NEXT: movl %ecx, 4(%edi) 515; SSE-X86-NEXT: movl %eax, (%edi) 516; SSE-X86-NEXT: popl %esi 517; SSE-X86-NEXT: popl %edi 518; SSE-X86-NEXT: retl 519; 520; SSE-X64-LABEL: extract_f128_1: 521; SSE-X64: # %bb.0: 522; SSE-X64-NEXT: movups %xmm1, (%rdi) 523; SSE-X64-NEXT: retq 524; 525; AVX-X86-LABEL: extract_f128_1: 526; AVX-X86: # %bb.0: 527; AVX-X86-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0 528; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 529; AVX-X86-NEXT: vmovups %xmm0, (%eax) 530; AVX-X86-NEXT: retl 531; 532; AVX-X64-LABEL: extract_f128_1: 533; AVX-X64: # %bb.0: 534; AVX-X64-NEXT: vmovups %xmm1, (%rdi) 535; AVX-X64-NEXT: retq 536 %vecext = extractelement <2 x fp128> %foo, i32 1 537 store fp128 %vecext, fp128* %dst, align 1 538 ret void 539} 540 541define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) nounwind { 542; X86-LABEL: extract_i8_undef: 543; X86: # %bb.0: 544; X86-NEXT: retl 545; 546; X64-LABEL: extract_i8_undef: 547; X64: # %bb.0: 548; X64-NEXT: retq 549 %vecext = extractelement <16 x i8> %foo, i32 16 ; undef 550 store i8 %vecext, i8* %dst, align 1 551 ret void 552} 553 554define void @extract_i16_undef(i16* nocapture %dst, <8 x i16> %foo) nounwind { 555; X86-LABEL: extract_i16_undef: 556; X86: # %bb.0: 557; X86-NEXT: retl 558; 559; X64-LABEL: extract_i16_undef: 560; X64: # %bb.0: 561; X64-NEXT: retq 562 %vecext = extractelement <8 x i16> %foo, i32 9 ; undef 563 store i16 %vecext, i16* %dst, align 1 564 ret void 565} 566 567define void @extract_i32_undef(i32* nocapture %dst, <4 x i32> %foo) nounwind { 568; X86-LABEL: extract_i32_undef: 569; X86: # %bb.0: 570; X86-NEXT: retl 571; 572; X64-LABEL: extract_i32_undef: 573; X64: # %bb.0: 574; X64-NEXT: retq 575 %vecext = extractelement <4 x i32> %foo, i32 6 ; undef 576 store i32 %vecext, i32* %dst, align 1 577 ret void 578} 579 580define void @extract_i64_undef(i64* nocapture %dst, <2 x i64> %foo) nounwind { 581; X86-LABEL: extract_i64_undef: 582; X86: # %bb.0: 583; X86-NEXT: retl 584; 585; X64-LABEL: extract_i64_undef: 586; X64: # %bb.0: 587; X64-NEXT: retq 588 %vecext = extractelement <2 x i64> %foo, i32 2 ; undef 589 store i64 %vecext, i64* %dst, align 1 590 ret void 591} 592 593define void @extract_f32_undef(float* nocapture %dst, <4 x float> %foo) nounwind { 594; X86-LABEL: extract_f32_undef: 595; X86: # %bb.0: 596; X86-NEXT: retl 597; 598; X64-LABEL: extract_f32_undef: 599; X64: # %bb.0: 600; X64-NEXT: retq 601 %vecext = extractelement <4 x float> %foo, i32 6 ; undef 602 store float %vecext, float* %dst, align 1 603 ret void 604} 605 606define void @extract_f64_undef(double* nocapture %dst, <2 x double> %foo) nounwind { 607; X86-LABEL: extract_f64_undef: 608; X86: # %bb.0: 609; X86-NEXT: retl 610; 611; X64-LABEL: extract_f64_undef: 612; X64: # %bb.0: 613; X64-NEXT: retq 614 %vecext = extractelement <2 x double> %foo, i32 2 ; undef 615 store double %vecext, double* %dst, align 1 616 ret void 617} 618 619define void @extract_f128_undef(fp128* nocapture %dst, <2 x fp128> %foo) nounwind { 620; X86-LABEL: extract_f128_undef: 621; X86: # %bb.0: 622; X86-NEXT: retl 623; 624; X64-LABEL: extract_f128_undef: 625; X64: # %bb.0: 626; X64-NEXT: retq 627 %vecext = extractelement <2 x fp128> %foo, i32 2 ; undef 628 store fp128 %vecext, fp128* %dst, align 1 629 ret void 630} 631