• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -limit-float-precision=6 -mtriple=i686-- | FileCheck %s --check-prefix=precision6
3; RUN: llc < %s -limit-float-precision=12 -mtriple=i686-- | FileCheck %s --check-prefix=precision12
4; RUN: llc < %s -limit-float-precision=18 -mtriple=i686-- | FileCheck %s --check-prefix=precision18
5
6define float @f1(float %x) nounwind noinline {
7; precision6-LABEL: f1:
8; precision6:       # %bb.0: # %entry
9; precision6-NEXT:    subl $20, %esp
10; precision6-NEXT:    flds {{[0-9]+}}(%esp)
11; precision6-NEXT:    fmuls {{\.LCPI.*}}
12; precision6-NEXT:    fnstcw (%esp)
13; precision6-NEXT:    movzwl (%esp), %eax
14; precision6-NEXT:    orl $3072, %eax # imm = 0xC00
15; precision6-NEXT:    movw %ax, {{[0-9]+}}(%esp)
16; precision6-NEXT:    fldcw {{[0-9]+}}(%esp)
17; precision6-NEXT:    fistl {{[0-9]+}}(%esp)
18; precision6-NEXT:    fldcw (%esp)
19; precision6-NEXT:    movl {{[0-9]+}}(%esp), %eax
20; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
21; precision6-NEXT:    fisubl {{[0-9]+}}(%esp)
22; precision6-NEXT:    fld %st(0)
23; precision6-NEXT:    fmuls {{\.LCPI.*}}
24; precision6-NEXT:    fadds {{\.LCPI.*}}
25; precision6-NEXT:    fmulp %st, %st(1)
26; precision6-NEXT:    fadds {{\.LCPI.*}}
27; precision6-NEXT:    fstps {{[0-9]+}}(%esp)
28; precision6-NEXT:    shll $23, %eax
29; precision6-NEXT:    addl {{[0-9]+}}(%esp), %eax
30; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
31; precision6-NEXT:    flds {{[0-9]+}}(%esp)
32; precision6-NEXT:    addl $20, %esp
33; precision6-NEXT:    retl
34;
35; precision12-LABEL: f1:
36; precision12:       # %bb.0: # %entry
37; precision12-NEXT:    subl $20, %esp
38; precision12-NEXT:    flds {{[0-9]+}}(%esp)
39; precision12-NEXT:    fmuls {{\.LCPI.*}}
40; precision12-NEXT:    fnstcw (%esp)
41; precision12-NEXT:    movzwl (%esp), %eax
42; precision12-NEXT:    orl $3072, %eax # imm = 0xC00
43; precision12-NEXT:    movw %ax, {{[0-9]+}}(%esp)
44; precision12-NEXT:    fldcw {{[0-9]+}}(%esp)
45; precision12-NEXT:    fistl {{[0-9]+}}(%esp)
46; precision12-NEXT:    fldcw (%esp)
47; precision12-NEXT:    movl {{[0-9]+}}(%esp), %eax
48; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
49; precision12-NEXT:    fisubl {{[0-9]+}}(%esp)
50; precision12-NEXT:    fld %st(0)
51; precision12-NEXT:    fmuls {{\.LCPI.*}}
52; precision12-NEXT:    fadds {{\.LCPI.*}}
53; precision12-NEXT:    fmul %st(1), %st
54; precision12-NEXT:    fadds {{\.LCPI.*}}
55; precision12-NEXT:    fmulp %st, %st(1)
56; precision12-NEXT:    fadds {{\.LCPI.*}}
57; precision12-NEXT:    fstps {{[0-9]+}}(%esp)
58; precision12-NEXT:    shll $23, %eax
59; precision12-NEXT:    addl {{[0-9]+}}(%esp), %eax
60; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
61; precision12-NEXT:    flds {{[0-9]+}}(%esp)
62; precision12-NEXT:    addl $20, %esp
63; precision12-NEXT:    retl
64;
65; precision18-LABEL: f1:
66; precision18:       # %bb.0: # %entry
67; precision18-NEXT:    subl $20, %esp
68; precision18-NEXT:    flds {{[0-9]+}}(%esp)
69; precision18-NEXT:    fmuls {{\.LCPI.*}}
70; precision18-NEXT:    fnstcw (%esp)
71; precision18-NEXT:    movzwl (%esp), %eax
72; precision18-NEXT:    orl $3072, %eax # imm = 0xC00
73; precision18-NEXT:    movw %ax, {{[0-9]+}}(%esp)
74; precision18-NEXT:    fldcw {{[0-9]+}}(%esp)
75; precision18-NEXT:    fistl {{[0-9]+}}(%esp)
76; precision18-NEXT:    fldcw (%esp)
77; precision18-NEXT:    movl {{[0-9]+}}(%esp), %eax
78; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
79; precision18-NEXT:    fisubl {{[0-9]+}}(%esp)
80; precision18-NEXT:    fld %st(0)
81; precision18-NEXT:    fmuls {{\.LCPI.*}}
82; precision18-NEXT:    fadds {{\.LCPI.*}}
83; precision18-NEXT:    fmul %st(1), %st
84; precision18-NEXT:    fadds {{\.LCPI.*}}
85; precision18-NEXT:    fmul %st(1), %st
86; precision18-NEXT:    fadds {{\.LCPI.*}}
87; precision18-NEXT:    fmul %st(1), %st
88; precision18-NEXT:    fadds {{\.LCPI.*}}
89; precision18-NEXT:    fmul %st(1), %st
90; precision18-NEXT:    fadds {{\.LCPI.*}}
91; precision18-NEXT:    fmulp %st, %st(1)
92; precision18-NEXT:    fld1
93; precision18-NEXT:    faddp %st, %st(1)
94; precision18-NEXT:    fstps {{[0-9]+}}(%esp)
95; precision18-NEXT:    shll $23, %eax
96; precision18-NEXT:    addl {{[0-9]+}}(%esp), %eax
97; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
98; precision18-NEXT:    flds {{[0-9]+}}(%esp)
99; precision18-NEXT:    addl $20, %esp
100; precision18-NEXT:    retl
101entry:
102	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
103	%0 = call float @llvm.exp.f32(float %x)		; <float> [#uses=1]
104	ret float %0
105}
106
107declare float @llvm.exp.f32(float) nounwind readonly
108
109define float @f2(float %x) nounwind noinline {
110; precision6-LABEL: f2:
111; precision6:       # %bb.0: # %entry
112; precision6-NEXT:    subl $20, %esp
113; precision6-NEXT:    flds {{[0-9]+}}(%esp)
114; precision6-NEXT:    fnstcw (%esp)
115; precision6-NEXT:    movzwl (%esp), %eax
116; precision6-NEXT:    orl $3072, %eax # imm = 0xC00
117; precision6-NEXT:    movw %ax, {{[0-9]+}}(%esp)
118; precision6-NEXT:    fldcw {{[0-9]+}}(%esp)
119; precision6-NEXT:    fistl {{[0-9]+}}(%esp)
120; precision6-NEXT:    fldcw (%esp)
121; precision6-NEXT:    movl {{[0-9]+}}(%esp), %eax
122; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
123; precision6-NEXT:    fisubl {{[0-9]+}}(%esp)
124; precision6-NEXT:    fld %st(0)
125; precision6-NEXT:    fmuls {{\.LCPI.*}}
126; precision6-NEXT:    fadds {{\.LCPI.*}}
127; precision6-NEXT:    fmulp %st, %st(1)
128; precision6-NEXT:    fadds {{\.LCPI.*}}
129; precision6-NEXT:    fstps {{[0-9]+}}(%esp)
130; precision6-NEXT:    shll $23, %eax
131; precision6-NEXT:    addl {{[0-9]+}}(%esp), %eax
132; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
133; precision6-NEXT:    flds {{[0-9]+}}(%esp)
134; precision6-NEXT:    addl $20, %esp
135; precision6-NEXT:    retl
136;
137; precision12-LABEL: f2:
138; precision12:       # %bb.0: # %entry
139; precision12-NEXT:    subl $20, %esp
140; precision12-NEXT:    flds {{[0-9]+}}(%esp)
141; precision12-NEXT:    fnstcw (%esp)
142; precision12-NEXT:    movzwl (%esp), %eax
143; precision12-NEXT:    orl $3072, %eax # imm = 0xC00
144; precision12-NEXT:    movw %ax, {{[0-9]+}}(%esp)
145; precision12-NEXT:    fldcw {{[0-9]+}}(%esp)
146; precision12-NEXT:    fistl {{[0-9]+}}(%esp)
147; precision12-NEXT:    fldcw (%esp)
148; precision12-NEXT:    movl {{[0-9]+}}(%esp), %eax
149; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
150; precision12-NEXT:    fisubl {{[0-9]+}}(%esp)
151; precision12-NEXT:    fld %st(0)
152; precision12-NEXT:    fmuls {{\.LCPI.*}}
153; precision12-NEXT:    fadds {{\.LCPI.*}}
154; precision12-NEXT:    fmul %st(1), %st
155; precision12-NEXT:    fadds {{\.LCPI.*}}
156; precision12-NEXT:    fmulp %st, %st(1)
157; precision12-NEXT:    fadds {{\.LCPI.*}}
158; precision12-NEXT:    fstps {{[0-9]+}}(%esp)
159; precision12-NEXT:    shll $23, %eax
160; precision12-NEXT:    addl {{[0-9]+}}(%esp), %eax
161; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
162; precision12-NEXT:    flds {{[0-9]+}}(%esp)
163; precision12-NEXT:    addl $20, %esp
164; precision12-NEXT:    retl
165;
166; precision18-LABEL: f2:
167; precision18:       # %bb.0: # %entry
168; precision18-NEXT:    subl $20, %esp
169; precision18-NEXT:    flds {{[0-9]+}}(%esp)
170; precision18-NEXT:    fnstcw (%esp)
171; precision18-NEXT:    movzwl (%esp), %eax
172; precision18-NEXT:    orl $3072, %eax # imm = 0xC00
173; precision18-NEXT:    movw %ax, {{[0-9]+}}(%esp)
174; precision18-NEXT:    fldcw {{[0-9]+}}(%esp)
175; precision18-NEXT:    fistl {{[0-9]+}}(%esp)
176; precision18-NEXT:    fldcw (%esp)
177; precision18-NEXT:    movl {{[0-9]+}}(%esp), %eax
178; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
179; precision18-NEXT:    fisubl {{[0-9]+}}(%esp)
180; precision18-NEXT:    fld %st(0)
181; precision18-NEXT:    fmuls {{\.LCPI.*}}
182; precision18-NEXT:    fadds {{\.LCPI.*}}
183; precision18-NEXT:    fmul %st(1), %st
184; precision18-NEXT:    fadds {{\.LCPI.*}}
185; precision18-NEXT:    fmul %st(1), %st
186; precision18-NEXT:    fadds {{\.LCPI.*}}
187; precision18-NEXT:    fmul %st(1), %st
188; precision18-NEXT:    fadds {{\.LCPI.*}}
189; precision18-NEXT:    fmul %st(1), %st
190; precision18-NEXT:    fadds {{\.LCPI.*}}
191; precision18-NEXT:    fmulp %st, %st(1)
192; precision18-NEXT:    fld1
193; precision18-NEXT:    faddp %st, %st(1)
194; precision18-NEXT:    fstps {{[0-9]+}}(%esp)
195; precision18-NEXT:    shll $23, %eax
196; precision18-NEXT:    addl {{[0-9]+}}(%esp), %eax
197; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
198; precision18-NEXT:    flds {{[0-9]+}}(%esp)
199; precision18-NEXT:    addl $20, %esp
200; precision18-NEXT:    retl
201entry:
202	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
203	%0 = call float @llvm.exp2.f32(float %x)		; <float> [#uses=1]
204	ret float %0
205}
206
207declare float @llvm.exp2.f32(float) nounwind readonly
208
209define float @f3(float %x) nounwind noinline {
210; precision6-LABEL: f3:
211; precision6:       # %bb.0: # %entry
212; precision6-NEXT:    subl $20, %esp
213; precision6-NEXT:    flds {{[0-9]+}}(%esp)
214; precision6-NEXT:    fmuls {{\.LCPI.*}}
215; precision6-NEXT:    fnstcw (%esp)
216; precision6-NEXT:    movzwl (%esp), %eax
217; precision6-NEXT:    orl $3072, %eax # imm = 0xC00
218; precision6-NEXT:    movw %ax, {{[0-9]+}}(%esp)
219; precision6-NEXT:    fldcw {{[0-9]+}}(%esp)
220; precision6-NEXT:    fistl {{[0-9]+}}(%esp)
221; precision6-NEXT:    fldcw (%esp)
222; precision6-NEXT:    movl {{[0-9]+}}(%esp), %eax
223; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
224; precision6-NEXT:    fisubl {{[0-9]+}}(%esp)
225; precision6-NEXT:    fld %st(0)
226; precision6-NEXT:    fmuls {{\.LCPI.*}}
227; precision6-NEXT:    fadds {{\.LCPI.*}}
228; precision6-NEXT:    fmulp %st, %st(1)
229; precision6-NEXT:    fadds {{\.LCPI.*}}
230; precision6-NEXT:    fstps {{[0-9]+}}(%esp)
231; precision6-NEXT:    shll $23, %eax
232; precision6-NEXT:    addl {{[0-9]+}}(%esp), %eax
233; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
234; precision6-NEXT:    flds {{[0-9]+}}(%esp)
235; precision6-NEXT:    addl $20, %esp
236; precision6-NEXT:    retl
237;
238; precision12-LABEL: f3:
239; precision12:       # %bb.0: # %entry
240; precision12-NEXT:    subl $20, %esp
241; precision12-NEXT:    flds {{[0-9]+}}(%esp)
242; precision12-NEXT:    fmuls {{\.LCPI.*}}
243; precision12-NEXT:    fnstcw (%esp)
244; precision12-NEXT:    movzwl (%esp), %eax
245; precision12-NEXT:    orl $3072, %eax # imm = 0xC00
246; precision12-NEXT:    movw %ax, {{[0-9]+}}(%esp)
247; precision12-NEXT:    fldcw {{[0-9]+}}(%esp)
248; precision12-NEXT:    fistl {{[0-9]+}}(%esp)
249; precision12-NEXT:    fldcw (%esp)
250; precision12-NEXT:    movl {{[0-9]+}}(%esp), %eax
251; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
252; precision12-NEXT:    fisubl {{[0-9]+}}(%esp)
253; precision12-NEXT:    fld %st(0)
254; precision12-NEXT:    fmuls {{\.LCPI.*}}
255; precision12-NEXT:    fadds {{\.LCPI.*}}
256; precision12-NEXT:    fmul %st(1), %st
257; precision12-NEXT:    fadds {{\.LCPI.*}}
258; precision12-NEXT:    fmulp %st, %st(1)
259; precision12-NEXT:    fadds {{\.LCPI.*}}
260; precision12-NEXT:    fstps {{[0-9]+}}(%esp)
261; precision12-NEXT:    shll $23, %eax
262; precision12-NEXT:    addl {{[0-9]+}}(%esp), %eax
263; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
264; precision12-NEXT:    flds {{[0-9]+}}(%esp)
265; precision12-NEXT:    addl $20, %esp
266; precision12-NEXT:    retl
267;
268; precision18-LABEL: f3:
269; precision18:       # %bb.0: # %entry
270; precision18-NEXT:    subl $20, %esp
271; precision18-NEXT:    flds {{[0-9]+}}(%esp)
272; precision18-NEXT:    fmuls {{\.LCPI.*}}
273; precision18-NEXT:    fnstcw (%esp)
274; precision18-NEXT:    movzwl (%esp), %eax
275; precision18-NEXT:    orl $3072, %eax # imm = 0xC00
276; precision18-NEXT:    movw %ax, {{[0-9]+}}(%esp)
277; precision18-NEXT:    fldcw {{[0-9]+}}(%esp)
278; precision18-NEXT:    fistl {{[0-9]+}}(%esp)
279; precision18-NEXT:    fldcw (%esp)
280; precision18-NEXT:    movl {{[0-9]+}}(%esp), %eax
281; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
282; precision18-NEXT:    fisubl {{[0-9]+}}(%esp)
283; precision18-NEXT:    fld %st(0)
284; precision18-NEXT:    fmuls {{\.LCPI.*}}
285; precision18-NEXT:    fadds {{\.LCPI.*}}
286; precision18-NEXT:    fmul %st(1), %st
287; precision18-NEXT:    fadds {{\.LCPI.*}}
288; precision18-NEXT:    fmul %st(1), %st
289; precision18-NEXT:    fadds {{\.LCPI.*}}
290; precision18-NEXT:    fmul %st(1), %st
291; precision18-NEXT:    fadds {{\.LCPI.*}}
292; precision18-NEXT:    fmul %st(1), %st
293; precision18-NEXT:    fadds {{\.LCPI.*}}
294; precision18-NEXT:    fmulp %st, %st(1)
295; precision18-NEXT:    fld1
296; precision18-NEXT:    faddp %st, %st(1)
297; precision18-NEXT:    fstps {{[0-9]+}}(%esp)
298; precision18-NEXT:    shll $23, %eax
299; precision18-NEXT:    addl {{[0-9]+}}(%esp), %eax
300; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
301; precision18-NEXT:    flds {{[0-9]+}}(%esp)
302; precision18-NEXT:    addl $20, %esp
303; precision18-NEXT:    retl
304entry:
305	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
306	%0 = call float @llvm.pow.f32(float 1.000000e+01, float %x)		; <float> [#uses=1]
307	ret float %0
308}
309
310declare float @llvm.pow.f32(float, float) nounwind readonly
311
312define float @f4(float %x) nounwind noinline {
313; precision6-LABEL: f4:
314; precision6:       # %bb.0: # %entry
315; precision6-NEXT:    subl $8, %esp
316; precision6-NEXT:    movl {{[0-9]+}}(%esp), %eax
317; precision6-NEXT:    movl %eax, %ecx
318; precision6-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
319; precision6-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
320; precision6-NEXT:    movl %ecx, (%esp)
321; precision6-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
322; precision6-NEXT:    shrl $23, %eax
323; precision6-NEXT:    addl $-127, %eax
324; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
325; precision6-NEXT:    flds (%esp)
326; precision6-NEXT:    fld %st(0)
327; precision6-NEXT:    fmuls {{\.LCPI.*}}
328; precision6-NEXT:    fadds {{\.LCPI.*}}
329; precision6-NEXT:    fmulp %st, %st(1)
330; precision6-NEXT:    fadds {{\.LCPI.*}}
331; precision6-NEXT:    fildl {{[0-9]+}}(%esp)
332; precision6-NEXT:    fmuls {{\.LCPI.*}}
333; precision6-NEXT:    faddp %st, %st(1)
334; precision6-NEXT:    addl $8, %esp
335; precision6-NEXT:    retl
336;
337; precision12-LABEL: f4:
338; precision12:       # %bb.0: # %entry
339; precision12-NEXT:    subl $8, %esp
340; precision12-NEXT:    movl {{[0-9]+}}(%esp), %eax
341; precision12-NEXT:    movl %eax, %ecx
342; precision12-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
343; precision12-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
344; precision12-NEXT:    movl %ecx, (%esp)
345; precision12-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
346; precision12-NEXT:    shrl $23, %eax
347; precision12-NEXT:    addl $-127, %eax
348; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
349; precision12-NEXT:    flds (%esp)
350; precision12-NEXT:    fld %st(0)
351; precision12-NEXT:    fmuls {{\.LCPI.*}}
352; precision12-NEXT:    fadds {{\.LCPI.*}}
353; precision12-NEXT:    fmul %st(1), %st
354; precision12-NEXT:    fadds {{\.LCPI.*}}
355; precision12-NEXT:    fmul %st(1), %st
356; precision12-NEXT:    fadds {{\.LCPI.*}}
357; precision12-NEXT:    fmulp %st, %st(1)
358; precision12-NEXT:    fadds {{\.LCPI.*}}
359; precision12-NEXT:    fildl {{[0-9]+}}(%esp)
360; precision12-NEXT:    fmuls {{\.LCPI.*}}
361; precision12-NEXT:    faddp %st, %st(1)
362; precision12-NEXT:    addl $8, %esp
363; precision12-NEXT:    retl
364;
365; precision18-LABEL: f4:
366; precision18:       # %bb.0: # %entry
367; precision18-NEXT:    subl $8, %esp
368; precision18-NEXT:    movl {{[0-9]+}}(%esp), %eax
369; precision18-NEXT:    movl %eax, %ecx
370; precision18-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
371; precision18-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
372; precision18-NEXT:    movl %ecx, (%esp)
373; precision18-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
374; precision18-NEXT:    shrl $23, %eax
375; precision18-NEXT:    addl $-127, %eax
376; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
377; precision18-NEXT:    flds (%esp)
378; precision18-NEXT:    fld %st(0)
379; precision18-NEXT:    fmuls {{\.LCPI.*}}
380; precision18-NEXT:    fadds {{\.LCPI.*}}
381; precision18-NEXT:    fmul %st(1), %st
382; precision18-NEXT:    fadds {{\.LCPI.*}}
383; precision18-NEXT:    fmul %st(1), %st
384; precision18-NEXT:    fadds {{\.LCPI.*}}
385; precision18-NEXT:    fmul %st(1), %st
386; precision18-NEXT:    fadds {{\.LCPI.*}}
387; precision18-NEXT:    fmul %st(1), %st
388; precision18-NEXT:    fadds {{\.LCPI.*}}
389; precision18-NEXT:    fmulp %st, %st(1)
390; precision18-NEXT:    fadds {{\.LCPI.*}}
391; precision18-NEXT:    fildl {{[0-9]+}}(%esp)
392; precision18-NEXT:    fmuls {{\.LCPI.*}}
393; precision18-NEXT:    faddp %st, %st(1)
394; precision18-NEXT:    addl $8, %esp
395; precision18-NEXT:    retl
396entry:
397	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
398	%0 = call float @llvm.log.f32(float %x)		; <float> [#uses=1]
399	ret float %0
400}
401
402declare float @llvm.log.f32(float) nounwind readonly
403
404define float @f5(float %x) nounwind noinline {
405; precision6-LABEL: f5:
406; precision6:       # %bb.0: # %entry
407; precision6-NEXT:    subl $8, %esp
408; precision6-NEXT:    movl {{[0-9]+}}(%esp), %eax
409; precision6-NEXT:    movl %eax, %ecx
410; precision6-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
411; precision6-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
412; precision6-NEXT:    movl %ecx, (%esp)
413; precision6-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
414; precision6-NEXT:    shrl $23, %eax
415; precision6-NEXT:    addl $-127, %eax
416; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
417; precision6-NEXT:    flds (%esp)
418; precision6-NEXT:    fld %st(0)
419; precision6-NEXT:    fmuls {{\.LCPI.*}}
420; precision6-NEXT:    fadds {{\.LCPI.*}}
421; precision6-NEXT:    fmulp %st, %st(1)
422; precision6-NEXT:    fadds {{\.LCPI.*}}
423; precision6-NEXT:    fiaddl {{[0-9]+}}(%esp)
424; precision6-NEXT:    addl $8, %esp
425; precision6-NEXT:    retl
426;
427; precision12-LABEL: f5:
428; precision12:       # %bb.0: # %entry
429; precision12-NEXT:    subl $8, %esp
430; precision12-NEXT:    movl {{[0-9]+}}(%esp), %eax
431; precision12-NEXT:    movl %eax, %ecx
432; precision12-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
433; precision12-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
434; precision12-NEXT:    movl %ecx, (%esp)
435; precision12-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
436; precision12-NEXT:    shrl $23, %eax
437; precision12-NEXT:    addl $-127, %eax
438; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
439; precision12-NEXT:    flds (%esp)
440; precision12-NEXT:    fld %st(0)
441; precision12-NEXT:    fmuls {{\.LCPI.*}}
442; precision12-NEXT:    fadds {{\.LCPI.*}}
443; precision12-NEXT:    fmul %st(1), %st
444; precision12-NEXT:    fadds {{\.LCPI.*}}
445; precision12-NEXT:    fmul %st(1), %st
446; precision12-NEXT:    fadds {{\.LCPI.*}}
447; precision12-NEXT:    fmulp %st, %st(1)
448; precision12-NEXT:    fadds {{\.LCPI.*}}
449; precision12-NEXT:    fiaddl {{[0-9]+}}(%esp)
450; precision12-NEXT:    addl $8, %esp
451; precision12-NEXT:    retl
452;
453; precision18-LABEL: f5:
454; precision18:       # %bb.0: # %entry
455; precision18-NEXT:    subl $8, %esp
456; precision18-NEXT:    movl {{[0-9]+}}(%esp), %eax
457; precision18-NEXT:    movl %eax, %ecx
458; precision18-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
459; precision18-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
460; precision18-NEXT:    movl %ecx, (%esp)
461; precision18-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
462; precision18-NEXT:    shrl $23, %eax
463; precision18-NEXT:    addl $-127, %eax
464; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
465; precision18-NEXT:    flds (%esp)
466; precision18-NEXT:    fld %st(0)
467; precision18-NEXT:    fmuls {{\.LCPI.*}}
468; precision18-NEXT:    fadds {{\.LCPI.*}}
469; precision18-NEXT:    fmul %st(1), %st
470; precision18-NEXT:    fadds {{\.LCPI.*}}
471; precision18-NEXT:    fmul %st(1), %st
472; precision18-NEXT:    fadds {{\.LCPI.*}}
473; precision18-NEXT:    fmul %st(1), %st
474; precision18-NEXT:    fadds {{\.LCPI.*}}
475; precision18-NEXT:    fmul %st(1), %st
476; precision18-NEXT:    fadds {{\.LCPI.*}}
477; precision18-NEXT:    fmulp %st, %st(1)
478; precision18-NEXT:    fadds {{\.LCPI.*}}
479; precision18-NEXT:    fiaddl {{[0-9]+}}(%esp)
480; precision18-NEXT:    addl $8, %esp
481; precision18-NEXT:    retl
482entry:
483	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
484	%0 = call float @llvm.log2.f32(float %x)		; <float> [#uses=1]
485	ret float %0
486}
487
488declare float @llvm.log2.f32(float) nounwind readonly
489
490define float @f6(float %x) nounwind noinline {
491; precision6-LABEL: f6:
492; precision6:       # %bb.0: # %entry
493; precision6-NEXT:    subl $8, %esp
494; precision6-NEXT:    movl {{[0-9]+}}(%esp), %eax
495; precision6-NEXT:    movl %eax, %ecx
496; precision6-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
497; precision6-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
498; precision6-NEXT:    movl %ecx, (%esp)
499; precision6-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
500; precision6-NEXT:    shrl $23, %eax
501; precision6-NEXT:    addl $-127, %eax
502; precision6-NEXT:    movl %eax, {{[0-9]+}}(%esp)
503; precision6-NEXT:    flds (%esp)
504; precision6-NEXT:    fld %st(0)
505; precision6-NEXT:    fmuls {{\.LCPI.*}}
506; precision6-NEXT:    fadds {{\.LCPI.*}}
507; precision6-NEXT:    fmulp %st, %st(1)
508; precision6-NEXT:    fadds {{\.LCPI.*}}
509; precision6-NEXT:    fildl {{[0-9]+}}(%esp)
510; precision6-NEXT:    fmuls {{\.LCPI.*}}
511; precision6-NEXT:    faddp %st, %st(1)
512; precision6-NEXT:    addl $8, %esp
513; precision6-NEXT:    retl
514;
515; precision12-LABEL: f6:
516; precision12:       # %bb.0: # %entry
517; precision12-NEXT:    subl $8, %esp
518; precision12-NEXT:    movl {{[0-9]+}}(%esp), %eax
519; precision12-NEXT:    movl %eax, %ecx
520; precision12-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
521; precision12-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
522; precision12-NEXT:    movl %ecx, (%esp)
523; precision12-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
524; precision12-NEXT:    shrl $23, %eax
525; precision12-NEXT:    addl $-127, %eax
526; precision12-NEXT:    movl %eax, {{[0-9]+}}(%esp)
527; precision12-NEXT:    flds (%esp)
528; precision12-NEXT:    fld %st(0)
529; precision12-NEXT:    fmuls {{\.LCPI.*}}
530; precision12-NEXT:    fadds {{\.LCPI.*}}
531; precision12-NEXT:    fmul %st(1), %st
532; precision12-NEXT:    fadds {{\.LCPI.*}}
533; precision12-NEXT:    fmulp %st, %st(1)
534; precision12-NEXT:    fadds {{\.LCPI.*}}
535; precision12-NEXT:    fildl {{[0-9]+}}(%esp)
536; precision12-NEXT:    fmuls {{\.LCPI.*}}
537; precision12-NEXT:    faddp %st, %st(1)
538; precision12-NEXT:    addl $8, %esp
539; precision12-NEXT:    retl
540;
541; precision18-LABEL: f6:
542; precision18:       # %bb.0: # %entry
543; precision18-NEXT:    subl $8, %esp
544; precision18-NEXT:    movl {{[0-9]+}}(%esp), %eax
545; precision18-NEXT:    movl %eax, %ecx
546; precision18-NEXT:    andl $8388607, %ecx # imm = 0x7FFFFF
547; precision18-NEXT:    orl $1065353216, %ecx # imm = 0x3F800000
548; precision18-NEXT:    movl %ecx, (%esp)
549; precision18-NEXT:    andl $2139095040, %eax # imm = 0x7F800000
550; precision18-NEXT:    shrl $23, %eax
551; precision18-NEXT:    addl $-127, %eax
552; precision18-NEXT:    movl %eax, {{[0-9]+}}(%esp)
553; precision18-NEXT:    flds (%esp)
554; precision18-NEXT:    fld %st(0)
555; precision18-NEXT:    fmuls {{\.LCPI.*}}
556; precision18-NEXT:    fadds {{\.LCPI.*}}
557; precision18-NEXT:    fmul %st(1), %st
558; precision18-NEXT:    fadds {{\.LCPI.*}}
559; precision18-NEXT:    fmul %st(1), %st
560; precision18-NEXT:    fadds {{\.LCPI.*}}
561; precision18-NEXT:    fmul %st(1), %st
562; precision18-NEXT:    fadds {{\.LCPI.*}}
563; precision18-NEXT:    fmulp %st, %st(1)
564; precision18-NEXT:    fadds {{\.LCPI.*}}
565; precision18-NEXT:    fildl {{[0-9]+}}(%esp)
566; precision18-NEXT:    fmuls {{\.LCPI.*}}
567; precision18-NEXT:    faddp %st, %st(1)
568; precision18-NEXT:    addl $8, %esp
569; precision18-NEXT:    retl
570entry:
571	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
572	%0 = call float @llvm.log10.f32(float %x)		; <float> [#uses=1]
573	ret float %0
574}
575
576declare float @llvm.log10.f32(float) nounwind readonly
577