1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE 3; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2 4; RUN: llc < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX 5; RUN: llc < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX 6; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE 7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX 8; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX 9 10define i64 @testmsxs(float %x) { 11; X86-NOSSE-LABEL: testmsxs: 12; X86-NOSSE: # %bb.0: # %entry 13; X86-NOSSE-NEXT: pushl %ebp 14; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 15; X86-NOSSE-NEXT: .cfi_offset %ebp, -8 16; X86-NOSSE-NEXT: movl %esp, %ebp 17; X86-NOSSE-NEXT: .cfi_def_cfa_register %ebp 18; X86-NOSSE-NEXT: andl $-8, %esp 19; X86-NOSSE-NEXT: subl $8, %esp 20; X86-NOSSE-NEXT: flds 8(%ebp) 21; X86-NOSSE-NEXT: fistpll (%esp) 22; X86-NOSSE-NEXT: movl (%esp), %eax 23; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx 24; X86-NOSSE-NEXT: movl %ebp, %esp 25; X86-NOSSE-NEXT: popl %ebp 26; X86-NOSSE-NEXT: .cfi_def_cfa %esp, 4 27; X86-NOSSE-NEXT: retl 28; 29; X86-SSE2-LABEL: testmsxs: 30; X86-SSE2: # %bb.0: # %entry 31; X86-SSE2-NEXT: pushl %ebp 32; X86-SSE2-NEXT: .cfi_def_cfa_offset 8 33; X86-SSE2-NEXT: .cfi_offset %ebp, -8 34; X86-SSE2-NEXT: movl %esp, %ebp 35; X86-SSE2-NEXT: .cfi_def_cfa_register %ebp 36; X86-SSE2-NEXT: andl $-8, %esp 37; X86-SSE2-NEXT: subl $8, %esp 38; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 39; X86-SSE2-NEXT: movss %xmm0, (%esp) 40; X86-SSE2-NEXT: flds (%esp) 41; X86-SSE2-NEXT: fistpll (%esp) 42; X86-SSE2-NEXT: movl (%esp), %eax 43; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx 44; X86-SSE2-NEXT: movl %ebp, %esp 45; X86-SSE2-NEXT: popl %ebp 46; X86-SSE2-NEXT: .cfi_def_cfa %esp, 4 47; X86-SSE2-NEXT: retl 48; 49; X86-AVX-LABEL: testmsxs: 50; X86-AVX: # %bb.0: # %entry 51; X86-AVX-NEXT: pushl %ebp 52; X86-AVX-NEXT: .cfi_def_cfa_offset 8 53; X86-AVX-NEXT: .cfi_offset %ebp, -8 54; X86-AVX-NEXT: movl %esp, %ebp 55; X86-AVX-NEXT: .cfi_def_cfa_register %ebp 56; X86-AVX-NEXT: andl $-8, %esp 57; X86-AVX-NEXT: subl $8, %esp 58; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 59; X86-AVX-NEXT: vmovss %xmm0, (%esp) 60; X86-AVX-NEXT: flds (%esp) 61; X86-AVX-NEXT: fistpll (%esp) 62; X86-AVX-NEXT: movl (%esp), %eax 63; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %edx 64; X86-AVX-NEXT: movl %ebp, %esp 65; X86-AVX-NEXT: popl %ebp 66; X86-AVX-NEXT: .cfi_def_cfa %esp, 4 67; X86-AVX-NEXT: retl 68; 69; X64-SSE-LABEL: testmsxs: 70; X64-SSE: # %bb.0: # %entry 71; X64-SSE-NEXT: cvtss2si %xmm0, %rax 72; X64-SSE-NEXT: retq 73; 74; X64-AVX-LABEL: testmsxs: 75; X64-AVX: # %bb.0: # %entry 76; X64-AVX-NEXT: vcvtss2si %xmm0, %rax 77; X64-AVX-NEXT: retq 78entry: 79 %0 = tail call i64 @llvm.llrint.f32(float %x) 80 ret i64 %0 81} 82 83define i64 @testmsxd(double %x) { 84; X86-NOSSE-LABEL: testmsxd: 85; X86-NOSSE: # %bb.0: # %entry 86; X86-NOSSE-NEXT: pushl %ebp 87; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 88; X86-NOSSE-NEXT: .cfi_offset %ebp, -8 89; X86-NOSSE-NEXT: movl %esp, %ebp 90; X86-NOSSE-NEXT: .cfi_def_cfa_register %ebp 91; X86-NOSSE-NEXT: andl $-8, %esp 92; X86-NOSSE-NEXT: subl $8, %esp 93; X86-NOSSE-NEXT: fldl 8(%ebp) 94; X86-NOSSE-NEXT: fistpll (%esp) 95; X86-NOSSE-NEXT: movl (%esp), %eax 96; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx 97; X86-NOSSE-NEXT: movl %ebp, %esp 98; X86-NOSSE-NEXT: popl %ebp 99; X86-NOSSE-NEXT: .cfi_def_cfa %esp, 4 100; X86-NOSSE-NEXT: retl 101; 102; X86-SSE2-LABEL: testmsxd: 103; X86-SSE2: # %bb.0: # %entry 104; X86-SSE2-NEXT: pushl %ebp 105; X86-SSE2-NEXT: .cfi_def_cfa_offset 8 106; X86-SSE2-NEXT: .cfi_offset %ebp, -8 107; X86-SSE2-NEXT: movl %esp, %ebp 108; X86-SSE2-NEXT: .cfi_def_cfa_register %ebp 109; X86-SSE2-NEXT: andl $-8, %esp 110; X86-SSE2-NEXT: subl $8, %esp 111; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 112; X86-SSE2-NEXT: movsd %xmm0, (%esp) 113; X86-SSE2-NEXT: fldl (%esp) 114; X86-SSE2-NEXT: fistpll (%esp) 115; X86-SSE2-NEXT: movl (%esp), %eax 116; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx 117; X86-SSE2-NEXT: movl %ebp, %esp 118; X86-SSE2-NEXT: popl %ebp 119; X86-SSE2-NEXT: .cfi_def_cfa %esp, 4 120; X86-SSE2-NEXT: retl 121; 122; X86-AVX-LABEL: testmsxd: 123; X86-AVX: # %bb.0: # %entry 124; X86-AVX-NEXT: pushl %ebp 125; X86-AVX-NEXT: .cfi_def_cfa_offset 8 126; X86-AVX-NEXT: .cfi_offset %ebp, -8 127; X86-AVX-NEXT: movl %esp, %ebp 128; X86-AVX-NEXT: .cfi_def_cfa_register %ebp 129; X86-AVX-NEXT: andl $-8, %esp 130; X86-AVX-NEXT: subl $8, %esp 131; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 132; X86-AVX-NEXT: vmovsd %xmm0, (%esp) 133; X86-AVX-NEXT: fldl (%esp) 134; X86-AVX-NEXT: fistpll (%esp) 135; X86-AVX-NEXT: movl (%esp), %eax 136; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %edx 137; X86-AVX-NEXT: movl %ebp, %esp 138; X86-AVX-NEXT: popl %ebp 139; X86-AVX-NEXT: .cfi_def_cfa %esp, 4 140; X86-AVX-NEXT: retl 141; 142; X64-SSE-LABEL: testmsxd: 143; X64-SSE: # %bb.0: # %entry 144; X64-SSE-NEXT: cvtsd2si %xmm0, %rax 145; X64-SSE-NEXT: retq 146; 147; X64-AVX-LABEL: testmsxd: 148; X64-AVX: # %bb.0: # %entry 149; X64-AVX-NEXT: vcvtsd2si %xmm0, %rax 150; X64-AVX-NEXT: retq 151entry: 152 %0 = tail call i64 @llvm.llrint.f64(double %x) 153 ret i64 %0 154} 155 156define i64 @testmsll(x86_fp80 %x) { 157; X86-LABEL: testmsll: 158; X86: # %bb.0: # %entry 159; X86-NEXT: pushl %ebp 160; X86-NEXT: .cfi_def_cfa_offset 8 161; X86-NEXT: .cfi_offset %ebp, -8 162; X86-NEXT: movl %esp, %ebp 163; X86-NEXT: .cfi_def_cfa_register %ebp 164; X86-NEXT: andl $-8, %esp 165; X86-NEXT: subl $8, %esp 166; X86-NEXT: fldt 8(%ebp) 167; X86-NEXT: fistpll (%esp) 168; X86-NEXT: movl (%esp), %eax 169; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 170; X86-NEXT: movl %ebp, %esp 171; X86-NEXT: popl %ebp 172; X86-NEXT: .cfi_def_cfa %esp, 4 173; X86-NEXT: retl 174; 175; X64-LABEL: testmsll: 176; X64: # %bb.0: # %entry 177; X64-NEXT: fldt {{[0-9]+}}(%rsp) 178; X64-NEXT: fistpll -{{[0-9]+}}(%rsp) 179; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax 180; X64-NEXT: retq 181entry: 182 %0 = tail call i64 @llvm.llrint.f80(x86_fp80 %x) 183 ret i64 %0 184} 185 186declare i64 @llvm.llrint.f32(float) nounwind readnone 187declare i64 @llvm.llrint.f64(double) nounwind readnone 188declare i64 @llvm.llrint.f80(x86_fp80) nounwind readnone 189