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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- | FileCheck %s
3
4; This corresponds to:
5;int t(int a, int b) {
6;  while (a != b) {
7;    if (a > b)
8;      a -= b;
9;    else
10;      b -= a;
11;  }
12;  return a;
13;}
14
15
16define i32 @t(i32 %a, i32 %b) nounwind {
17; CHECK-LABEL: t:
18; CHECK:       # %bb.0: # %entry
19; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
20; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
21; CHECK-NEXT:    cmpl %ecx, %edx
22; CHECK-NEXT:    jne .LBB0_2
23; CHECK-NEXT:  # %bb.1:
24; CHECK-NEXT:    movl %edx, %eax
25; CHECK-NEXT:    retl
26; CHECK-NEXT:    .p2align 4, 0x90
27; CHECK-NEXT:  .LBB0_2: # %bb.outer
28; CHECK-NEXT:    # =>This Loop Header: Depth=1
29; CHECK-NEXT:    # Child Loop BB0_3 Depth 2
30; CHECK-NEXT:    movl %edx, %eax
31; CHECK-NEXT:    .p2align 4, 0x90
32; CHECK-NEXT:  .LBB0_3: # %bb
33; CHECK-NEXT:    # Parent Loop BB0_2 Depth=1
34; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
35; CHECK-NEXT:    subl %ecx, %eax
36; CHECK-NEXT:    jle .LBB0_5
37; CHECK-NEXT:  # %bb.4: # %cond_true
38; CHECK-NEXT:    # in Loop: Header=BB0_3 Depth=2
39; CHECK-NEXT:    cmpl %eax, %ecx
40; CHECK-NEXT:    movl %eax, %edx
41; CHECK-NEXT:    jne .LBB0_3
42; CHECK-NEXT:    jmp .LBB0_6
43; CHECK-NEXT:    .p2align 4, 0x90
44; CHECK-NEXT:  .LBB0_5: # %cond_false
45; CHECK-NEXT:    # in Loop: Header=BB0_2 Depth=1
46; CHECK-NEXT:    subl %edx, %ecx
47; CHECK-NEXT:    cmpl %edx, %ecx
48; CHECK-NEXT:    movl %edx, %eax
49; CHECK-NEXT:    jne .LBB0_2
50; CHECK-NEXT:  .LBB0_6: # %bb17
51; CHECK-NEXT:    retl
52entry:
53	%tmp1434 = icmp eq i32 %a, %b		; <i1> [#uses=1]
54	br i1 %tmp1434, label %bb17, label %bb.outer
55
56bb.outer:		; preds = %cond_false, %entry
57	%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]		; <i32> [#uses=5]
58	%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]		; <i32> [#uses=1]
59	br label %bb
60
61bb:		; preds = %cond_true, %bb.outer
62	%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]		; <i32> [#uses=2]
63	%tmp. = sub i32 0, %b_addr.021.0.ph		; <i32> [#uses=1]
64	%tmp.40 = mul i32 %indvar, %tmp.		; <i32> [#uses=1]
65	%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph		; <i32> [#uses=6]
66	%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph		; <i1> [#uses=1]
67	br i1 %tmp3, label %cond_true, label %cond_false
68
69cond_true:		; preds = %bb
70	%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph		; <i32> [#uses=2]
71	%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph		; <i1> [#uses=1]
72	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
73	br i1 %tmp1437, label %bb17, label %bb
74
75cond_false:		; preds = %bb
76	%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0		; <i32> [#uses=2]
77	%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10		; <i1> [#uses=1]
78	br i1 %tmp14, label %bb17, label %bb.outer
79
80bb17:		; preds = %cond_false, %cond_true, %entry
81	%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]		; <i32> [#uses=1]
82	ret i32 %a_addr.026.1
83}
84