1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; RUN: llc -mtriple=x86_64-- -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 \ 4; RUN: | grep -v 'Verify generated machine code' | FileCheck %s 5; RUN: llc -mtriple=x86_64-- -O2 -debug-pass=Structure < %s -o /dev/null 2>&1 \ 6; RUN: | grep -v 'Verify generated machine code' | FileCheck %s 7; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \ 8; RUN: | grep -v 'Verify generated machine code' | FileCheck %s 9 10; REQUIRES: asserts 11 12; CHECK-LABEL: Pass Arguments: 13; CHECK-NEXT: Target Library Information 14; CHECK-NEXT: Target Pass Configuration 15; CHECK-NEXT: Machine Module Information 16; CHECK-NEXT: Target Transform Information 17; CHECK-NEXT: Type-Based Alias Analysis 18; CHECK-NEXT: Scoped NoAlias Alias Analysis 19; CHECK-NEXT: Assumption Cache Tracker 20; CHECK-NEXT: Profile summary info 21; CHECK-NEXT: Create Garbage Collector Module Metadata 22; CHECK-NEXT: Machine Branch Probability Analysis 23; CHECK-NEXT: ModulePass Manager 24; CHECK-NEXT: Pre-ISel Intrinsic Lowering 25; CHECK-NEXT: FunctionPass Manager 26; CHECK-NEXT: Expand Atomic instructions 27; CHECK-NEXT: Module Verifier 28; CHECK-NEXT: Dominator Tree Construction 29; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 30; CHECK-NEXT: Natural Loop Information 31; CHECK-NEXT: Canonicalize natural loops 32; CHECK-NEXT: Scalar Evolution Analysis 33; CHECK-NEXT: Loop Pass Manager 34; CHECK-NEXT: Canonicalize Freeze Instructions in Loops 35; CHECK-NEXT: Induction Variable Users 36; CHECK-NEXT: Loop Strength Reduction 37; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 38; CHECK-NEXT: Function Alias Analysis Results 39; CHECK-NEXT: Merge contiguous icmps into a memcmp 40; CHECK-NEXT: Natural Loop Information 41; CHECK-NEXT: Lazy Branch Probability Analysis 42; CHECK-NEXT: Lazy Block Frequency Analysis 43; CHECK-NEXT: Expand memcmp() to load/stores 44; CHECK-NEXT: Lower Garbage Collection Instructions 45; CHECK-NEXT: Shadow Stack GC Lowering 46; CHECK-NEXT: Lower constant intrinsics 47; CHECK-NEXT: Remove unreachable blocks from the CFG 48; CHECK-NEXT: Dominator Tree Construction 49; CHECK-NEXT: Natural Loop Information 50; CHECK-NEXT: Post-Dominator Tree Construction 51; CHECK-NEXT: Branch Probability Analysis 52; CHECK-NEXT: Block Frequency Analysis 53; CHECK-NEXT: Constant Hoisting 54; CHECK-NEXT: Partially inline calls to library functions 55; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining) 56; CHECK-NEXT: Scalarize Masked Memory Intrinsics 57; CHECK-NEXT: Expand reduction intrinsics 58; CHECK-NEXT: Dominator Tree Construction 59; CHECK-NEXT: Interleaved Access Pass 60; CHECK-NEXT: X86 Partial Reduction 61; CHECK-NEXT: Expand indirectbr instructions 62; CHECK-NEXT: Dominator Tree Construction 63; CHECK-NEXT: Natural Loop Information 64; CHECK-NEXT: CodeGen Prepare 65; CHECK-NEXT: Rewrite Symbols 66; CHECK-NEXT: FunctionPass Manager 67; CHECK-NEXT: Dominator Tree Construction 68; CHECK-NEXT: Exception handling preparation 69; CHECK-NEXT: Safe Stack instrumentation pass 70; CHECK-NEXT: Insert stack protectors 71; CHECK-NEXT: Module Verifier 72; CHECK-NEXT: Dominator Tree Construction 73; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 74; CHECK-NEXT: Function Alias Analysis Results 75; CHECK-NEXT: Natural Loop Information 76; CHECK-NEXT: Post-Dominator Tree Construction 77; CHECK-NEXT: Branch Probability Analysis 78; CHECK-NEXT: Lazy Branch Probability Analysis 79; CHECK-NEXT: Lazy Block Frequency Analysis 80; CHECK-NEXT: X86 DAG->DAG Instruction Selection 81; CHECK-NEXT: MachineDominator Tree Construction 82; CHECK-NEXT: Local Dynamic TLS Access Clean-up 83; CHECK-NEXT: X86 PIC Global Base Reg Initialization 84; CHECK-NEXT: Finalize ISel and expand pseudo-instructions 85; CHECK-NEXT: X86 Domain Reassignment Pass 86; CHECK-NEXT: Lazy Machine Block Frequency Analysis 87; CHECK-NEXT: Early Tail Duplication 88; CHECK-NEXT: Optimize machine instruction PHIs 89; CHECK-NEXT: Slot index numbering 90; CHECK-NEXT: Merge disjoint stack slots 91; CHECK-NEXT: Local Stack Slot Allocation 92; CHECK-NEXT: Remove dead machine instructions 93; CHECK-NEXT: MachineDominator Tree Construction 94; CHECK-NEXT: Machine Natural Loop Construction 95; CHECK-NEXT: Machine Trace Metrics 96; CHECK-NEXT: Early If-Conversion 97; CHECK-NEXT: Lazy Machine Block Frequency Analysis 98; CHECK-NEXT: Machine InstCombiner 99; CHECK-NEXT: X86 cmov Conversion 100; CHECK-NEXT: MachineDominator Tree Construction 101; CHECK-NEXT: Machine Natural Loop Construction 102; CHECK-NEXT: Machine Block Frequency Analysis 103; CHECK-NEXT: Early Machine Loop Invariant Code Motion 104; CHECK-NEXT: MachineDominator Tree Construction 105; CHECK-NEXT: Machine Block Frequency Analysis 106; CHECK-NEXT: Machine Common Subexpression Elimination 107; CHECK-NEXT: MachinePostDominator Tree Construction 108; CHECK-NEXT: Machine code sinking 109; CHECK-NEXT: Peephole Optimizations 110; CHECK-NEXT: Remove dead machine instructions 111; CHECK-NEXT: Live Range Shrink 112; CHECK-NEXT: X86 Fixup SetCC 113; CHECK-NEXT: Lazy Machine Block Frequency Analysis 114; CHECK-NEXT: X86 LEA Optimize 115; CHECK-NEXT: X86 Optimize Call Frame 116; CHECK-NEXT: X86 Avoid Store Forwarding Block 117; CHECK-NEXT: X86 speculative load hardening 118; CHECK-NEXT: MachineDominator Tree Construction 119; CHECK-NEXT: X86 EFLAGS copy lowering 120; CHECK-NEXT: X86 WinAlloca Expander 121; CHECK-NEXT: Detect Dead Lanes 122; CHECK-NEXT: Process Implicit Definitions 123; CHECK-NEXT: Remove unreachable machine basic blocks 124; CHECK-NEXT: Live Variable Analysis 125; CHECK-NEXT: MachineDominator Tree Construction 126; CHECK-NEXT: Machine Natural Loop Construction 127; CHECK-NEXT: Eliminate PHI nodes for register allocation 128; CHECK-NEXT: Two-Address instruction pass 129; CHECK-NEXT: Slot index numbering 130; CHECK-NEXT: Live Interval Analysis 131; CHECK-NEXT: Simple Register Coalescing 132; CHECK-NEXT: Rename Disconnected Subregister Components 133; CHECK-NEXT: Machine Instruction Scheduler 134; CHECK-NEXT: Machine Block Frequency Analysis 135; CHECK-NEXT: Debug Variable Analysis 136; CHECK-NEXT: Live Stack Slot Analysis 137; CHECK-NEXT: Virtual Register Map 138; CHECK-NEXT: Live Register Matrix 139; CHECK-NEXT: Bundle Machine CFG Edges 140; CHECK-NEXT: Spill Code Placement Analysis 141; CHECK-NEXT: Lazy Machine Block Frequency Analysis 142; CHECK-NEXT: Machine Optimization Remark Emitter 143; CHECK-NEXT: Greedy Register Allocator 144; CHECK-NEXT: Virtual Register Rewriter 145; CHECK-NEXT: Stack Slot Coloring 146; CHECK-NEXT: Machine Copy Propagation Pass 147; CHECK-NEXT: Machine Loop Invariant Code Motion 148; CHECK-NEXT: Bundle Machine CFG Edges 149; CHECK-NEXT: X86 FP Stackifier 150; CHECK-NEXT: MachineDominator Tree Construction 151; CHECK-NEXT: Machine Dominance Frontier Construction 152; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening 153; CHECK-NEXT: Fixup Statepoint Caller Saved 154; CHECK-NEXT: PostRA Machine Sink 155; CHECK-NEXT: Machine Block Frequency Analysis 156; CHECK-NEXT: MachinePostDominator Tree Construction 157; CHECK-NEXT: Lazy Machine Block Frequency Analysis 158; CHECK-NEXT: Machine Optimization Remark Emitter 159; CHECK-NEXT: Shrink Wrapping analysis 160; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization 161; CHECK-NEXT: Control Flow Optimizer 162; CHECK-NEXT: Lazy Machine Block Frequency Analysis 163; CHECK-NEXT: Tail Duplication 164; CHECK-NEXT: Machine Copy Propagation Pass 165; CHECK-NEXT: Post-RA pseudo instruction expansion pass 166; CHECK-NEXT: X86 pseudo instruction expansion pass 167; CHECK-NEXT: MachineDominator Tree Construction 168; CHECK-NEXT: Machine Natural Loop Construction 169; CHECK-NEXT: Post RA top-down list latency scheduler 170; CHECK-NEXT: Analyze Machine Code For Garbage Collection 171; CHECK-NEXT: Machine Block Frequency Analysis 172; CHECK-NEXT: MachinePostDominator Tree Construction 173; CHECK-NEXT: Branch Probability Basic Block Placement 174; CHECK-NEXT: Insert fentry calls 175; CHECK-NEXT: Insert XRay ops 176; CHECK-NEXT: Implement the 'patchable-function' attribute 177; CHECK-NEXT: ReachingDefAnalysis 178; CHECK-NEXT: X86 Execution Dependency Fix 179; CHECK-NEXT: BreakFalseDeps 180; CHECK-NEXT: X86 Indirect Branch Tracking 181; CHECK-NEXT: X86 vzeroupper inserter 182; CHECK-NEXT: MachineDominator Tree Construction 183; CHECK-NEXT: Machine Natural Loop Construction 184; CHECK-NEXT: Lazy Machine Block Frequency Analysis 185; CHECK-NEXT: X86 Byte/Word Instruction Fixup 186; CHECK-NEXT: Lazy Machine Block Frequency Analysis 187; CHECK-NEXT: X86 Atom pad short functions 188; CHECK-NEXT: X86 LEA Fixup 189; CHECK-NEXT: Compressing EVEX instrs to VEX encoding when possible 190; CHECK-NEXT: X86 Discriminate Memory Operands 191; CHECK-NEXT: X86 Insert Cache Prefetches 192; CHECK-NEXT: X86 insert wait instruction 193; CHECK-NEXT: Contiguously Lay Out Funclets 194; CHECK-NEXT: StackMap Liveness Analysis 195; CHECK-NEXT: Live DEBUG_VALUE analysis 196; CHECK-NEXT: X86 Speculative Execution Side Effect Suppression 197; CHECK-NEXT: X86 Indirect Thunks 198; CHECK-NEXT: Check CFA info and insert CFI instructions if needed 199; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening 200; CHECK-NEXT: Lazy Machine Block Frequency Analysis 201; CHECK-NEXT: Machine Optimization Remark Emitter 202; CHECK-NEXT: X86 Assembly Printer 203; CHECK-NEXT: Free MachineFunction 204 205define void @f() { 206 ret void 207} 208