1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mattr=+avx512f | FileCheck %s 3; RUN: llc < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s 4 5target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 6target triple = "x86_64-unknown-linux-gnu" 7 8define i64 @foo64(i1 zeroext %i) #0 { 9; CHECK-LABEL: foo64: 10; CHECK: # %bb.0: 11; CHECK-NEXT: movzbl %dil, %eax 12; CHECK-NEXT: orq $-2, %rax 13; CHECK-NEXT: retq 14 br label %bb 15 16bb: 17 %z = zext i1 %i to i64 18 %v = or i64 %z, -2 19 br label %end 20 21end: 22 ret i64 %v 23} 24 25define i16 @foo16(i1 zeroext %i) #0 { 26; CHECK-LABEL: foo16: 27; CHECK: # %bb.0: 28; CHECK-NEXT: movzbl %dil, %eax 29; CHECK-NEXT: orl $65534, %eax # imm = 0xFFFE 30; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 31; CHECK-NEXT: retq 32 br label %bb 33 34bb: 35 %z = zext i1 %i to i16 36 %v = or i16 %z, -2 37 br label %end 38 39end: 40 ret i16 %v 41} 42 43define i16 @foo16_1(i1 zeroext %i, i32 %j) #0 { 44; CHECK-LABEL: foo16_1: 45; CHECK: # %bb.0: 46; CHECK-NEXT: movzbl %dil, %eax 47; CHECK-NEXT: orl $2, %eax 48; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 49; CHECK-NEXT: retq 50 br label %bb 51 52bb: 53 %z = zext i1 %i to i16 54 %v = or i16 %z, 2 55 br label %end 56 57end: 58 ret i16 %v 59} 60 61define i32 @foo32(i1 zeroext %i) #0 { 62; CHECK-LABEL: foo32: 63; CHECK: # %bb.0: 64; CHECK-NEXT: movzbl %dil, %eax 65; CHECK-NEXT: orl $-2, %eax 66; CHECK-NEXT: retq 67 br label %bb 68 69bb: 70 %z = zext i1 %i to i32 71 %v = or i32 %z, -2 72 br label %end 73 74end: 75 ret i32 %v 76} 77 78define i8 @foo8(i1 zeroext %i) #0 { 79; CHECK-LABEL: foo8: 80; CHECK: # %bb.0: 81; CHECK-NEXT: movl %edi, %eax 82; CHECK-NEXT: orb $-2, %al 83; CHECK-NEXT: # kill: def $al killed $al killed $eax 84; CHECK-NEXT: retq 85 br label %bb 86 87bb: 88 %z = zext i1 %i to i8 89 %v = or i8 %z, -2 90 br label %end 91 92end: 93 ret i8 %v 94} 95 96