1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s 3 4define <3 x i32> @f_29(<12 x i16> %a, <12 x i16> %b) { 5; CHECK-LABEL: f_29: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 8; CHECK-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 9; CHECK-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 10; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 11; CHECK-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 12; CHECK-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 13; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 14; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 15; CHECK-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 16; CHECK-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 17; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 18; CHECK-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 19; CHECK-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 20; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 21; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 22; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 23; CHECK-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 24; CHECK-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 25; CHECK-NEXT: movd %r9d, %xmm0 26; CHECK-NEXT: movd %r8d, %xmm3 27; CHECK-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 28; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] 29; CHECK-NEXT: movd %ecx, %xmm0 30; CHECK-NEXT: movd %edx, %xmm2 31; CHECK-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 32; CHECK-NEXT: movd %esi, %xmm4 33; CHECK-NEXT: movd %edi, %xmm0 34; CHECK-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 35; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 36; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0] 37; CHECK-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 38; CHECK-NEXT: pinsrw $1, {{[0-9]+}}(%rsp), %xmm2 39; CHECK-NEXT: pinsrw $2, {{[0-9]+}}(%rsp), %xmm2 40; CHECK-NEXT: pinsrw $3, {{[0-9]+}}(%rsp), %xmm2 41; CHECK-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 42; CHECK-NEXT: pinsrw $1, {{[0-9]+}}(%rsp), %xmm3 43; CHECK-NEXT: pinsrw $2, {{[0-9]+}}(%rsp), %xmm3 44; CHECK-NEXT: pinsrw $3, {{[0-9]+}}(%rsp), %xmm3 45; CHECK-NEXT: movdqa %xmm0, %xmm4 46; CHECK-NEXT: pmulhuw %xmm1, %xmm4 47; CHECK-NEXT: pmullw %xmm1, %xmm0 48; CHECK-NEXT: movdqa %xmm0, %xmm1 49; CHECK-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 50; CHECK-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 51; CHECK-NEXT: movdqa %xmm3, %xmm4 52; CHECK-NEXT: pmulhuw %xmm2, %xmm4 53; CHECK-NEXT: pmullw %xmm2, %xmm3 54; CHECK-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3] 55; CHECK-NEXT: movdqa %xmm0, %xmm2 56; CHECK-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3] 57; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,1,3] 58; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 59; CHECK-NEXT: paddd %xmm2, %xmm0 60; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,1,3] 61; CHECK-NEXT: paddd %xmm4, %xmm1 62; CHECK-NEXT: movdqa %xmm0, %xmm2 63; CHECK-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3] 64; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,3] 65; CHECK-NEXT: paddd %xmm2, %xmm0 66; CHECK-NEXT: retq 67entry: 68 %a32 = zext <12 x i16> %a to <12 x i32> 69 %b32 = zext <12 x i16> %b to <12 x i32> 70 %prod12 = mul nuw <12 x i32> %a32, %b32 71 %odd12 = shufflevector <12 x i32> %prod12, <12 x i32> undef, <6 x i32> <i32 721, i32 3, i32 5, i32 7, i32 9, i32 11> 73 %even12 = shufflevector <12 x i32> %prod12, <12 x i32> undef, <6 x i32> <i32 740, i32 2, i32 4, i32 6, i32 8, i32 10> 75 %prod6 = add <6 x i32> %odd12, %even12 76 %odd6 = shufflevector <6 x i32> %prod6, <6 x i32> undef, <3 x i32> <i32 1, 77i32 3, i32 5> 78 %even6 = shufflevector <6 x i32> %prod6, <6 x i32> undef, <3 x i32> <i32 0, 79i32 2, i32 4> 80 %result = add <3 x i32> %odd6, %even6 81 ret <3 x i32> %result 82} 83