1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s 3 4; The alignment of 16 causes type legalization to split this as 3 loads, 5; v16f32, v4f32, and v4f32. This loads 24 elements, but the load is aligned 6; to 16 bytes so this i safe. There was an issue with type legalization building 7; the proper concat_vectors for this because the two v4f32s don't add up to 8; v16f32 and require padding. 9 10define <23 x float> @load23(<23 x float>* %p) { 11; CHECK-LABEL: load23: 12; CHECK: # %bb.0: 13; CHECK-NEXT: movq %rdi, %rax 14; CHECK-NEXT: vmovups 64(%rsi), %ymm0 15; CHECK-NEXT: vmovups (%rsi), %zmm1 16; CHECK-NEXT: vmovaps 64(%rsi), %xmm2 17; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero 18; CHECK-NEXT: vmovss %xmm3, 88(%rdi) 19; CHECK-NEXT: vmovaps %xmm2, 64(%rdi) 20; CHECK-NEXT: vmovaps %zmm1, (%rdi) 21; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 22; CHECK-NEXT: vmovlps %xmm0, 80(%rdi) 23; CHECK-NEXT: vzeroupper 24; CHECK-NEXT: retq 25 %t0 = load <23 x float>, <23 x float>* %p, align 16 26 ret <23 x float> %t0 27} 28 29; Same test as above with minimal alignment just to demonstrate the different 30; codegen. 31define <23 x float> @load23_align_1(<23 x float>* %p) { 32; CHECK-LABEL: load23_align_1: 33; CHECK: # %bb.0: 34; CHECK-NEXT: movq %rdi, %rax 35; CHECK-NEXT: vmovups (%rsi), %zmm0 36; CHECK-NEXT: vmovups 64(%rsi), %xmm1 37; CHECK-NEXT: movq 80(%rsi), %rcx 38; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero 39; CHECK-NEXT: vmovss %xmm2, 88(%rdi) 40; CHECK-NEXT: movq %rcx, 80(%rdi) 41; CHECK-NEXT: vmovaps %xmm1, 64(%rdi) 42; CHECK-NEXT: vmovaps %zmm0, (%rdi) 43; CHECK-NEXT: vzeroupper 44; CHECK-NEXT: retq 45 %t0 = load <23 x float>, <23 x float>* %p, align 1 46 ret <23 x float> %t0 47} 48