1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK32 --check-prefix=X86 3; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK32 --check-prefix=SHLD 4; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK32 --check-prefix=BMI2 5; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK64 --check-prefix=X64 6; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK64 --check-prefix=SHLD64 7; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK64 --check-prefix=BMI264 8 9define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone { 10; CHECK32-LABEL: foo: 11; CHECK32: # %bb.0: # %entry 12; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl 13; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 14; CHECK32-NEXT: roll %cl, %eax 15; CHECK32-NEXT: retl 16; 17; CHECK64-LABEL: foo: 18; CHECK64: # %bb.0: # %entry 19; CHECK64-NEXT: movl %edx, %ecx 20; CHECK64-NEXT: movl %edi, %eax 21; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 22; CHECK64-NEXT: roll %cl, %eax 23; CHECK64-NEXT: retq 24entry: 25 %0 = shl i32 %x, %z 26 %1 = sub i32 32, %z 27 %2 = lshr i32 %x, %1 28 %3 = or i32 %2, %0 29 ret i32 %3 30} 31 32define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone { 33; CHECK32-LABEL: bar: 34; CHECK32: # %bb.0: # %entry 35; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl 36; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx 37; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 38; CHECK32-NEXT: shldl %cl, %edx, %eax 39; CHECK32-NEXT: retl 40; 41; CHECK64-LABEL: bar: 42; CHECK64: # %bb.0: # %entry 43; CHECK64-NEXT: movl %edx, %ecx 44; CHECK64-NEXT: movl %esi, %eax 45; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 46; CHECK64-NEXT: shldl %cl, %edi, %eax 47; CHECK64-NEXT: retq 48entry: 49 %0 = shl i32 %y, %z 50 %1 = sub i32 32, %z 51 %2 = lshr i32 %x, %1 52 %3 = or i32 %2, %0 53 ret i32 %3 54} 55 56define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone { 57; CHECK32-LABEL: un: 58; CHECK32: # %bb.0: # %entry 59; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl 60; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 61; CHECK32-NEXT: rorl %cl, %eax 62; CHECK32-NEXT: retl 63; 64; CHECK64-LABEL: un: 65; CHECK64: # %bb.0: # %entry 66; CHECK64-NEXT: movl %edx, %ecx 67; CHECK64-NEXT: movl %edi, %eax 68; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 69; CHECK64-NEXT: rorl %cl, %eax 70; CHECK64-NEXT: retq 71entry: 72 %0 = lshr i32 %x, %z 73 %1 = sub i32 32, %z 74 %2 = shl i32 %x, %1 75 %3 = or i32 %2, %0 76 ret i32 %3 77} 78 79define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone { 80; CHECK32-LABEL: bu: 81; CHECK32: # %bb.0: # %entry 82; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl 83; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx 84; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 85; CHECK32-NEXT: shrdl %cl, %edx, %eax 86; CHECK32-NEXT: retl 87; 88; CHECK64-LABEL: bu: 89; CHECK64: # %bb.0: # %entry 90; CHECK64-NEXT: movl %edx, %ecx 91; CHECK64-NEXT: movl %esi, %eax 92; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx 93; CHECK64-NEXT: shrdl %cl, %edi, %eax 94; CHECK64-NEXT: retq 95entry: 96 %0 = lshr i32 %y, %z 97 %1 = sub i32 32, %z 98 %2 = shl i32 %x, %1 99 %3 = or i32 %2, %0 100 ret i32 %3 101} 102 103define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone { 104; X86-LABEL: xfoo: 105; X86: # %bb.0: # %entry 106; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 107; X86-NEXT: roll $7, %eax 108; X86-NEXT: retl 109; 110; SHLD-LABEL: xfoo: 111; SHLD: # %bb.0: # %entry 112; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 113; SHLD-NEXT: shldl $7, %eax, %eax 114; SHLD-NEXT: retl 115; 116; BMI2-LABEL: xfoo: 117; BMI2: # %bb.0: # %entry 118; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax 119; BMI2-NEXT: retl 120; 121; X64-LABEL: xfoo: 122; X64: # %bb.0: # %entry 123; X64-NEXT: movl %edi, %eax 124; X64-NEXT: roll $7, %eax 125; X64-NEXT: retq 126; 127; SHLD64-LABEL: xfoo: 128; SHLD64: # %bb.0: # %entry 129; SHLD64-NEXT: movl %edi, %eax 130; SHLD64-NEXT: shldl $7, %eax, %eax 131; SHLD64-NEXT: retq 132; 133; BMI264-LABEL: xfoo: 134; BMI264: # %bb.0: # %entry 135; BMI264-NEXT: rorxl $25, %edi, %eax 136; BMI264-NEXT: retq 137entry: 138 %0 = lshr i32 %x, 25 139 %1 = shl i32 %x, 7 140 %2 = or i32 %0, %1 141 ret i32 %2 142} 143 144define i32 @xfoop(i32* %p) nounwind readnone { 145; X86-LABEL: xfoop: 146; X86: # %bb.0: # %entry 147; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 148; X86-NEXT: movl (%eax), %eax 149; X86-NEXT: roll $7, %eax 150; X86-NEXT: retl 151; 152; SHLD-LABEL: xfoop: 153; SHLD: # %bb.0: # %entry 154; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 155; SHLD-NEXT: movl (%eax), %eax 156; SHLD-NEXT: shldl $7, %eax, %eax 157; SHLD-NEXT: retl 158; 159; BMI2-LABEL: xfoop: 160; BMI2: # %bb.0: # %entry 161; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 162; BMI2-NEXT: rorxl $25, (%eax), %eax 163; BMI2-NEXT: retl 164; 165; X64-LABEL: xfoop: 166; X64: # %bb.0: # %entry 167; X64-NEXT: movl (%rdi), %eax 168; X64-NEXT: roll $7, %eax 169; X64-NEXT: retq 170; 171; SHLD64-LABEL: xfoop: 172; SHLD64: # %bb.0: # %entry 173; SHLD64-NEXT: movl (%rdi), %eax 174; SHLD64-NEXT: shldl $7, %eax, %eax 175; SHLD64-NEXT: retq 176; 177; BMI264-LABEL: xfoop: 178; BMI264: # %bb.0: # %entry 179; BMI264-NEXT: rorxl $25, (%rdi), %eax 180; BMI264-NEXT: retq 181entry: 182 %x = load i32, i32* %p 183 %a = lshr i32 %x, 25 184 %b = shl i32 %x, 7 185 %c = or i32 %a, %b 186 ret i32 %c 187} 188 189define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone { 190; CHECK32-LABEL: xbar: 191; CHECK32: # %bb.0: # %entry 192; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx 193; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 194; CHECK32-NEXT: shldl $7, %ecx, %eax 195; CHECK32-NEXT: retl 196; 197; CHECK64-LABEL: xbar: 198; CHECK64: # %bb.0: # %entry 199; CHECK64-NEXT: movl %edi, %eax 200; CHECK64-NEXT: shrdl $25, %esi, %eax 201; CHECK64-NEXT: retq 202entry: 203 %0 = shl i32 %y, 7 204 %1 = lshr i32 %x, 25 205 %2 = or i32 %0, %1 206 ret i32 %2 207} 208 209define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone { 210; X86-LABEL: xun: 211; X86: # %bb.0: # %entry 212; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 213; X86-NEXT: roll $25, %eax 214; X86-NEXT: retl 215; 216; SHLD-LABEL: xun: 217; SHLD: # %bb.0: # %entry 218; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 219; SHLD-NEXT: shldl $25, %eax, %eax 220; SHLD-NEXT: retl 221; 222; BMI2-LABEL: xun: 223; BMI2: # %bb.0: # %entry 224; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax 225; BMI2-NEXT: retl 226; 227; X64-LABEL: xun: 228; X64: # %bb.0: # %entry 229; X64-NEXT: movl %edi, %eax 230; X64-NEXT: roll $25, %eax 231; X64-NEXT: retq 232; 233; SHLD64-LABEL: xun: 234; SHLD64: # %bb.0: # %entry 235; SHLD64-NEXT: movl %edi, %eax 236; SHLD64-NEXT: shldl $25, %eax, %eax 237; SHLD64-NEXT: retq 238; 239; BMI264-LABEL: xun: 240; BMI264: # %bb.0: # %entry 241; BMI264-NEXT: rorxl $7, %edi, %eax 242; BMI264-NEXT: retq 243entry: 244 %0 = lshr i32 %x, 7 245 %1 = shl i32 %x, 25 246 %2 = or i32 %0, %1 247 ret i32 %2 248} 249 250define i32 @xunp(i32* %p) nounwind readnone { 251; X86-LABEL: xunp: 252; X86: # %bb.0: # %entry 253; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 254; X86-NEXT: movl (%eax), %eax 255; X86-NEXT: roll $25, %eax 256; X86-NEXT: retl 257; 258; SHLD-LABEL: xunp: 259; SHLD: # %bb.0: # %entry 260; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 261; SHLD-NEXT: movl (%eax), %eax 262; SHLD-NEXT: shldl $25, %eax, %eax 263; SHLD-NEXT: retl 264; 265; BMI2-LABEL: xunp: 266; BMI2: # %bb.0: # %entry 267; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 268; BMI2-NEXT: rorxl $7, (%eax), %eax 269; BMI2-NEXT: retl 270; 271; X64-LABEL: xunp: 272; X64: # %bb.0: # %entry 273; X64-NEXT: movl (%rdi), %eax 274; X64-NEXT: roll $25, %eax 275; X64-NEXT: retq 276; 277; SHLD64-LABEL: xunp: 278; SHLD64: # %bb.0: # %entry 279; SHLD64-NEXT: movl (%rdi), %eax 280; SHLD64-NEXT: shldl $25, %eax, %eax 281; SHLD64-NEXT: retq 282; 283; BMI264-LABEL: xunp: 284; BMI264: # %bb.0: # %entry 285; BMI264-NEXT: rorxl $7, (%rdi), %eax 286; BMI264-NEXT: retq 287entry: 288; shld-label: xunp: 289; shld: shldl $25 290 %x = load i32, i32* %p 291 %a = lshr i32 %x, 7 292 %b = shl i32 %x, 25 293 %c = or i32 %a, %b 294 ret i32 %c 295} 296 297define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone { 298; CHECK32-LABEL: xbu: 299; CHECK32: # %bb.0: # %entry 300; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx 301; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax 302; CHECK32-NEXT: shldl $25, %ecx, %eax 303; CHECK32-NEXT: retl 304; 305; CHECK64-LABEL: xbu: 306; CHECK64: # %bb.0: # %entry 307; CHECK64-NEXT: movl %edi, %eax 308; CHECK64-NEXT: shldl $25, %esi, %eax 309; CHECK64-NEXT: retq 310entry: 311 %0 = lshr i32 %y, 7 312 %1 = shl i32 %x, 25 313 %2 = or i32 %0, %1 314 ret i32 %2 315} 316 317define i32 @fshl(i32 %x) nounwind { 318; X86-LABEL: fshl: 319; X86: # %bb.0: 320; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 321; X86-NEXT: roll $7, %eax 322; X86-NEXT: retl 323; 324; SHLD-LABEL: fshl: 325; SHLD: # %bb.0: 326; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 327; SHLD-NEXT: shldl $7, %eax, %eax 328; SHLD-NEXT: retl 329; 330; BMI2-LABEL: fshl: 331; BMI2: # %bb.0: 332; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax 333; BMI2-NEXT: retl 334; 335; X64-LABEL: fshl: 336; X64: # %bb.0: 337; X64-NEXT: movl %edi, %eax 338; X64-NEXT: roll $7, %eax 339; X64-NEXT: retq 340; 341; SHLD64-LABEL: fshl: 342; SHLD64: # %bb.0: 343; SHLD64-NEXT: movl %edi, %eax 344; SHLD64-NEXT: shldl $7, %eax, %eax 345; SHLD64-NEXT: retq 346; 347; BMI264-LABEL: fshl: 348; BMI264: # %bb.0: 349; BMI264-NEXT: rorxl $25, %edi, %eax 350; BMI264-NEXT: retq 351 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 7) 352 ret i32 %f 353} 354declare i32 @llvm.fshl.i32(i32, i32, i32) 355 356define i32 @fshl1(i32 %x) nounwind { 357; X86-LABEL: fshl1: 358; X86: # %bb.0: 359; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 360; X86-NEXT: roll %eax 361; X86-NEXT: retl 362; 363; SHLD-LABEL: fshl1: 364; SHLD: # %bb.0: 365; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 366; SHLD-NEXT: shldl $1, %eax, %eax 367; SHLD-NEXT: retl 368; 369; BMI2-LABEL: fshl1: 370; BMI2: # %bb.0: 371; BMI2-NEXT: rorxl $31, {{[0-9]+}}(%esp), %eax 372; BMI2-NEXT: retl 373; 374; X64-LABEL: fshl1: 375; X64: # %bb.0: 376; X64-NEXT: movl %edi, %eax 377; X64-NEXT: roll %eax 378; X64-NEXT: retq 379; 380; SHLD64-LABEL: fshl1: 381; SHLD64: # %bb.0: 382; SHLD64-NEXT: movl %edi, %eax 383; SHLD64-NEXT: shldl $1, %eax, %eax 384; SHLD64-NEXT: retq 385; 386; BMI264-LABEL: fshl1: 387; BMI264: # %bb.0: 388; BMI264-NEXT: rorxl $31, %edi, %eax 389; BMI264-NEXT: retq 390 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 1) 391 ret i32 %f 392} 393 394define i32 @fshl31(i32 %x) nounwind { 395; X86-LABEL: fshl31: 396; X86: # %bb.0: 397; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 398; X86-NEXT: rorl %eax 399; X86-NEXT: retl 400; 401; SHLD-LABEL: fshl31: 402; SHLD: # %bb.0: 403; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 404; SHLD-NEXT: shldl $31, %eax, %eax 405; SHLD-NEXT: retl 406; 407; BMI2-LABEL: fshl31: 408; BMI2: # %bb.0: 409; BMI2-NEXT: rorxl $1, {{[0-9]+}}(%esp), %eax 410; BMI2-NEXT: retl 411; 412; X64-LABEL: fshl31: 413; X64: # %bb.0: 414; X64-NEXT: movl %edi, %eax 415; X64-NEXT: rorl %eax 416; X64-NEXT: retq 417; 418; SHLD64-LABEL: fshl31: 419; SHLD64: # %bb.0: 420; SHLD64-NEXT: movl %edi, %eax 421; SHLD64-NEXT: shldl $31, %eax, %eax 422; SHLD64-NEXT: retq 423; 424; BMI264-LABEL: fshl31: 425; BMI264: # %bb.0: 426; BMI264-NEXT: rorxl $1, %edi, %eax 427; BMI264-NEXT: retq 428 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 31) 429 ret i32 %f 430} 431 432define i32 @fshl_load(i32* %p) nounwind { 433; X86-LABEL: fshl_load: 434; X86: # %bb.0: 435; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 436; X86-NEXT: movl (%eax), %eax 437; X86-NEXT: roll $7, %eax 438; X86-NEXT: retl 439; 440; SHLD-LABEL: fshl_load: 441; SHLD: # %bb.0: 442; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 443; SHLD-NEXT: movl (%eax), %eax 444; SHLD-NEXT: shldl $7, %eax, %eax 445; SHLD-NEXT: retl 446; 447; BMI2-LABEL: fshl_load: 448; BMI2: # %bb.0: 449; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 450; BMI2-NEXT: rorxl $25, (%eax), %eax 451; BMI2-NEXT: retl 452; 453; X64-LABEL: fshl_load: 454; X64: # %bb.0: 455; X64-NEXT: movl (%rdi), %eax 456; X64-NEXT: roll $7, %eax 457; X64-NEXT: retq 458; 459; SHLD64-LABEL: fshl_load: 460; SHLD64: # %bb.0: 461; SHLD64-NEXT: movl (%rdi), %eax 462; SHLD64-NEXT: shldl $7, %eax, %eax 463; SHLD64-NEXT: retq 464; 465; BMI264-LABEL: fshl_load: 466; BMI264: # %bb.0: 467; BMI264-NEXT: rorxl $25, (%rdi), %eax 468; BMI264-NEXT: retq 469 %x = load i32, i32* %p 470 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 7) 471 ret i32 %f 472} 473 474define i32 @fshr(i32 %x) nounwind { 475; X86-LABEL: fshr: 476; X86: # %bb.0: 477; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 478; X86-NEXT: rorl $7, %eax 479; X86-NEXT: retl 480; 481; SHLD-LABEL: fshr: 482; SHLD: # %bb.0: 483; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 484; SHLD-NEXT: shrdl $7, %eax, %eax 485; SHLD-NEXT: retl 486; 487; BMI2-LABEL: fshr: 488; BMI2: # %bb.0: 489; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax 490; BMI2-NEXT: retl 491; 492; X64-LABEL: fshr: 493; X64: # %bb.0: 494; X64-NEXT: movl %edi, %eax 495; X64-NEXT: rorl $7, %eax 496; X64-NEXT: retq 497; 498; SHLD64-LABEL: fshr: 499; SHLD64: # %bb.0: 500; SHLD64-NEXT: movl %edi, %eax 501; SHLD64-NEXT: shrdl $7, %eax, %eax 502; SHLD64-NEXT: retq 503; 504; BMI264-LABEL: fshr: 505; BMI264: # %bb.0: 506; BMI264-NEXT: rorxl $7, %edi, %eax 507; BMI264-NEXT: retq 508 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 7) 509 ret i32 %f 510} 511declare i32 @llvm.fshr.i32(i32, i32, i32) 512 513define i32 @fshr1(i32 %x) nounwind { 514; X86-LABEL: fshr1: 515; X86: # %bb.0: 516; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 517; X86-NEXT: rorl %eax 518; X86-NEXT: retl 519; 520; SHLD-LABEL: fshr1: 521; SHLD: # %bb.0: 522; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 523; SHLD-NEXT: shrdl $1, %eax, %eax 524; SHLD-NEXT: retl 525; 526; BMI2-LABEL: fshr1: 527; BMI2: # %bb.0: 528; BMI2-NEXT: rorxl $1, {{[0-9]+}}(%esp), %eax 529; BMI2-NEXT: retl 530; 531; X64-LABEL: fshr1: 532; X64: # %bb.0: 533; X64-NEXT: movl %edi, %eax 534; X64-NEXT: rorl %eax 535; X64-NEXT: retq 536; 537; SHLD64-LABEL: fshr1: 538; SHLD64: # %bb.0: 539; SHLD64-NEXT: movl %edi, %eax 540; SHLD64-NEXT: shrdl $1, %eax, %eax 541; SHLD64-NEXT: retq 542; 543; BMI264-LABEL: fshr1: 544; BMI264: # %bb.0: 545; BMI264-NEXT: rorxl $1, %edi, %eax 546; BMI264-NEXT: retq 547 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 1) 548 ret i32 %f 549} 550 551define i32 @fshr31(i32 %x) nounwind { 552; X86-LABEL: fshr31: 553; X86: # %bb.0: 554; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 555; X86-NEXT: roll %eax 556; X86-NEXT: retl 557; 558; SHLD-LABEL: fshr31: 559; SHLD: # %bb.0: 560; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 561; SHLD-NEXT: shrdl $31, %eax, %eax 562; SHLD-NEXT: retl 563; 564; BMI2-LABEL: fshr31: 565; BMI2: # %bb.0: 566; BMI2-NEXT: rorxl $31, {{[0-9]+}}(%esp), %eax 567; BMI2-NEXT: retl 568; 569; X64-LABEL: fshr31: 570; X64: # %bb.0: 571; X64-NEXT: movl %edi, %eax 572; X64-NEXT: roll %eax 573; X64-NEXT: retq 574; 575; SHLD64-LABEL: fshr31: 576; SHLD64: # %bb.0: 577; SHLD64-NEXT: movl %edi, %eax 578; SHLD64-NEXT: shrdl $31, %eax, %eax 579; SHLD64-NEXT: retq 580; 581; BMI264-LABEL: fshr31: 582; BMI264: # %bb.0: 583; BMI264-NEXT: rorxl $31, %edi, %eax 584; BMI264-NEXT: retq 585 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 31) 586 ret i32 %f 587} 588 589define i32 @fshr_load(i32* %p) nounwind { 590; X86-LABEL: fshr_load: 591; X86: # %bb.0: 592; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 593; X86-NEXT: movl (%eax), %eax 594; X86-NEXT: rorl $7, %eax 595; X86-NEXT: retl 596; 597; SHLD-LABEL: fshr_load: 598; SHLD: # %bb.0: 599; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 600; SHLD-NEXT: movl (%eax), %eax 601; SHLD-NEXT: shrdl $7, %eax, %eax 602; SHLD-NEXT: retl 603; 604; BMI2-LABEL: fshr_load: 605; BMI2: # %bb.0: 606; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 607; BMI2-NEXT: rorxl $7, (%eax), %eax 608; BMI2-NEXT: retl 609; 610; X64-LABEL: fshr_load: 611; X64: # %bb.0: 612; X64-NEXT: movl (%rdi), %eax 613; X64-NEXT: rorl $7, %eax 614; X64-NEXT: retq 615; 616; SHLD64-LABEL: fshr_load: 617; SHLD64: # %bb.0: 618; SHLD64-NEXT: movl (%rdi), %eax 619; SHLD64-NEXT: shrdl $7, %eax, %eax 620; SHLD64-NEXT: retq 621; 622; BMI264-LABEL: fshr_load: 623; BMI264: # %bb.0: 624; BMI264-NEXT: rorxl $7, (%rdi), %eax 625; BMI264-NEXT: retq 626 %x = load i32, i32* %p 627 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 7) 628 ret i32 %f 629} 630