1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3 4; Vary the operand sizes for extra coverage, but the transform should be identical in all cases. 5 6; (X == 0) ? 0 : -1 --> (X == 0) - 1 7 8define i8 @i8_select_0_or_neg1(i8 %x) { 9; CHECK-LABEL: i8_select_0_or_neg1: 10; CHECK: # %bb.0: 11; CHECK-NEXT: negb %dil 12; CHECK-NEXT: sbbl %eax, %eax 13; CHECK-NEXT: # kill: def $al killed $al killed $eax 14; CHECK-NEXT: retq 15 %cmp = icmp eq i8 %x, 0 16 %sel = select i1 %cmp, i8 0, i8 -1 17 ret i8 %sel 18} 19 20; (X == 0) ? 0 : -1 --> (X == 0) - 1 21 22define i16 @i16_select_0_or_neg1_as_math(i16 %x) { 23; CHECK-LABEL: i16_select_0_or_neg1_as_math: 24; CHECK: # %bb.0: 25; CHECK-NEXT: negw %di 26; CHECK-NEXT: sbbl %eax, %eax 27; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 28; CHECK-NEXT: retq 29 %cmp = icmp eq i16 %x, 0 30 %ext = zext i1 %cmp to i16 31 %add = add i16 %ext, -1 32 ret i16 %add 33} 34 35; (X != 0) ? -1 : 0 --> 0 - (X != 0) 36 37define i32 @i32_select_0_or_neg1_commuted(i32 %x) { 38; CHECK-LABEL: i32_select_0_or_neg1_commuted: 39; CHECK: # %bb.0: 40; CHECK-NEXT: negl %edi 41; CHECK-NEXT: sbbl %eax, %eax 42; CHECK-NEXT: retq 43 %cmp = icmp ne i32 %x, 0 44 %sel = select i1 %cmp, i32 -1, i32 0 45 ret i32 %sel 46} 47 48; (X != 0) ? -1 : 0 --> 0 - (X != 0) 49 50define i64 @i64_select_0_or_neg1_commuted_as_math(i64 %x) { 51; CHECK-LABEL: i64_select_0_or_neg1_commuted_as_math: 52; CHECK: # %bb.0: 53; CHECK-NEXT: negq %rdi 54; CHECK-NEXT: sbbq %rax, %rax 55; CHECK-NEXT: retq 56 %cmp = icmp ne i64 %x, 0 57 %ext = zext i1 %cmp to i64 58 %sub = sub i64 0, %ext 59 ret i64 %sub 60} 61 62; (X == 0) ? -1 : 0 --> 0 - (X == 0) 63 64define i64 @i64_select_neg1_or_0(i64 %x) { 65; CHECK-LABEL: i64_select_neg1_or_0: 66; CHECK: # %bb.0: 67; CHECK-NEXT: cmpq $1, %rdi 68; CHECK-NEXT: sbbq %rax, %rax 69; CHECK-NEXT: retq 70 %cmp = icmp eq i64 %x, 0 71 %sel = select i1 %cmp, i64 -1, i64 0 72 ret i64 %sel 73} 74 75; (X == 0) ? -1 : 0 --> 0 - (X == 0) 76 77define i32 @i32_select_neg1_or_0_as_math(i32 %x) { 78; CHECK-LABEL: i32_select_neg1_or_0_as_math: 79; CHECK: # %bb.0: 80; CHECK-NEXT: cmpl $1, %edi 81; CHECK-NEXT: sbbl %eax, %eax 82; CHECK-NEXT: retq 83 %cmp = icmp eq i32 %x, 0 84 %ext = zext i1 %cmp to i32 85 %sub = sub i32 0, %ext 86 ret i32 %sub 87} 88 89; (X != 0) ? 0 : -1 --> (X != 0) - 1 90 91define i16 @i16_select_neg1_or_0_commuted(i16 %x) { 92; CHECK-LABEL: i16_select_neg1_or_0_commuted: 93; CHECK: # %bb.0: 94; CHECK-NEXT: cmpw $1, %di 95; CHECK-NEXT: sbbl %eax, %eax 96; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 97; CHECK-NEXT: retq 98 %cmp = icmp ne i16 %x, 0 99 %sel = select i1 %cmp, i16 0, i16 -1 100 ret i16 %sel 101} 102 103; (X != 0) ? 0 : -1 --> (X != 0) - 1 104 105define i8 @i8_select_neg1_or_0_commuted_as_math(i8 %x) { 106; CHECK-LABEL: i8_select_neg1_or_0_commuted_as_math: 107; CHECK: # %bb.0: 108; CHECK-NEXT: cmpb $1, %dil 109; CHECK-NEXT: sbbl %eax, %eax 110; CHECK-NEXT: # kill: def $al killed $al killed $eax 111; CHECK-NEXT: retq 112 %cmp = icmp ne i8 %x, 0 113 %ext = zext i1 %cmp to i8 114 %add = add i8 %ext, -1 115 ret i8 %add 116} 117 118; (X <u Y) ? -1 : 0 --> cmp, sbb 119 120define i32 @ult_select_neg1_or_0(i32 %x, i32 %y) nounwind { 121; CHECK-LABEL: ult_select_neg1_or_0: 122; CHECK: # %bb.0: 123; CHECK-NEXT: cmpl %esi, %edi 124; CHECK-NEXT: sbbl %eax, %eax 125; CHECK-NEXT: retq 126 %cmp = icmp ult i32 %x, %y 127 %ext = sext i1 %cmp to i32 128 ret i32 %ext 129} 130 131; Swap the predicate and compare operands: 132; (Y >u X) ? -1 : 0 --> cmp, sbb 133 134define i32 @ugt_select_neg1_or_0(i32 %x, i32 %y) nounwind { 135; CHECK-LABEL: ugt_select_neg1_or_0: 136; CHECK: # %bb.0: 137; CHECK-NEXT: cmpl %esi, %edi 138; CHECK-NEXT: sbbl %eax, %eax 139; CHECK-NEXT: retq 140 %cmp = icmp ugt i32 %y, %x 141 %ext = sext i1 %cmp to i32 142 ret i32 %ext 143} 144 145; Invert the predicate and effectively swap the select operands: 146; (X >=u Y) ? 0 : -1 --> (X <u Y) ? -1 : 0 --> cmp, sbb 147 148define i32 @uge_select_0_or_neg1(i32 %x, i32 %y) nounwind { 149; CHECK-LABEL: uge_select_0_or_neg1: 150; CHECK: # %bb.0: 151; CHECK-NEXT: cmpl %esi, %edi 152; CHECK-NEXT: sbbl %eax, %eax 153; CHECK-NEXT: retq 154 %cmp = icmp uge i32 %x, %y 155 %ext = zext i1 %cmp to i32 156 %add = add i32 %ext, -1 157 ret i32 %add 158} 159 160; Swap the predicate and compare operands: 161; (Y <=u X) ? 0 : -1 --> (X <u Y) ? -1 : 0 --> cmp, sbb 162 163define i32 @ule_select_0_or_neg1(i32 %x, i32 %y) nounwind { 164; CHECK-LABEL: ule_select_0_or_neg1: 165; CHECK: # %bb.0: 166; CHECK-NEXT: cmpl %esi, %edi 167; CHECK-NEXT: sbbl %eax, %eax 168; CHECK-NEXT: retq 169 %cmp = icmp ule i32 %y, %x 170 %ext = zext i1 %cmp to i32 171 %add = add i32 %ext, -1 172 ret i32 %add 173} 174 175; Verify that subtract with constant is the same thing. 176; (X >=u Y) ? 0 : -1 --> (X <u Y) ? -1 : 0 --> cmp, sbb 177 178define i32 @uge_select_0_or_neg1_sub(i32 %x, i32 %y) nounwind { 179; CHECK-LABEL: uge_select_0_or_neg1_sub: 180; CHECK: # %bb.0: 181; CHECK-NEXT: cmpl %esi, %edi 182; CHECK-NEXT: sbbl %eax, %eax 183; CHECK-NEXT: retq 184 %cmp = icmp uge i32 %x, %y 185 %ext = zext i1 %cmp to i32 186 %sub = sub i32 %ext, 1 187 ret i32 %sub 188} 189 190; Check more sub-from-zero patterns. 191; (X >u Y) ? -1 : 0 --> cmp, sbb 192 193define i64 @ugt_select_neg1_or_0_sub(i64 %x, i64 %y) nounwind { 194; CHECK-LABEL: ugt_select_neg1_or_0_sub: 195; CHECK: # %bb.0: 196; CHECK-NEXT: cmpq %rdi, %rsi 197; CHECK-NEXT: sbbq %rax, %rax 198; CHECK-NEXT: retq 199 %cmp = icmp ugt i64 %x, %y 200 %zext = zext i1 %cmp to i64 201 %sub = sub i64 0, %zext 202 ret i64 %sub 203} 204 205; Swap the predicate and compare operands: 206; (Y <u X) ? -1 : 0 --> cmp, sbb 207 208define i16 @ult_select_neg1_or_0_sub(i16 %x, i16 %y) nounwind { 209; CHECK-LABEL: ult_select_neg1_or_0_sub: 210; CHECK: # %bb.0: 211; CHECK-NEXT: cmpw %di, %si 212; CHECK-NEXT: sbbl %eax, %eax 213; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 214; CHECK-NEXT: retq 215 %cmp = icmp ult i16 %y, %x 216 %zext = zext i1 %cmp to i16 217 %sub = sub i16 0, %zext 218 ret i16 %sub 219} 220 221 222 223; Make sure we're creating nodes with the right value types. This would crash. 224; https://bugs.llvm.org/show_bug.cgi?id=33560 225 226define void @PR33560(i8 %x, i64 %y) { 227; CHECK-LABEL: PR33560: 228; CHECK: # %bb.0: # %entry 229; CHECK-NEXT: negb %dil 230; CHECK-NEXT: sbbq %rax, %rax 231; CHECK-NEXT: cmpq %rsi, %rax 232; CHECK-NEXT: retq 233entry: 234 %cmp1 = icmp eq i8 %x, 0 235 %ext = zext i1 %cmp1 to i64 236 %add = add i64 %ext, -1 237 %cmp2 = icmp eq i64 %add, %y 238 br i1 %cmp2, label %end, label %else 239 240else: 241 %tmp7 = zext i1 %cmp1 to i8 242 br label %end 243 244end: 245 ret void 246} 247 248; Cases for PR45700 249define i32 @ult_zext_add(i32 %0, i32 %1, i32 %2) { 250; CHECK-LABEL: ult_zext_add: 251; CHECK: # %bb.0: 252; CHECK-NEXT: movl %edi, %eax 253; CHECK-NEXT: cmpl %edx, %esi 254; CHECK-NEXT: adcl $0, %eax 255; CHECK-NEXT: retq 256 %4 = icmp ult i32 %1, %2 257 %5 = zext i1 %4 to i32 258 %6 = add nsw i32 %5, %0 259 ret i32 %6 260} 261 262define i32 @ule_zext_add(i32 %0, i32 %1, i32 %2) { 263; CHECK-LABEL: ule_zext_add: 264; CHECK: # %bb.0: 265; CHECK-NEXT: movl %edi, %eax 266; CHECK-NEXT: cmpl %esi, %edx 267; CHECK-NEXT: sbbl $-1, %eax 268; CHECK-NEXT: retq 269 %4 = icmp ule i32 %1, %2 270 %5 = zext i1 %4 to i32 271 %6 = add nsw i32 %5, %0 272 ret i32 %6 273} 274 275define i32 @ugt_zext_add(i32 %0, i32 %1, i32 %2) { 276; CHECK-LABEL: ugt_zext_add: 277; CHECK: # %bb.0: 278; CHECK-NEXT: movl %edi, %eax 279; CHECK-NEXT: cmpl %esi, %edx 280; CHECK-NEXT: adcl $0, %eax 281; CHECK-NEXT: retq 282 %4 = icmp ugt i32 %1, %2 283 %5 = zext i1 %4 to i32 284 %6 = add nsw i32 %5, %0 285 ret i32 %6 286} 287 288define i32 @uge_zext_add(i32 %0, i32 %1, i32 %2) { 289; CHECK-LABEL: uge_zext_add: 290; CHECK: # %bb.0: 291; CHECK-NEXT: movl %edi, %eax 292; CHECK-NEXT: cmpl %edx, %esi 293; CHECK-NEXT: sbbl $-1, %eax 294; CHECK-NEXT: retq 295 %4 = icmp uge i32 %1, %2 296 %5 = zext i1 %4 to i32 297 %6 = add nsw i32 %5, %0 298 ret i32 %6 299} 300 301define i32 @ult_sext_add(i32 %0, i32 %1, i32 %2) { 302; CHECK-LABEL: ult_sext_add: 303; CHECK: # %bb.0: 304; CHECK-NEXT: movl %edi, %eax 305; CHECK-NEXT: cmpl %edx, %esi 306; CHECK-NEXT: sbbl $0, %eax 307; CHECK-NEXT: retq 308 %4 = icmp ult i32 %1, %2 309 %5 = sext i1 %4 to i32 310 %6 = add nsw i32 %5, %0 311 ret i32 %6 312} 313 314define i32 @ule_sext_add(i32 %0, i32 %1, i32 %2) { 315; CHECK-LABEL: ule_sext_add: 316; CHECK: # %bb.0: 317; CHECK-NEXT: movl %edi, %eax 318; CHECK-NEXT: cmpl %esi, %edx 319; CHECK-NEXT: adcl $-1, %eax 320; CHECK-NEXT: retq 321 %4 = icmp ule i32 %1, %2 322 %5 = sext i1 %4 to i32 323 %6 = add nsw i32 %5, %0 324 ret i32 %6 325} 326 327define i32 @ugt_sext_add(i32 %0, i32 %1, i32 %2) { 328; CHECK-LABEL: ugt_sext_add: 329; CHECK: # %bb.0: 330; CHECK-NEXT: movl %edi, %eax 331; CHECK-NEXT: cmpl %esi, %edx 332; CHECK-NEXT: sbbl $0, %eax 333; CHECK-NEXT: retq 334 %4 = icmp ugt i32 %1, %2 335 %5 = sext i1 %4 to i32 336 %6 = add nsw i32 %5, %0 337 ret i32 %6 338} 339 340define i32 @uge_sext_add(i32 %0, i32 %1, i32 %2) { 341; CHECK-LABEL: uge_sext_add: 342; CHECK: # %bb.0: 343; CHECK-NEXT: movl %edi, %eax 344; CHECK-NEXT: cmpl %edx, %esi 345; CHECK-NEXT: adcl $-1, %eax 346; CHECK-NEXT: retq 347 %4 = icmp uge i32 %1, %2 348 %5 = sext i1 %4 to i32 349 %6 = add nsw i32 %5, %0 350 ret i32 %6 351} 352