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1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx                                   | FileCheck -check-prefix=PATCH %s
3;
4; Note: Print verbose stackmaps using -debug-only=stackmaps.
5
6; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
7; CHECK-NEXT:   __LLVM_StackMaps:
8; Header
9; CHECK-NEXT:   .byte 3
10; CHECK-NEXT:   .byte 0
11; CHECK-NEXT:   .short 0
12; Num Functions
13; CHECK-NEXT:   .long 2
14; Num LargeConstants
15; CHECK-NEXT:   .long   0
16; Num Callsites
17; CHECK-NEXT:   .long   5
18
19; Functions and stack size
20; CHECK-NEXT:   .quad _stackmap_liveness
21; CHECK-NEXT:   .quad 8
22; CHECK-NEXT:   .quad 3
23; CHECK-NEXT:   .quad _mixed_liveness
24; CHECK-NEXT:   .quad 8
25; CHECK-NEXT:   .quad 2
26
27define void @stackmap_liveness() {
28entry:
29  %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
30; StackMap 1 (no liveness information available)
31; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
32; CHECK-NEXT:   .short  0
33; CHECK-NEXT:   .short  0
34; Padding
35; CHECK-NEXT:   .p2align 3
36; CHECK-NEXT:   .short  0
37; Num LiveOut Entries: 0
38; CHECK-NEXT:   .short  0
39; Align
40; CHECK-NEXT:   .p2align  3
41
42; StackMap 1 (patchpoint liveness information enabled)
43; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
44; PATCH-NEXT:   .short  0
45; PATCH-NEXT:   .short  0
46; Padding
47; PATCH-NEXT:   .p2align  3
48; PATCH-NEXT:   .short  0
49; Num LiveOut Entries: 1
50; PATCH-NEXT:   .short  1
51; LiveOut Entry 1: %ymm2 (16 bytes) --> %xmm2
52; PATCH-NEXT:   .short  19
53; PATCH-NEXT:   .byte 0
54; PATCH-NEXT:   .byte 16
55; Align
56; PATCH-NEXT:   .p2align  3
57  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0)
58  %a2 = call i64 asm sideeffect "", "={r8}"() nounwind
59  %a3 = call i8 asm sideeffect "", "={ah}"() nounwind
60  %a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind
61  %a5 = call <4 x double> asm sideeffect "", "={ymm1}"() nounwind
62
63; StackMap 2 (no liveness information available)
64; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
65; CHECK-NEXT:   .short  0
66; CHECK-NEXT:   .short  0
67; Padding
68; CHECK-NEXT:   .p2align  3
69; CHECK-NEXT:   .short  0
70; Num LiveOut Entries: 0
71; CHECK-NEXT:   .short  0
72; Align
73; CHECK-NEXT:   .p2align  3
74
75; StackMap 2 (patchpoint liveness information enabled)
76; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
77; PATCH-NEXT:   .short  0
78; PATCH-NEXT:   .short  0
79; Padding
80; PATCH-NEXT:   .p2align  3
81; PATCH-NEXT:   .short  0
82; Num LiveOut Entries: 5
83; PATCH-NEXT:   .short  5
84; LiveOut Entry 1: %rax (1 bytes) --> %al or %ah
85; PATCH-NEXT:   .short  0
86; PATCH-NEXT:   .byte 0
87; PATCH-NEXT:   .byte 1
88; LiveOut Entry 2: %r8 (8 bytes)
89; PATCH-NEXT:   .short  8
90; PATCH-NEXT:   .byte 0
91; PATCH-NEXT:   .byte 8
92; LiveOut Entry 3: %ymm0 (32 bytes)
93; PATCH-NEXT:   .short  17
94; PATCH-NEXT:   .byte 0
95; PATCH-NEXT:   .byte 32
96; LiveOut Entry 4: %ymm1 (32 bytes)
97; PATCH-NEXT:   .short  18
98; PATCH-NEXT:   .byte 0
99; PATCH-NEXT:   .byte 32
100; LiveOut Entry 5: %ymm2 (16 bytes) --> %xmm2
101; PATCH-NEXT:   .short  19
102; PATCH-NEXT:   .byte 0
103; PATCH-NEXT:   .byte 16
104; Align
105; PATCH-NEXT:   .p2align  3
106  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0)
107  call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind
108
109; StackMap 3 (no liveness information available)
110; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
111; CHECK-NEXT:   .short  0
112; CHECK-NEXT:   .short  0
113; Padding
114; CHECK-NEXT:   .p2align  3
115; CHECK-NEXT:   .short  0
116; Num LiveOut Entries: 0
117; CHECK-NEXT:   .short  0
118; Align
119; CHECK-NEXT:   .p2align  3
120
121; StackMap 3 (patchpoint liveness information enabled)
122; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
123; PATCH-NEXT:   .short  0
124; PATCH-NEXT:   .short  0
125; Padding
126; PATCH-NEXT:   .p2align  3
127; PATCH-NEXT:   .short  0
128; Num LiveOut Entries: 2
129; PATCH-NEXT:   .short  2
130; LiveOut Entry 1: %rsp (8 bytes)
131; PATCH-NEXT:   .short  7
132; PATCH-NEXT:   .byte 0
133; PATCH-NEXT:   .byte 8
134; LiveOut Entry 2: %ymm2 (16 bytes) --> %xmm2
135; PATCH-NEXT:   .short  19
136; PATCH-NEXT:   .byte 0
137; PATCH-NEXT:   .byte 16
138; Align
139; PATCH-NEXT:   .p2align  3
140  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0)
141  call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
142  ret void
143}
144
145define void @mixed_liveness() {
146entry:
147  %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
148; StackMap 4 (patchpoint liveness information enabled)
149; PATCH-LABEL:  .long L{{.*}}-_mixed_liveness
150; PATCH-NEXT:   .short  0
151; PATCH-NEXT:   .short  0
152; Padding
153; PATCH-NEXT:   .p2align  3
154; PATCH-NEXT:   .short  0
155; Num LiveOut Entries: 0
156; PATCH-NEXT:   .short  0
157; Align
158; PATCH-NEXT:   .p2align  3
159
160; StackMap 5 (patchpoint liveness information enabled)
161; PATCH-LABEL:  .long L{{.*}}-_mixed_liveness
162; PATCH-NEXT:   .short  0
163; PATCH-NEXT:   .short  0
164; Padding
165; PATCH-NEXT:   .p2align  3
166; PATCH-NEXT:   .short  0
167; Num LiveOut Entries: 2
168; PATCH-NEXT:   .short  2
169; LiveOut Entry 1: %rsp (8 bytes)
170; PATCH-NEXT:   .short  7
171; PATCH-NEXT:   .byte 0
172; PATCH-NEXT:   .byte 8
173; LiveOut Entry 2: %ymm2 (16 bytes) --> %xmm2
174; PATCH-NEXT:   .short  19
175; PATCH-NEXT:   .byte 0
176; PATCH-NEXT:   .byte 16
177; Align
178; PATCH-NEXT:   .p2align  3
179  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 5)
180  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 5, i32 0, i8* null, i32 0)
181  call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
182  ret void
183}
184
185declare void @llvm.experimental.stackmap(i64, i32, ...)
186declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
187