1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64 4 5declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) 6 7define zeroext i1 @a(i32 %x) nounwind { 8; X86-LABEL: a: 9; X86: # %bb.0: 10; X86-NEXT: movl $3, %eax 11; X86-NEXT: mull {{[0-9]+}}(%esp) 12; X86-NEXT: seto %al 13; X86-NEXT: retl 14; 15; X64-LABEL: a: 16; X64: # %bb.0: 17; X64-NEXT: movl %edi, %eax 18; X64-NEXT: movl $3, %ecx 19; X64-NEXT: mull %ecx 20; X64-NEXT: seto %al 21; X64-NEXT: retq 22 %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3) 23 %obil = extractvalue {i32, i1} %res, 1 24 ret i1 %obil 25} 26 27define i32 @test2(i32 %a, i32 %b) nounwind readnone { 28; X86-LABEL: test2: 29; X86: # %bb.0: # %entry 30; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 31; X86-NEXT: addl {{[0-9]+}}(%esp), %eax 32; X86-NEXT: addl %eax, %eax 33; X86-NEXT: retl 34; 35; X64-LABEL: test2: 36; X64: # %bb.0: # %entry 37; X64-NEXT: # kill: def $edi killed $edi def $rdi 38; X64-NEXT: addl %esi, %edi 39; X64-NEXT: leal (%rdi,%rdi), %eax 40; X64-NEXT: retq 41entry: 42 %tmp0 = add i32 %b, %a 43 %tmp1 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %tmp0, i32 2) 44 %tmp2 = extractvalue { i32, i1 } %tmp1, 0 45 ret i32 %tmp2 46} 47 48define i32 @test3(i32 %a, i32 %b) nounwind readnone { 49; X86-LABEL: test3: 50; X86: # %bb.0: # %entry 51; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 52; X86-NEXT: addl {{[0-9]+}}(%esp), %eax 53; X86-NEXT: movl $4, %ecx 54; X86-NEXT: mull %ecx 55; X86-NEXT: retl 56; 57; X64-LABEL: test3: 58; X64: # %bb.0: # %entry 59; X64-NEXT: # kill: def $esi killed $esi def $rsi 60; X64-NEXT: # kill: def $edi killed $edi def $rdi 61; X64-NEXT: leal (%rdi,%rsi), %eax 62; X64-NEXT: movl $4, %ecx 63; X64-NEXT: mull %ecx 64; X64-NEXT: retq 65entry: 66 %tmp0 = add i32 %b, %a 67 %tmp1 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %tmp0, i32 4) 68 %tmp2 = extractvalue { i32, i1 } %tmp1, 0 69 ret i32 %tmp2 70} 71 72; Check that shifts larger than the shift amount type are handled. 73; Intentionally not testing codegen here, only that this doesn't assert. 74declare {i300, i1} @llvm.umul.with.overflow.i300(i300 %a, i300 %b) 75define i300 @test4(i300 %a, i300 %b) nounwind { 76 %x = call {i300, i1} @llvm.umul.with.overflow.i300(i300 %a, i300 %b) 77 %y = extractvalue {i300, i1} %x, 0 78 ret i300 %y 79} 80