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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,+ssse3 | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3 | FileCheck %s --check-prefix=X64
4
5; There are no MMX operations in @t1
6
7define void  @t1(i32 %a, x86_mmx* %P) nounwind {
8; X32-LABEL: t1:
9; X32:       # %bb.0:
10; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
11; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
12; X32-NEXT:    shll $12, %ecx
13; X32-NEXT:    movd %ecx, %xmm0
14; X32-NEXT:    psllq $32, %xmm0
15; X32-NEXT:    movq %xmm0, (%eax)
16; X32-NEXT:    retl
17;
18; X64-LABEL: t1:
19; X64:       # %bb.0:
20; X64-NEXT:    shll $12, %edi
21; X64-NEXT:    movd %edi, %xmm0
22; X64-NEXT:    psllq $32, %xmm0
23; X64-NEXT:    movq %xmm0, (%rsi)
24; X64-NEXT:    retq
25 %tmp12 = shl i32 %a, 12
26 %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1
27 %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0
28 %tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx
29 store x86_mmx %tmp23, x86_mmx* %P
30 ret void
31}
32
33define <4 x float> @t2(<4 x float>* %P) nounwind {
34; X32-LABEL: t2:
35; X32:       # %bb.0:
36; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
37; X32-NEXT:    xorps %xmm0, %xmm0
38; X32-NEXT:    xorps %xmm1, %xmm1
39; X32-NEXT:    unpcklpd {{.*#+}} xmm1 = xmm1[0],mem[0]
40; X32-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
41; X32-NEXT:    retl
42;
43; X64-LABEL: t2:
44; X64:       # %bb.0:
45; X64-NEXT:    xorps %xmm0, %xmm0
46; X64-NEXT:    xorps %xmm1, %xmm1
47; X64-NEXT:    unpcklpd {{.*#+}} xmm1 = xmm1[0],mem[0]
48; X64-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
49; X64-NEXT:    retq
50  %tmp1 = load <4 x float>, <4 x float>* %P
51  %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
52  ret <4 x float> %tmp2
53}
54
55define <4 x float> @t3(<4 x float>* %P) nounwind {
56; X32-LABEL: t3:
57; X32:       # %bb.0:
58; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
59; X32-NEXT:    xorps %xmm0, %xmm0
60; X32-NEXT:    movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
61; X32-NEXT:    retl
62;
63; X64-LABEL: t3:
64; X64:       # %bb.0:
65; X64-NEXT:    xorps %xmm0, %xmm0
66; X64-NEXT:    movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
67; X64-NEXT:    retq
68  %tmp1 = load <4 x float>, <4 x float>* %P
69  %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
70  ret <4 x float> %tmp2
71}
72
73define <4 x float> @t4(<4 x float>* %P) nounwind {
74; X32-LABEL: t4:
75; X32:       # %bb.0:
76; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
77; X32-NEXT:    xorps %xmm1, %xmm1
78; X32-NEXT:    xorps %xmm0, %xmm0
79; X32-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,0],mem[3,0]
80; X32-NEXT:    shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
81; X32-NEXT:    retl
82;
83; X64-LABEL: t4:
84; X64:       # %bb.0:
85; X64-NEXT:    xorps %xmm1, %xmm1
86; X64-NEXT:    xorps %xmm0, %xmm0
87; X64-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,0],mem[3,0]
88; X64-NEXT:    shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
89; X64-NEXT:    retq
90  %tmp1 = load <4 x float>, <4 x float>* %P
91  %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >
92  ret <4 x float> %tmp2
93}
94
95define <16 x i8> @t5(<16 x i8> %x) nounwind {
96; X32-LABEL: t5:
97; X32:       # %bb.0:
98; X32-NEXT:    psrlw $8, %xmm0
99; X32-NEXT:    retl
100;
101; X64-LABEL: t5:
102; X64:       # %bb.0:
103; X64-NEXT:    psrlw $8, %xmm0
104; X64-NEXT:    retq
105  %s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17>
106  ret <16 x i8> %s
107}
108
109define <16 x i8> @t6(<16 x i8> %x) nounwind {
110; X32-LABEL: t6:
111; X32:       # %bb.0:
112; X32-NEXT:    psrlw $8, %xmm0
113; X32-NEXT:    retl
114;
115; X64-LABEL: t6:
116; X64:       # %bb.0:
117; X64-NEXT:    psrlw $8, %xmm0
118; X64-NEXT:    retq
119  %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
120  ret <16 x i8> %s
121}
122
123define <16 x i8> @t7(<16 x i8> %x) nounwind {
124; X32-LABEL: t7:
125; X32:       # %bb.0:
126; X32-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2]
127; X32-NEXT:    retl
128;
129; X64-LABEL: t7:
130; X64:       # %bb.0:
131; X64-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2]
132; X64-NEXT:    retq
133  %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2>
134  ret <16 x i8> %s
135}
136
137define <16 x i8> @t8(<16 x i8> %x) nounwind {
138; X32-LABEL: t8:
139; X32:       # %bb.0:
140; X32-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
141; X32-NEXT:    retl
142;
143; X64-LABEL: t8:
144; X64:       # %bb.0:
145; X64-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
146; X64-NEXT:    retq
147  %s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17>
148  ret <16 x i8> %s
149}
150
151define <16 x i8> @t9(<16 x i8> %x) nounwind {
152; X32-LABEL: t9:
153; X32:       # %bb.0:
154; X32-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
155; X32-NEXT:    retl
156;
157; X64-LABEL: t9:
158; X64:       # %bb.0:
159; X64-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
160; X64-NEXT:    retq
161  %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 7, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 14, i32 undef, i32 undef>
162  ret <16 x i8> %s
163}
164