1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512 9 10; 11; Unsigned Maximum (GT) 12; 13 14define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) { 15; SSE2-LABEL: max_gt_v2i64: 16; SSE2: # %bb.0: 17; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] 18; SSE2-NEXT: movdqa %xmm1, %xmm3 19; SSE2-NEXT: pxor %xmm2, %xmm3 20; SSE2-NEXT: pxor %xmm0, %xmm2 21; SSE2-NEXT: movdqa %xmm2, %xmm4 22; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 23; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] 24; SSE2-NEXT: pcmpeqd %xmm3, %xmm2 25; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 26; SSE2-NEXT: pand %xmm5, %xmm2 27; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] 28; SSE2-NEXT: por %xmm2, %xmm3 29; SSE2-NEXT: pand %xmm3, %xmm0 30; SSE2-NEXT: pandn %xmm1, %xmm3 31; SSE2-NEXT: por %xmm3, %xmm0 32; SSE2-NEXT: retq 33; 34; SSE41-LABEL: max_gt_v2i64: 35; SSE41: # %bb.0: 36; SSE41-NEXT: movdqa %xmm0, %xmm2 37; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456] 38; SSE41-NEXT: movdqa %xmm1, %xmm0 39; SSE41-NEXT: pxor %xmm3, %xmm0 40; SSE41-NEXT: pxor %xmm2, %xmm3 41; SSE41-NEXT: movdqa %xmm3, %xmm4 42; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 43; SSE41-NEXT: pcmpgtd %xmm0, %xmm3 44; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2] 45; SSE41-NEXT: pand %xmm4, %xmm0 46; SSE41-NEXT: por %xmm3, %xmm0 47; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1 48; SSE41-NEXT: movapd %xmm1, %xmm0 49; SSE41-NEXT: retq 50; 51; SSE42-LABEL: max_gt_v2i64: 52; SSE42: # %bb.0: 53; SSE42-NEXT: movdqa %xmm0, %xmm2 54; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808] 55; SSE42-NEXT: movdqa %xmm1, %xmm3 56; SSE42-NEXT: pxor %xmm0, %xmm3 57; SSE42-NEXT: pxor %xmm2, %xmm0 58; SSE42-NEXT: pcmpgtq %xmm3, %xmm0 59; SSE42-NEXT: blendvpd %xmm0, %xmm2, %xmm1 60; SSE42-NEXT: movapd %xmm1, %xmm0 61; SSE42-NEXT: retq 62; 63; AVX1-LABEL: max_gt_v2i64: 64; AVX1: # %bb.0: 65; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 66; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm3 67; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm2 68; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 69; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 70; AVX1-NEXT: retq 71; 72; AVX2-LABEL: max_gt_v2i64: 73; AVX2: # %bb.0: 74; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 75; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm3 76; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm2 77; AVX2-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 78; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 79; AVX2-NEXT: retq 80; 81; AVX512-LABEL: max_gt_v2i64: 82; AVX512: # %bb.0: 83; AVX512-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 84; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 85; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0 86; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 87; AVX512-NEXT: vzeroupper 88; AVX512-NEXT: retq 89 %1 = icmp ugt <2 x i64> %a, %b 90 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b 91 ret <2 x i64> %2 92} 93 94define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { 95; SSE2-LABEL: max_gt_v4i64: 96; SSE2: # %bb.0: 97; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] 98; SSE2-NEXT: movdqa %xmm2, %xmm5 99; SSE2-NEXT: pxor %xmm4, %xmm5 100; SSE2-NEXT: movdqa %xmm0, %xmm6 101; SSE2-NEXT: pxor %xmm4, %xmm6 102; SSE2-NEXT: movdqa %xmm6, %xmm7 103; SSE2-NEXT: pcmpgtd %xmm5, %xmm7 104; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2] 105; SSE2-NEXT: pcmpeqd %xmm5, %xmm6 106; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 107; SSE2-NEXT: pand %xmm8, %xmm5 108; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3] 109; SSE2-NEXT: por %xmm5, %xmm6 110; SSE2-NEXT: pand %xmm6, %xmm0 111; SSE2-NEXT: pandn %xmm2, %xmm6 112; SSE2-NEXT: por %xmm6, %xmm0 113; SSE2-NEXT: movdqa %xmm3, %xmm2 114; SSE2-NEXT: pxor %xmm4, %xmm2 115; SSE2-NEXT: pxor %xmm1, %xmm4 116; SSE2-NEXT: movdqa %xmm4, %xmm5 117; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 118; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] 119; SSE2-NEXT: pcmpeqd %xmm2, %xmm4 120; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] 121; SSE2-NEXT: pand %xmm6, %xmm2 122; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3] 123; SSE2-NEXT: por %xmm2, %xmm4 124; SSE2-NEXT: pand %xmm4, %xmm1 125; SSE2-NEXT: pandn %xmm3, %xmm4 126; SSE2-NEXT: por %xmm4, %xmm1 127; SSE2-NEXT: retq 128; 129; SSE41-LABEL: max_gt_v4i64: 130; SSE41: # %bb.0: 131; SSE41-NEXT: movdqa %xmm0, %xmm4 132; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456] 133; SSE41-NEXT: movdqa %xmm2, %xmm6 134; SSE41-NEXT: pxor %xmm5, %xmm6 135; SSE41-NEXT: movdqa %xmm0, %xmm7 136; SSE41-NEXT: pxor %xmm5, %xmm7 137; SSE41-NEXT: movdqa %xmm7, %xmm0 138; SSE41-NEXT: pcmpeqd %xmm6, %xmm0 139; SSE41-NEXT: pcmpgtd %xmm6, %xmm7 140; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm7[0,0,2,2] 141; SSE41-NEXT: pand %xmm6, %xmm0 142; SSE41-NEXT: por %xmm7, %xmm0 143; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm2 144; SSE41-NEXT: movdqa %xmm3, %xmm0 145; SSE41-NEXT: pxor %xmm5, %xmm0 146; SSE41-NEXT: pxor %xmm1, %xmm5 147; SSE41-NEXT: movdqa %xmm5, %xmm4 148; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 149; SSE41-NEXT: pcmpgtd %xmm0, %xmm5 150; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2] 151; SSE41-NEXT: pand %xmm4, %xmm0 152; SSE41-NEXT: por %xmm5, %xmm0 153; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm3 154; SSE41-NEXT: movapd %xmm2, %xmm0 155; SSE41-NEXT: movapd %xmm3, %xmm1 156; SSE41-NEXT: retq 157; 158; SSE42-LABEL: max_gt_v4i64: 159; SSE42: # %bb.0: 160; SSE42-NEXT: movdqa %xmm0, %xmm4 161; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808] 162; SSE42-NEXT: movdqa %xmm2, %xmm6 163; SSE42-NEXT: pxor %xmm5, %xmm6 164; SSE42-NEXT: pxor %xmm5, %xmm0 165; SSE42-NEXT: pcmpgtq %xmm6, %xmm0 166; SSE42-NEXT: blendvpd %xmm0, %xmm4, %xmm2 167; SSE42-NEXT: movdqa %xmm3, %xmm0 168; SSE42-NEXT: pxor %xmm5, %xmm0 169; SSE42-NEXT: pxor %xmm1, %xmm5 170; SSE42-NEXT: pcmpgtq %xmm0, %xmm5 171; SSE42-NEXT: movdqa %xmm5, %xmm0 172; SSE42-NEXT: blendvpd %xmm0, %xmm1, %xmm3 173; SSE42-NEXT: movapd %xmm2, %xmm0 174; SSE42-NEXT: movapd %xmm3, %xmm1 175; SSE42-NEXT: retq 176; 177; AVX1-LABEL: max_gt_v4i64: 178; AVX1: # %bb.0: 179; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 180; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808] 181; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm2 182; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 183; AVX1-NEXT: vpxor %xmm3, %xmm4, %xmm4 184; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2 185; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4 186; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3 187; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3 188; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 189; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 190; AVX1-NEXT: retq 191; 192; AVX2-LABEL: max_gt_v4i64: 193; AVX2: # %bb.0: 194; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808] 195; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3 196; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2 197; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2 198; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 199; AVX2-NEXT: retq 200; 201; AVX512-LABEL: max_gt_v4i64: 202; AVX512: # %bb.0: 203; AVX512-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 204; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 205; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0 206; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 207; AVX512-NEXT: retq 208 %1 = icmp ugt <4 x i64> %a, %b 209 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b 210 ret <4 x i64> %2 211} 212 213define <4 x i32> @max_gt_v4i32(<4 x i32> %a, <4 x i32> %b) { 214; SSE2-LABEL: max_gt_v4i32: 215; SSE2: # %bb.0: 216; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] 217; SSE2-NEXT: movdqa %xmm1, %xmm3 218; SSE2-NEXT: pxor %xmm2, %xmm3 219; SSE2-NEXT: pxor %xmm0, %xmm2 220; SSE2-NEXT: pcmpgtd %xmm3, %xmm2 221; SSE2-NEXT: pand %xmm2, %xmm0 222; SSE2-NEXT: pandn %xmm1, %xmm2 223; SSE2-NEXT: por %xmm2, %xmm0 224; SSE2-NEXT: retq 225; 226; SSE41-LABEL: max_gt_v4i32: 227; SSE41: # %bb.0: 228; SSE41-NEXT: pmaxud %xmm1, %xmm0 229; SSE41-NEXT: retq 230; 231; SSE42-LABEL: max_gt_v4i32: 232; SSE42: # %bb.0: 233; SSE42-NEXT: pmaxud %xmm1, %xmm0 234; SSE42-NEXT: retq 235; 236; AVX-LABEL: max_gt_v4i32: 237; AVX: # %bb.0: 238; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 239; AVX-NEXT: retq 240 %1 = icmp ugt <4 x i32> %a, %b 241 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b 242 ret <4 x i32> %2 243} 244 245define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) { 246; SSE2-LABEL: max_gt_v8i32: 247; SSE2: # %bb.0: 248; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648] 249; SSE2-NEXT: movdqa %xmm2, %xmm6 250; SSE2-NEXT: pxor %xmm5, %xmm6 251; SSE2-NEXT: movdqa %xmm0, %xmm4 252; SSE2-NEXT: pxor %xmm5, %xmm4 253; SSE2-NEXT: pcmpgtd %xmm6, %xmm4 254; SSE2-NEXT: pand %xmm4, %xmm0 255; SSE2-NEXT: pandn %xmm2, %xmm4 256; SSE2-NEXT: por %xmm0, %xmm4 257; SSE2-NEXT: movdqa %xmm3, %xmm0 258; SSE2-NEXT: pxor %xmm5, %xmm0 259; SSE2-NEXT: pxor %xmm1, %xmm5 260; SSE2-NEXT: pcmpgtd %xmm0, %xmm5 261; SSE2-NEXT: pand %xmm5, %xmm1 262; SSE2-NEXT: pandn %xmm3, %xmm5 263; SSE2-NEXT: por %xmm5, %xmm1 264; SSE2-NEXT: movdqa %xmm4, %xmm0 265; SSE2-NEXT: retq 266; 267; SSE41-LABEL: max_gt_v8i32: 268; SSE41: # %bb.0: 269; SSE41-NEXT: pmaxud %xmm2, %xmm0 270; SSE41-NEXT: pmaxud %xmm3, %xmm1 271; SSE41-NEXT: retq 272; 273; SSE42-LABEL: max_gt_v8i32: 274; SSE42: # %bb.0: 275; SSE42-NEXT: pmaxud %xmm2, %xmm0 276; SSE42-NEXT: pmaxud %xmm3, %xmm1 277; SSE42-NEXT: retq 278; 279; AVX1-LABEL: max_gt_v8i32: 280; AVX1: # %bb.0: 281; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 282; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 283; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2 284; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 285; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 286; AVX1-NEXT: retq 287; 288; AVX2-LABEL: max_gt_v8i32: 289; AVX2: # %bb.0: 290; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 291; AVX2-NEXT: retq 292; 293; AVX512-LABEL: max_gt_v8i32: 294; AVX512: # %bb.0: 295; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 296; AVX512-NEXT: retq 297 %1 = icmp ugt <8 x i32> %a, %b 298 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b 299 ret <8 x i32> %2 300} 301 302define <8 x i16> @max_gt_v8i16(<8 x i16> %a, <8 x i16> %b) { 303; SSE2-LABEL: max_gt_v8i16: 304; SSE2: # %bb.0: 305; SSE2-NEXT: psubusw %xmm0, %xmm1 306; SSE2-NEXT: paddw %xmm1, %xmm0 307; SSE2-NEXT: retq 308; 309; SSE41-LABEL: max_gt_v8i16: 310; SSE41: # %bb.0: 311; SSE41-NEXT: pmaxuw %xmm1, %xmm0 312; SSE41-NEXT: retq 313; 314; SSE42-LABEL: max_gt_v8i16: 315; SSE42: # %bb.0: 316; SSE42-NEXT: pmaxuw %xmm1, %xmm0 317; SSE42-NEXT: retq 318; 319; AVX-LABEL: max_gt_v8i16: 320; AVX: # %bb.0: 321; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 322; AVX-NEXT: retq 323 %1 = icmp ugt <8 x i16> %a, %b 324 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b 325 ret <8 x i16> %2 326} 327 328define <16 x i16> @max_gt_v16i16(<16 x i16> %a, <16 x i16> %b) { 329; SSE2-LABEL: max_gt_v16i16: 330; SSE2: # %bb.0: 331; SSE2-NEXT: psubusw %xmm0, %xmm2 332; SSE2-NEXT: paddw %xmm2, %xmm0 333; SSE2-NEXT: psubusw %xmm1, %xmm3 334; SSE2-NEXT: paddw %xmm3, %xmm1 335; SSE2-NEXT: retq 336; 337; SSE41-LABEL: max_gt_v16i16: 338; SSE41: # %bb.0: 339; SSE41-NEXT: pmaxuw %xmm2, %xmm0 340; SSE41-NEXT: pmaxuw %xmm3, %xmm1 341; SSE41-NEXT: retq 342; 343; SSE42-LABEL: max_gt_v16i16: 344; SSE42: # %bb.0: 345; SSE42-NEXT: pmaxuw %xmm2, %xmm0 346; SSE42-NEXT: pmaxuw %xmm3, %xmm1 347; SSE42-NEXT: retq 348; 349; AVX1-LABEL: max_gt_v16i16: 350; AVX1: # %bb.0: 351; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 352; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 353; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2 354; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 355; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 356; AVX1-NEXT: retq 357; 358; AVX2-LABEL: max_gt_v16i16: 359; AVX2: # %bb.0: 360; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 361; AVX2-NEXT: retq 362; 363; AVX512-LABEL: max_gt_v16i16: 364; AVX512: # %bb.0: 365; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 366; AVX512-NEXT: retq 367 %1 = icmp ugt <16 x i16> %a, %b 368 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b 369 ret <16 x i16> %2 370} 371 372define <16 x i8> @max_gt_v16i8(<16 x i8> %a, <16 x i8> %b) { 373; SSE-LABEL: max_gt_v16i8: 374; SSE: # %bb.0: 375; SSE-NEXT: pmaxub %xmm1, %xmm0 376; SSE-NEXT: retq 377; 378; AVX-LABEL: max_gt_v16i8: 379; AVX: # %bb.0: 380; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 381; AVX-NEXT: retq 382 %1 = icmp ugt <16 x i8> %a, %b 383 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b 384 ret <16 x i8> %2 385} 386 387define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) { 388; SSE-LABEL: max_gt_v32i8: 389; SSE: # %bb.0: 390; SSE-NEXT: pmaxub %xmm2, %xmm0 391; SSE-NEXT: pmaxub %xmm3, %xmm1 392; SSE-NEXT: retq 393; 394; AVX1-LABEL: max_gt_v32i8: 395; AVX1: # %bb.0: 396; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 397; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 398; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm2 399; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 400; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 401; AVX1-NEXT: retq 402; 403; AVX2-LABEL: max_gt_v32i8: 404; AVX2: # %bb.0: 405; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 406; AVX2-NEXT: retq 407; 408; AVX512-LABEL: max_gt_v32i8: 409; AVX512: # %bb.0: 410; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 411; AVX512-NEXT: retq 412 %1 = icmp ugt <32 x i8> %a, %b 413 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b 414 ret <32 x i8> %2 415} 416 417; 418; Unsigned Maximum (GE) 419; 420 421define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { 422; SSE2-LABEL: max_ge_v2i64: 423; SSE2: # %bb.0: 424; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] 425; SSE2-NEXT: movdqa %xmm1, %xmm3 426; SSE2-NEXT: pxor %xmm2, %xmm3 427; SSE2-NEXT: pxor %xmm0, %xmm2 428; SSE2-NEXT: movdqa %xmm2, %xmm4 429; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 430; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] 431; SSE2-NEXT: pcmpeqd %xmm3, %xmm2 432; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 433; SSE2-NEXT: pand %xmm5, %xmm2 434; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] 435; SSE2-NEXT: por %xmm2, %xmm3 436; SSE2-NEXT: pand %xmm3, %xmm0 437; SSE2-NEXT: pandn %xmm1, %xmm3 438; SSE2-NEXT: por %xmm3, %xmm0 439; SSE2-NEXT: retq 440; 441; SSE41-LABEL: max_ge_v2i64: 442; SSE41: # %bb.0: 443; SSE41-NEXT: movdqa %xmm0, %xmm2 444; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456] 445; SSE41-NEXT: movdqa %xmm1, %xmm0 446; SSE41-NEXT: pxor %xmm3, %xmm0 447; SSE41-NEXT: pxor %xmm2, %xmm3 448; SSE41-NEXT: movdqa %xmm3, %xmm4 449; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 450; SSE41-NEXT: pcmpgtd %xmm0, %xmm3 451; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2] 452; SSE41-NEXT: pand %xmm4, %xmm0 453; SSE41-NEXT: por %xmm3, %xmm0 454; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1 455; SSE41-NEXT: movapd %xmm1, %xmm0 456; SSE41-NEXT: retq 457; 458; SSE42-LABEL: max_ge_v2i64: 459; SSE42: # %bb.0: 460; SSE42-NEXT: movdqa %xmm0, %xmm2 461; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808] 462; SSE42-NEXT: movdqa %xmm1, %xmm3 463; SSE42-NEXT: pxor %xmm0, %xmm3 464; SSE42-NEXT: pxor %xmm2, %xmm0 465; SSE42-NEXT: pcmpgtq %xmm3, %xmm0 466; SSE42-NEXT: blendvpd %xmm0, %xmm2, %xmm1 467; SSE42-NEXT: movapd %xmm1, %xmm0 468; SSE42-NEXT: retq 469; 470; AVX1-LABEL: max_ge_v2i64: 471; AVX1: # %bb.0: 472; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 473; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm3 474; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm2 475; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 476; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 477; AVX1-NEXT: retq 478; 479; AVX2-LABEL: max_ge_v2i64: 480; AVX2: # %bb.0: 481; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 482; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm3 483; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm2 484; AVX2-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 485; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 486; AVX2-NEXT: retq 487; 488; AVX512-LABEL: max_ge_v2i64: 489; AVX512: # %bb.0: 490; AVX512-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 491; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 492; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0 493; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 494; AVX512-NEXT: vzeroupper 495; AVX512-NEXT: retq 496 %1 = icmp uge <2 x i64> %a, %b 497 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b 498 ret <2 x i64> %2 499} 500 501define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { 502; SSE2-LABEL: max_ge_v4i64: 503; SSE2: # %bb.0: 504; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] 505; SSE2-NEXT: movdqa %xmm2, %xmm5 506; SSE2-NEXT: pxor %xmm4, %xmm5 507; SSE2-NEXT: movdqa %xmm0, %xmm6 508; SSE2-NEXT: pxor %xmm4, %xmm6 509; SSE2-NEXT: movdqa %xmm6, %xmm7 510; SSE2-NEXT: pcmpgtd %xmm5, %xmm7 511; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2] 512; SSE2-NEXT: pcmpeqd %xmm5, %xmm6 513; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 514; SSE2-NEXT: pand %xmm8, %xmm5 515; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3] 516; SSE2-NEXT: por %xmm5, %xmm6 517; SSE2-NEXT: pand %xmm6, %xmm0 518; SSE2-NEXT: pandn %xmm2, %xmm6 519; SSE2-NEXT: por %xmm6, %xmm0 520; SSE2-NEXT: movdqa %xmm3, %xmm2 521; SSE2-NEXT: pxor %xmm4, %xmm2 522; SSE2-NEXT: pxor %xmm1, %xmm4 523; SSE2-NEXT: movdqa %xmm4, %xmm5 524; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 525; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] 526; SSE2-NEXT: pcmpeqd %xmm2, %xmm4 527; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] 528; SSE2-NEXT: pand %xmm6, %xmm2 529; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3] 530; SSE2-NEXT: por %xmm2, %xmm4 531; SSE2-NEXT: pand %xmm4, %xmm1 532; SSE2-NEXT: pandn %xmm3, %xmm4 533; SSE2-NEXT: por %xmm4, %xmm1 534; SSE2-NEXT: retq 535; 536; SSE41-LABEL: max_ge_v4i64: 537; SSE41: # %bb.0: 538; SSE41-NEXT: movdqa %xmm0, %xmm4 539; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456] 540; SSE41-NEXT: movdqa %xmm2, %xmm6 541; SSE41-NEXT: pxor %xmm5, %xmm6 542; SSE41-NEXT: movdqa %xmm0, %xmm7 543; SSE41-NEXT: pxor %xmm5, %xmm7 544; SSE41-NEXT: movdqa %xmm7, %xmm0 545; SSE41-NEXT: pcmpeqd %xmm6, %xmm0 546; SSE41-NEXT: pcmpgtd %xmm6, %xmm7 547; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm7[0,0,2,2] 548; SSE41-NEXT: pand %xmm6, %xmm0 549; SSE41-NEXT: por %xmm7, %xmm0 550; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm2 551; SSE41-NEXT: movdqa %xmm3, %xmm0 552; SSE41-NEXT: pxor %xmm5, %xmm0 553; SSE41-NEXT: pxor %xmm1, %xmm5 554; SSE41-NEXT: movdqa %xmm5, %xmm4 555; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 556; SSE41-NEXT: pcmpgtd %xmm0, %xmm5 557; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2] 558; SSE41-NEXT: pand %xmm4, %xmm0 559; SSE41-NEXT: por %xmm5, %xmm0 560; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm3 561; SSE41-NEXT: movapd %xmm2, %xmm0 562; SSE41-NEXT: movapd %xmm3, %xmm1 563; SSE41-NEXT: retq 564; 565; SSE42-LABEL: max_ge_v4i64: 566; SSE42: # %bb.0: 567; SSE42-NEXT: movdqa %xmm0, %xmm4 568; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808] 569; SSE42-NEXT: movdqa %xmm2, %xmm6 570; SSE42-NEXT: pxor %xmm5, %xmm6 571; SSE42-NEXT: pxor %xmm5, %xmm0 572; SSE42-NEXT: pcmpgtq %xmm6, %xmm0 573; SSE42-NEXT: blendvpd %xmm0, %xmm4, %xmm2 574; SSE42-NEXT: movdqa %xmm3, %xmm0 575; SSE42-NEXT: pxor %xmm5, %xmm0 576; SSE42-NEXT: pxor %xmm1, %xmm5 577; SSE42-NEXT: pcmpgtq %xmm0, %xmm5 578; SSE42-NEXT: movdqa %xmm5, %xmm0 579; SSE42-NEXT: blendvpd %xmm0, %xmm1, %xmm3 580; SSE42-NEXT: movapd %xmm2, %xmm0 581; SSE42-NEXT: movapd %xmm3, %xmm1 582; SSE42-NEXT: retq 583; 584; AVX1-LABEL: max_ge_v4i64: 585; AVX1: # %bb.0: 586; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 587; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808] 588; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm2 589; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 590; AVX1-NEXT: vpxor %xmm3, %xmm4, %xmm4 591; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2 592; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4 593; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3 594; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3 595; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 596; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 597; AVX1-NEXT: retq 598; 599; AVX2-LABEL: max_ge_v4i64: 600; AVX2: # %bb.0: 601; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808] 602; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3 603; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2 604; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2 605; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 606; AVX2-NEXT: retq 607; 608; AVX512-LABEL: max_ge_v4i64: 609; AVX512: # %bb.0: 610; AVX512-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 611; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 612; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0 613; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 614; AVX512-NEXT: retq 615 %1 = icmp uge <4 x i64> %a, %b 616 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b 617 ret <4 x i64> %2 618} 619 620define <4 x i32> @max_ge_v4i32(<4 x i32> %a, <4 x i32> %b) { 621; SSE2-LABEL: max_ge_v4i32: 622; SSE2: # %bb.0: 623; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] 624; SSE2-NEXT: movdqa %xmm1, %xmm3 625; SSE2-NEXT: pxor %xmm2, %xmm3 626; SSE2-NEXT: pxor %xmm0, %xmm2 627; SSE2-NEXT: pcmpgtd %xmm3, %xmm2 628; SSE2-NEXT: pand %xmm2, %xmm0 629; SSE2-NEXT: pandn %xmm1, %xmm2 630; SSE2-NEXT: por %xmm2, %xmm0 631; SSE2-NEXT: retq 632; 633; SSE41-LABEL: max_ge_v4i32: 634; SSE41: # %bb.0: 635; SSE41-NEXT: pmaxud %xmm1, %xmm0 636; SSE41-NEXT: retq 637; 638; SSE42-LABEL: max_ge_v4i32: 639; SSE42: # %bb.0: 640; SSE42-NEXT: pmaxud %xmm1, %xmm0 641; SSE42-NEXT: retq 642; 643; AVX-LABEL: max_ge_v4i32: 644; AVX: # %bb.0: 645; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 646; AVX-NEXT: retq 647 %1 = icmp uge <4 x i32> %a, %b 648 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b 649 ret <4 x i32> %2 650} 651 652define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) { 653; SSE2-LABEL: max_ge_v8i32: 654; SSE2: # %bb.0: 655; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648] 656; SSE2-NEXT: movdqa %xmm2, %xmm6 657; SSE2-NEXT: pxor %xmm5, %xmm6 658; SSE2-NEXT: movdqa %xmm0, %xmm4 659; SSE2-NEXT: pxor %xmm5, %xmm4 660; SSE2-NEXT: pcmpgtd %xmm6, %xmm4 661; SSE2-NEXT: pand %xmm4, %xmm0 662; SSE2-NEXT: pandn %xmm2, %xmm4 663; SSE2-NEXT: por %xmm0, %xmm4 664; SSE2-NEXT: movdqa %xmm3, %xmm0 665; SSE2-NEXT: pxor %xmm5, %xmm0 666; SSE2-NEXT: pxor %xmm1, %xmm5 667; SSE2-NEXT: pcmpgtd %xmm0, %xmm5 668; SSE2-NEXT: pand %xmm5, %xmm1 669; SSE2-NEXT: pandn %xmm3, %xmm5 670; SSE2-NEXT: por %xmm5, %xmm1 671; SSE2-NEXT: movdqa %xmm4, %xmm0 672; SSE2-NEXT: retq 673; 674; SSE41-LABEL: max_ge_v8i32: 675; SSE41: # %bb.0: 676; SSE41-NEXT: pmaxud %xmm2, %xmm0 677; SSE41-NEXT: pmaxud %xmm3, %xmm1 678; SSE41-NEXT: retq 679; 680; SSE42-LABEL: max_ge_v8i32: 681; SSE42: # %bb.0: 682; SSE42-NEXT: pmaxud %xmm2, %xmm0 683; SSE42-NEXT: pmaxud %xmm3, %xmm1 684; SSE42-NEXT: retq 685; 686; AVX1-LABEL: max_ge_v8i32: 687; AVX1: # %bb.0: 688; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 689; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 690; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm2 691; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 692; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 693; AVX1-NEXT: retq 694; 695; AVX2-LABEL: max_ge_v8i32: 696; AVX2: # %bb.0: 697; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 698; AVX2-NEXT: retq 699; 700; AVX512-LABEL: max_ge_v8i32: 701; AVX512: # %bb.0: 702; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 703; AVX512-NEXT: retq 704 %1 = icmp uge <8 x i32> %a, %b 705 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b 706 ret <8 x i32> %2 707} 708 709define <8 x i16> @max_ge_v8i16(<8 x i16> %a, <8 x i16> %b) { 710; SSE2-LABEL: max_ge_v8i16: 711; SSE2: # %bb.0: 712; SSE2-NEXT: psubusw %xmm0, %xmm1 713; SSE2-NEXT: paddw %xmm1, %xmm0 714; SSE2-NEXT: retq 715; 716; SSE41-LABEL: max_ge_v8i16: 717; SSE41: # %bb.0: 718; SSE41-NEXT: pmaxuw %xmm1, %xmm0 719; SSE41-NEXT: retq 720; 721; SSE42-LABEL: max_ge_v8i16: 722; SSE42: # %bb.0: 723; SSE42-NEXT: pmaxuw %xmm1, %xmm0 724; SSE42-NEXT: retq 725; 726; AVX-LABEL: max_ge_v8i16: 727; AVX: # %bb.0: 728; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 729; AVX-NEXT: retq 730 %1 = icmp uge <8 x i16> %a, %b 731 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b 732 ret <8 x i16> %2 733} 734 735define <16 x i16> @max_ge_v16i16(<16 x i16> %a, <16 x i16> %b) { 736; SSE2-LABEL: max_ge_v16i16: 737; SSE2: # %bb.0: 738; SSE2-NEXT: psubusw %xmm0, %xmm2 739; SSE2-NEXT: paddw %xmm2, %xmm0 740; SSE2-NEXT: psubusw %xmm1, %xmm3 741; SSE2-NEXT: paddw %xmm3, %xmm1 742; SSE2-NEXT: retq 743; 744; SSE41-LABEL: max_ge_v16i16: 745; SSE41: # %bb.0: 746; SSE41-NEXT: pmaxuw %xmm2, %xmm0 747; SSE41-NEXT: pmaxuw %xmm3, %xmm1 748; SSE41-NEXT: retq 749; 750; SSE42-LABEL: max_ge_v16i16: 751; SSE42: # %bb.0: 752; SSE42-NEXT: pmaxuw %xmm2, %xmm0 753; SSE42-NEXT: pmaxuw %xmm3, %xmm1 754; SSE42-NEXT: retq 755; 756; AVX1-LABEL: max_ge_v16i16: 757; AVX1: # %bb.0: 758; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 759; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 760; AVX1-NEXT: vpmaxuw %xmm2, %xmm3, %xmm2 761; AVX1-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 762; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 763; AVX1-NEXT: retq 764; 765; AVX2-LABEL: max_ge_v16i16: 766; AVX2: # %bb.0: 767; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 768; AVX2-NEXT: retq 769; 770; AVX512-LABEL: max_ge_v16i16: 771; AVX512: # %bb.0: 772; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 773; AVX512-NEXT: retq 774 %1 = icmp uge <16 x i16> %a, %b 775 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b 776 ret <16 x i16> %2 777} 778 779define <16 x i8> @max_ge_v16i8(<16 x i8> %a, <16 x i8> %b) { 780; SSE-LABEL: max_ge_v16i8: 781; SSE: # %bb.0: 782; SSE-NEXT: pmaxub %xmm1, %xmm0 783; SSE-NEXT: retq 784; 785; AVX-LABEL: max_ge_v16i8: 786; AVX: # %bb.0: 787; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 788; AVX-NEXT: retq 789 %1 = icmp uge <16 x i8> %a, %b 790 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b 791 ret <16 x i8> %2 792} 793 794define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) { 795; SSE-LABEL: max_ge_v32i8: 796; SSE: # %bb.0: 797; SSE-NEXT: pmaxub %xmm2, %xmm0 798; SSE-NEXT: pmaxub %xmm3, %xmm1 799; SSE-NEXT: retq 800; 801; AVX1-LABEL: max_ge_v32i8: 802; AVX1: # %bb.0: 803; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 804; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 805; AVX1-NEXT: vpmaxub %xmm2, %xmm3, %xmm2 806; AVX1-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 807; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 808; AVX1-NEXT: retq 809; 810; AVX2-LABEL: max_ge_v32i8: 811; AVX2: # %bb.0: 812; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 813; AVX2-NEXT: retq 814; 815; AVX512-LABEL: max_ge_v32i8: 816; AVX512: # %bb.0: 817; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 818; AVX512-NEXT: retq 819 %1 = icmp uge <32 x i8> %a, %b 820 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b 821 ret <32 x i8> %2 822} 823 824; 825; Unsigned Minimum (LT) 826; 827 828define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) { 829; SSE2-LABEL: min_lt_v2i64: 830; SSE2: # %bb.0: 831; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] 832; SSE2-NEXT: movdqa %xmm0, %xmm3 833; SSE2-NEXT: pxor %xmm2, %xmm3 834; SSE2-NEXT: pxor %xmm1, %xmm2 835; SSE2-NEXT: movdqa %xmm2, %xmm4 836; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 837; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] 838; SSE2-NEXT: pcmpeqd %xmm3, %xmm2 839; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 840; SSE2-NEXT: pand %xmm5, %xmm2 841; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] 842; SSE2-NEXT: por %xmm2, %xmm3 843; SSE2-NEXT: pand %xmm3, %xmm0 844; SSE2-NEXT: pandn %xmm1, %xmm3 845; SSE2-NEXT: por %xmm3, %xmm0 846; SSE2-NEXT: retq 847; 848; SSE41-LABEL: min_lt_v2i64: 849; SSE41: # %bb.0: 850; SSE41-NEXT: movdqa %xmm0, %xmm2 851; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456] 852; SSE41-NEXT: pxor %xmm3, %xmm0 853; SSE41-NEXT: pxor %xmm1, %xmm3 854; SSE41-NEXT: movdqa %xmm3, %xmm4 855; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 856; SSE41-NEXT: pcmpgtd %xmm0, %xmm3 857; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2] 858; SSE41-NEXT: pand %xmm4, %xmm0 859; SSE41-NEXT: por %xmm3, %xmm0 860; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1 861; SSE41-NEXT: movapd %xmm1, %xmm0 862; SSE41-NEXT: retq 863; 864; SSE42-LABEL: min_lt_v2i64: 865; SSE42: # %bb.0: 866; SSE42-NEXT: movdqa %xmm0, %xmm2 867; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808] 868; SSE42-NEXT: movdqa %xmm2, %xmm3 869; SSE42-NEXT: pxor %xmm0, %xmm3 870; SSE42-NEXT: pxor %xmm1, %xmm0 871; SSE42-NEXT: pcmpgtq %xmm3, %xmm0 872; SSE42-NEXT: blendvpd %xmm0, %xmm2, %xmm1 873; SSE42-NEXT: movapd %xmm1, %xmm0 874; SSE42-NEXT: retq 875; 876; AVX1-LABEL: min_lt_v2i64: 877; AVX1: # %bb.0: 878; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 879; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm3 880; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm2 881; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 882; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 883; AVX1-NEXT: retq 884; 885; AVX2-LABEL: min_lt_v2i64: 886; AVX2: # %bb.0: 887; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 888; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm3 889; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm2 890; AVX2-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 891; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 892; AVX2-NEXT: retq 893; 894; AVX512-LABEL: min_lt_v2i64: 895; AVX512: # %bb.0: 896; AVX512-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 897; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 898; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0 899; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 900; AVX512-NEXT: vzeroupper 901; AVX512-NEXT: retq 902 %1 = icmp ult <2 x i64> %a, %b 903 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b 904 ret <2 x i64> %2 905} 906 907define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { 908; SSE2-LABEL: min_lt_v4i64: 909; SSE2: # %bb.0: 910; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] 911; SSE2-NEXT: movdqa %xmm0, %xmm5 912; SSE2-NEXT: pxor %xmm4, %xmm5 913; SSE2-NEXT: movdqa %xmm2, %xmm6 914; SSE2-NEXT: pxor %xmm4, %xmm6 915; SSE2-NEXT: movdqa %xmm6, %xmm7 916; SSE2-NEXT: pcmpgtd %xmm5, %xmm7 917; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2] 918; SSE2-NEXT: pcmpeqd %xmm5, %xmm6 919; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 920; SSE2-NEXT: pand %xmm8, %xmm5 921; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3] 922; SSE2-NEXT: por %xmm5, %xmm6 923; SSE2-NEXT: pand %xmm6, %xmm0 924; SSE2-NEXT: pandn %xmm2, %xmm6 925; SSE2-NEXT: por %xmm6, %xmm0 926; SSE2-NEXT: movdqa %xmm1, %xmm2 927; SSE2-NEXT: pxor %xmm4, %xmm2 928; SSE2-NEXT: pxor %xmm3, %xmm4 929; SSE2-NEXT: movdqa %xmm4, %xmm5 930; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 931; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] 932; SSE2-NEXT: pcmpeqd %xmm2, %xmm4 933; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] 934; SSE2-NEXT: pand %xmm6, %xmm2 935; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3] 936; SSE2-NEXT: por %xmm2, %xmm4 937; SSE2-NEXT: pand %xmm4, %xmm1 938; SSE2-NEXT: pandn %xmm3, %xmm4 939; SSE2-NEXT: por %xmm4, %xmm1 940; SSE2-NEXT: retq 941; 942; SSE41-LABEL: min_lt_v4i64: 943; SSE41: # %bb.0: 944; SSE41-NEXT: movdqa %xmm0, %xmm4 945; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456] 946; SSE41-NEXT: pxor %xmm5, %xmm0 947; SSE41-NEXT: movdqa %xmm2, %xmm6 948; SSE41-NEXT: pxor %xmm5, %xmm6 949; SSE41-NEXT: movdqa %xmm6, %xmm7 950; SSE41-NEXT: pcmpeqd %xmm0, %xmm7 951; SSE41-NEXT: pcmpgtd %xmm0, %xmm6 952; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2] 953; SSE41-NEXT: pand %xmm7, %xmm0 954; SSE41-NEXT: por %xmm6, %xmm0 955; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm2 956; SSE41-NEXT: movdqa %xmm1, %xmm0 957; SSE41-NEXT: pxor %xmm5, %xmm0 958; SSE41-NEXT: pxor %xmm3, %xmm5 959; SSE41-NEXT: movdqa %xmm5, %xmm4 960; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 961; SSE41-NEXT: pcmpgtd %xmm0, %xmm5 962; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2] 963; SSE41-NEXT: pand %xmm4, %xmm0 964; SSE41-NEXT: por %xmm5, %xmm0 965; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm3 966; SSE41-NEXT: movapd %xmm2, %xmm0 967; SSE41-NEXT: movapd %xmm3, %xmm1 968; SSE41-NEXT: retq 969; 970; SSE42-LABEL: min_lt_v4i64: 971; SSE42: # %bb.0: 972; SSE42-NEXT: movdqa %xmm0, %xmm4 973; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808] 974; SSE42-NEXT: movdqa %xmm0, %xmm6 975; SSE42-NEXT: pxor %xmm5, %xmm6 976; SSE42-NEXT: movdqa %xmm2, %xmm0 977; SSE42-NEXT: pxor %xmm5, %xmm0 978; SSE42-NEXT: pcmpgtq %xmm6, %xmm0 979; SSE42-NEXT: blendvpd %xmm0, %xmm4, %xmm2 980; SSE42-NEXT: movdqa %xmm1, %xmm0 981; SSE42-NEXT: pxor %xmm5, %xmm0 982; SSE42-NEXT: pxor %xmm3, %xmm5 983; SSE42-NEXT: pcmpgtq %xmm0, %xmm5 984; SSE42-NEXT: movdqa %xmm5, %xmm0 985; SSE42-NEXT: blendvpd %xmm0, %xmm1, %xmm3 986; SSE42-NEXT: movapd %xmm2, %xmm0 987; SSE42-NEXT: movapd %xmm3, %xmm1 988; SSE42-NEXT: retq 989; 990; AVX1-LABEL: min_lt_v4i64: 991; AVX1: # %bb.0: 992; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 993; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808] 994; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm2 995; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 996; AVX1-NEXT: vpxor %xmm3, %xmm4, %xmm4 997; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2 998; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm4 999; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm3 1000; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3 1001; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 1002; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 1003; AVX1-NEXT: retq 1004; 1005; AVX2-LABEL: min_lt_v4i64: 1006; AVX2: # %bb.0: 1007; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808] 1008; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm3 1009; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm2 1010; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2 1011; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 1012; AVX2-NEXT: retq 1013; 1014; AVX512-LABEL: min_lt_v4i64: 1015; AVX512: # %bb.0: 1016; AVX512-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1017; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1018; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0 1019; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 1020; AVX512-NEXT: retq 1021 %1 = icmp ult <4 x i64> %a, %b 1022 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b 1023 ret <4 x i64> %2 1024} 1025 1026define <4 x i32> @min_lt_v4i32(<4 x i32> %a, <4 x i32> %b) { 1027; SSE2-LABEL: min_lt_v4i32: 1028; SSE2: # %bb.0: 1029; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] 1030; SSE2-NEXT: movdqa %xmm0, %xmm3 1031; SSE2-NEXT: pxor %xmm2, %xmm3 1032; SSE2-NEXT: pxor %xmm1, %xmm2 1033; SSE2-NEXT: pcmpgtd %xmm3, %xmm2 1034; SSE2-NEXT: pand %xmm2, %xmm0 1035; SSE2-NEXT: pandn %xmm1, %xmm2 1036; SSE2-NEXT: por %xmm2, %xmm0 1037; SSE2-NEXT: retq 1038; 1039; SSE41-LABEL: min_lt_v4i32: 1040; SSE41: # %bb.0: 1041; SSE41-NEXT: pminud %xmm1, %xmm0 1042; SSE41-NEXT: retq 1043; 1044; SSE42-LABEL: min_lt_v4i32: 1045; SSE42: # %bb.0: 1046; SSE42-NEXT: pminud %xmm1, %xmm0 1047; SSE42-NEXT: retq 1048; 1049; AVX-LABEL: min_lt_v4i32: 1050; AVX: # %bb.0: 1051; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0 1052; AVX-NEXT: retq 1053 %1 = icmp ult <4 x i32> %a, %b 1054 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b 1055 ret <4 x i32> %2 1056} 1057 1058define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) { 1059; SSE2-LABEL: min_lt_v8i32: 1060; SSE2: # %bb.0: 1061; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648] 1062; SSE2-NEXT: movdqa %xmm0, %xmm5 1063; SSE2-NEXT: pxor %xmm4, %xmm5 1064; SSE2-NEXT: movdqa %xmm2, %xmm6 1065; SSE2-NEXT: pxor %xmm4, %xmm6 1066; SSE2-NEXT: pcmpgtd %xmm5, %xmm6 1067; SSE2-NEXT: pand %xmm6, %xmm0 1068; SSE2-NEXT: pandn %xmm2, %xmm6 1069; SSE2-NEXT: por %xmm6, %xmm0 1070; SSE2-NEXT: movdqa %xmm1, %xmm2 1071; SSE2-NEXT: pxor %xmm4, %xmm2 1072; SSE2-NEXT: pxor %xmm3, %xmm4 1073; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 1074; SSE2-NEXT: pand %xmm4, %xmm1 1075; SSE2-NEXT: pandn %xmm3, %xmm4 1076; SSE2-NEXT: por %xmm4, %xmm1 1077; SSE2-NEXT: retq 1078; 1079; SSE41-LABEL: min_lt_v8i32: 1080; SSE41: # %bb.0: 1081; SSE41-NEXT: pminud %xmm2, %xmm0 1082; SSE41-NEXT: pminud %xmm3, %xmm1 1083; SSE41-NEXT: retq 1084; 1085; SSE42-LABEL: min_lt_v8i32: 1086; SSE42: # %bb.0: 1087; SSE42-NEXT: pminud %xmm2, %xmm0 1088; SSE42-NEXT: pminud %xmm3, %xmm1 1089; SSE42-NEXT: retq 1090; 1091; AVX1-LABEL: min_lt_v8i32: 1092; AVX1: # %bb.0: 1093; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1094; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1095; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm2 1096; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm0 1097; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1098; AVX1-NEXT: retq 1099; 1100; AVX2-LABEL: min_lt_v8i32: 1101; AVX2: # %bb.0: 1102; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0 1103; AVX2-NEXT: retq 1104; 1105; AVX512-LABEL: min_lt_v8i32: 1106; AVX512: # %bb.0: 1107; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0 1108; AVX512-NEXT: retq 1109 %1 = icmp ult <8 x i32> %a, %b 1110 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b 1111 ret <8 x i32> %2 1112} 1113 1114define <8 x i16> @min_lt_v8i16(<8 x i16> %a, <8 x i16> %b) { 1115; SSE2-LABEL: min_lt_v8i16: 1116; SSE2: # %bb.0: 1117; SSE2-NEXT: movdqa %xmm0, %xmm2 1118; SSE2-NEXT: psubusw %xmm1, %xmm2 1119; SSE2-NEXT: psubw %xmm2, %xmm0 1120; SSE2-NEXT: retq 1121; 1122; SSE41-LABEL: min_lt_v8i16: 1123; SSE41: # %bb.0: 1124; SSE41-NEXT: pminuw %xmm1, %xmm0 1125; SSE41-NEXT: retq 1126; 1127; SSE42-LABEL: min_lt_v8i16: 1128; SSE42: # %bb.0: 1129; SSE42-NEXT: pminuw %xmm1, %xmm0 1130; SSE42-NEXT: retq 1131; 1132; AVX-LABEL: min_lt_v8i16: 1133; AVX: # %bb.0: 1134; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 1135; AVX-NEXT: retq 1136 %1 = icmp ult <8 x i16> %a, %b 1137 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b 1138 ret <8 x i16> %2 1139} 1140 1141define <16 x i16> @min_lt_v16i16(<16 x i16> %a, <16 x i16> %b) { 1142; SSE2-LABEL: min_lt_v16i16: 1143; SSE2: # %bb.0: 1144; SSE2-NEXT: movdqa %xmm0, %xmm4 1145; SSE2-NEXT: psubusw %xmm2, %xmm4 1146; SSE2-NEXT: psubw %xmm4, %xmm0 1147; SSE2-NEXT: movdqa %xmm1, %xmm2 1148; SSE2-NEXT: psubusw %xmm3, %xmm2 1149; SSE2-NEXT: psubw %xmm2, %xmm1 1150; SSE2-NEXT: retq 1151; 1152; SSE41-LABEL: min_lt_v16i16: 1153; SSE41: # %bb.0: 1154; SSE41-NEXT: pminuw %xmm2, %xmm0 1155; SSE41-NEXT: pminuw %xmm3, %xmm1 1156; SSE41-NEXT: retq 1157; 1158; SSE42-LABEL: min_lt_v16i16: 1159; SSE42: # %bb.0: 1160; SSE42-NEXT: pminuw %xmm2, %xmm0 1161; SSE42-NEXT: pminuw %xmm3, %xmm1 1162; SSE42-NEXT: retq 1163; 1164; AVX1-LABEL: min_lt_v16i16: 1165; AVX1: # %bb.0: 1166; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1167; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1168; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm2 1169; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm0 1170; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1171; AVX1-NEXT: retq 1172; 1173; AVX2-LABEL: min_lt_v16i16: 1174; AVX2: # %bb.0: 1175; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0 1176; AVX2-NEXT: retq 1177; 1178; AVX512-LABEL: min_lt_v16i16: 1179; AVX512: # %bb.0: 1180; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0 1181; AVX512-NEXT: retq 1182 %1 = icmp ult <16 x i16> %a, %b 1183 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b 1184 ret <16 x i16> %2 1185} 1186 1187define <16 x i8> @min_lt_v16i8(<16 x i8> %a, <16 x i8> %b) { 1188; SSE-LABEL: min_lt_v16i8: 1189; SSE: # %bb.0: 1190; SSE-NEXT: pminub %xmm1, %xmm0 1191; SSE-NEXT: retq 1192; 1193; AVX-LABEL: min_lt_v16i8: 1194; AVX: # %bb.0: 1195; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0 1196; AVX-NEXT: retq 1197 %1 = icmp ult <16 x i8> %a, %b 1198 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b 1199 ret <16 x i8> %2 1200} 1201 1202define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) { 1203; SSE-LABEL: min_lt_v32i8: 1204; SSE: # %bb.0: 1205; SSE-NEXT: pminub %xmm2, %xmm0 1206; SSE-NEXT: pminub %xmm3, %xmm1 1207; SSE-NEXT: retq 1208; 1209; AVX1-LABEL: min_lt_v32i8: 1210; AVX1: # %bb.0: 1211; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1212; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1213; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm2 1214; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm0 1215; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1216; AVX1-NEXT: retq 1217; 1218; AVX2-LABEL: min_lt_v32i8: 1219; AVX2: # %bb.0: 1220; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0 1221; AVX2-NEXT: retq 1222; 1223; AVX512-LABEL: min_lt_v32i8: 1224; AVX512: # %bb.0: 1225; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0 1226; AVX512-NEXT: retq 1227 %1 = icmp ult <32 x i8> %a, %b 1228 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b 1229 ret <32 x i8> %2 1230} 1231 1232; 1233; Unsigned Minimum (LE) 1234; 1235 1236define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { 1237; SSE2-LABEL: min_le_v2i64: 1238; SSE2: # %bb.0: 1239; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] 1240; SSE2-NEXT: movdqa %xmm0, %xmm3 1241; SSE2-NEXT: pxor %xmm2, %xmm3 1242; SSE2-NEXT: pxor %xmm1, %xmm2 1243; SSE2-NEXT: movdqa %xmm2, %xmm4 1244; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 1245; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] 1246; SSE2-NEXT: pcmpeqd %xmm3, %xmm2 1247; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 1248; SSE2-NEXT: pand %xmm5, %xmm2 1249; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] 1250; SSE2-NEXT: por %xmm2, %xmm3 1251; SSE2-NEXT: pand %xmm3, %xmm0 1252; SSE2-NEXT: pandn %xmm1, %xmm3 1253; SSE2-NEXT: por %xmm3, %xmm0 1254; SSE2-NEXT: retq 1255; 1256; SSE41-LABEL: min_le_v2i64: 1257; SSE41: # %bb.0: 1258; SSE41-NEXT: movdqa %xmm0, %xmm2 1259; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456] 1260; SSE41-NEXT: pxor %xmm3, %xmm0 1261; SSE41-NEXT: pxor %xmm1, %xmm3 1262; SSE41-NEXT: movdqa %xmm3, %xmm4 1263; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 1264; SSE41-NEXT: pcmpgtd %xmm0, %xmm3 1265; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2] 1266; SSE41-NEXT: pand %xmm4, %xmm0 1267; SSE41-NEXT: por %xmm3, %xmm0 1268; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1 1269; SSE41-NEXT: movapd %xmm1, %xmm0 1270; SSE41-NEXT: retq 1271; 1272; SSE42-LABEL: min_le_v2i64: 1273; SSE42: # %bb.0: 1274; SSE42-NEXT: movdqa %xmm0, %xmm2 1275; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808] 1276; SSE42-NEXT: movdqa %xmm2, %xmm3 1277; SSE42-NEXT: pxor %xmm0, %xmm3 1278; SSE42-NEXT: pxor %xmm1, %xmm0 1279; SSE42-NEXT: pcmpgtq %xmm3, %xmm0 1280; SSE42-NEXT: blendvpd %xmm0, %xmm2, %xmm1 1281; SSE42-NEXT: movapd %xmm1, %xmm0 1282; SSE42-NEXT: retq 1283; 1284; AVX1-LABEL: min_le_v2i64: 1285; AVX1: # %bb.0: 1286; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 1287; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm3 1288; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm2 1289; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 1290; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 1291; AVX1-NEXT: retq 1292; 1293; AVX2-LABEL: min_le_v2i64: 1294; AVX2: # %bb.0: 1295; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 1296; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm3 1297; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm2 1298; AVX2-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 1299; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 1300; AVX2-NEXT: retq 1301; 1302; AVX512-LABEL: min_le_v2i64: 1303; AVX512: # %bb.0: 1304; AVX512-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 1305; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 1306; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0 1307; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 1308; AVX512-NEXT: vzeroupper 1309; AVX512-NEXT: retq 1310 %1 = icmp ule <2 x i64> %a, %b 1311 %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b 1312 ret <2 x i64> %2 1313} 1314 1315define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { 1316; SSE2-LABEL: min_le_v4i64: 1317; SSE2: # %bb.0: 1318; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] 1319; SSE2-NEXT: movdqa %xmm0, %xmm5 1320; SSE2-NEXT: pxor %xmm4, %xmm5 1321; SSE2-NEXT: movdqa %xmm2, %xmm6 1322; SSE2-NEXT: pxor %xmm4, %xmm6 1323; SSE2-NEXT: movdqa %xmm6, %xmm7 1324; SSE2-NEXT: pcmpgtd %xmm5, %xmm7 1325; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2] 1326; SSE2-NEXT: pcmpeqd %xmm5, %xmm6 1327; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 1328; SSE2-NEXT: pand %xmm8, %xmm5 1329; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3] 1330; SSE2-NEXT: por %xmm5, %xmm6 1331; SSE2-NEXT: pand %xmm6, %xmm0 1332; SSE2-NEXT: pandn %xmm2, %xmm6 1333; SSE2-NEXT: por %xmm6, %xmm0 1334; SSE2-NEXT: movdqa %xmm1, %xmm2 1335; SSE2-NEXT: pxor %xmm4, %xmm2 1336; SSE2-NEXT: pxor %xmm3, %xmm4 1337; SSE2-NEXT: movdqa %xmm4, %xmm5 1338; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 1339; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] 1340; SSE2-NEXT: pcmpeqd %xmm2, %xmm4 1341; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] 1342; SSE2-NEXT: pand %xmm6, %xmm2 1343; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3] 1344; SSE2-NEXT: por %xmm2, %xmm4 1345; SSE2-NEXT: pand %xmm4, %xmm1 1346; SSE2-NEXT: pandn %xmm3, %xmm4 1347; SSE2-NEXT: por %xmm4, %xmm1 1348; SSE2-NEXT: retq 1349; 1350; SSE41-LABEL: min_le_v4i64: 1351; SSE41: # %bb.0: 1352; SSE41-NEXT: movdqa %xmm0, %xmm4 1353; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456] 1354; SSE41-NEXT: pxor %xmm5, %xmm0 1355; SSE41-NEXT: movdqa %xmm2, %xmm6 1356; SSE41-NEXT: pxor %xmm5, %xmm6 1357; SSE41-NEXT: movdqa %xmm6, %xmm7 1358; SSE41-NEXT: pcmpeqd %xmm0, %xmm7 1359; SSE41-NEXT: pcmpgtd %xmm0, %xmm6 1360; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2] 1361; SSE41-NEXT: pand %xmm7, %xmm0 1362; SSE41-NEXT: por %xmm6, %xmm0 1363; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm2 1364; SSE41-NEXT: movdqa %xmm1, %xmm0 1365; SSE41-NEXT: pxor %xmm5, %xmm0 1366; SSE41-NEXT: pxor %xmm3, %xmm5 1367; SSE41-NEXT: movdqa %xmm5, %xmm4 1368; SSE41-NEXT: pcmpeqd %xmm0, %xmm4 1369; SSE41-NEXT: pcmpgtd %xmm0, %xmm5 1370; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2] 1371; SSE41-NEXT: pand %xmm4, %xmm0 1372; SSE41-NEXT: por %xmm5, %xmm0 1373; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm3 1374; SSE41-NEXT: movapd %xmm2, %xmm0 1375; SSE41-NEXT: movapd %xmm3, %xmm1 1376; SSE41-NEXT: retq 1377; 1378; SSE42-LABEL: min_le_v4i64: 1379; SSE42: # %bb.0: 1380; SSE42-NEXT: movdqa %xmm0, %xmm4 1381; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808] 1382; SSE42-NEXT: movdqa %xmm0, %xmm6 1383; SSE42-NEXT: pxor %xmm5, %xmm6 1384; SSE42-NEXT: movdqa %xmm2, %xmm0 1385; SSE42-NEXT: pxor %xmm5, %xmm0 1386; SSE42-NEXT: pcmpgtq %xmm6, %xmm0 1387; SSE42-NEXT: blendvpd %xmm0, %xmm4, %xmm2 1388; SSE42-NEXT: movdqa %xmm1, %xmm0 1389; SSE42-NEXT: pxor %xmm5, %xmm0 1390; SSE42-NEXT: pxor %xmm3, %xmm5 1391; SSE42-NEXT: pcmpgtq %xmm0, %xmm5 1392; SSE42-NEXT: movdqa %xmm5, %xmm0 1393; SSE42-NEXT: blendvpd %xmm0, %xmm1, %xmm3 1394; SSE42-NEXT: movapd %xmm2, %xmm0 1395; SSE42-NEXT: movapd %xmm3, %xmm1 1396; SSE42-NEXT: retq 1397; 1398; AVX1-LABEL: min_le_v4i64: 1399; AVX1: # %bb.0: 1400; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1401; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808] 1402; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm2 1403; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 1404; AVX1-NEXT: vpxor %xmm3, %xmm4, %xmm4 1405; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm2 1406; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm4 1407; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm3 1408; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3 1409; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 1410; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 1411; AVX1-NEXT: retq 1412; 1413; AVX2-LABEL: min_le_v4i64: 1414; AVX2: # %bb.0: 1415; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808] 1416; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm3 1417; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm2 1418; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2 1419; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 1420; AVX2-NEXT: retq 1421; 1422; AVX512-LABEL: min_le_v4i64: 1423; AVX512: # %bb.0: 1424; AVX512-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1425; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1426; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0 1427; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 1428; AVX512-NEXT: retq 1429 %1 = icmp ule <4 x i64> %a, %b 1430 %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b 1431 ret <4 x i64> %2 1432} 1433 1434define <4 x i32> @min_le_v4i32(<4 x i32> %a, <4 x i32> %b) { 1435; SSE2-LABEL: min_le_v4i32: 1436; SSE2: # %bb.0: 1437; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] 1438; SSE2-NEXT: movdqa %xmm0, %xmm3 1439; SSE2-NEXT: pxor %xmm2, %xmm3 1440; SSE2-NEXT: pxor %xmm1, %xmm2 1441; SSE2-NEXT: pcmpgtd %xmm3, %xmm2 1442; SSE2-NEXT: pand %xmm2, %xmm0 1443; SSE2-NEXT: pandn %xmm1, %xmm2 1444; SSE2-NEXT: por %xmm2, %xmm0 1445; SSE2-NEXT: retq 1446; 1447; SSE41-LABEL: min_le_v4i32: 1448; SSE41: # %bb.0: 1449; SSE41-NEXT: pminud %xmm1, %xmm0 1450; SSE41-NEXT: retq 1451; 1452; SSE42-LABEL: min_le_v4i32: 1453; SSE42: # %bb.0: 1454; SSE42-NEXT: pminud %xmm1, %xmm0 1455; SSE42-NEXT: retq 1456; 1457; AVX-LABEL: min_le_v4i32: 1458; AVX: # %bb.0: 1459; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0 1460; AVX-NEXT: retq 1461 %1 = icmp ule <4 x i32> %a, %b 1462 %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b 1463 ret <4 x i32> %2 1464} 1465 1466define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) { 1467; SSE2-LABEL: min_le_v8i32: 1468; SSE2: # %bb.0: 1469; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648] 1470; SSE2-NEXT: movdqa %xmm0, %xmm5 1471; SSE2-NEXT: pxor %xmm4, %xmm5 1472; SSE2-NEXT: movdqa %xmm2, %xmm6 1473; SSE2-NEXT: pxor %xmm4, %xmm6 1474; SSE2-NEXT: pcmpgtd %xmm5, %xmm6 1475; SSE2-NEXT: pand %xmm6, %xmm0 1476; SSE2-NEXT: pandn %xmm2, %xmm6 1477; SSE2-NEXT: por %xmm6, %xmm0 1478; SSE2-NEXT: movdqa %xmm1, %xmm2 1479; SSE2-NEXT: pxor %xmm4, %xmm2 1480; SSE2-NEXT: pxor %xmm3, %xmm4 1481; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 1482; SSE2-NEXT: pand %xmm4, %xmm1 1483; SSE2-NEXT: pandn %xmm3, %xmm4 1484; SSE2-NEXT: por %xmm4, %xmm1 1485; SSE2-NEXT: retq 1486; 1487; SSE41-LABEL: min_le_v8i32: 1488; SSE41: # %bb.0: 1489; SSE41-NEXT: pminud %xmm2, %xmm0 1490; SSE41-NEXT: pminud %xmm3, %xmm1 1491; SSE41-NEXT: retq 1492; 1493; SSE42-LABEL: min_le_v8i32: 1494; SSE42: # %bb.0: 1495; SSE42-NEXT: pminud %xmm2, %xmm0 1496; SSE42-NEXT: pminud %xmm3, %xmm1 1497; SSE42-NEXT: retq 1498; 1499; AVX1-LABEL: min_le_v8i32: 1500; AVX1: # %bb.0: 1501; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1502; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1503; AVX1-NEXT: vpminud %xmm2, %xmm3, %xmm2 1504; AVX1-NEXT: vpminud %xmm1, %xmm0, %xmm0 1505; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1506; AVX1-NEXT: retq 1507; 1508; AVX2-LABEL: min_le_v8i32: 1509; AVX2: # %bb.0: 1510; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0 1511; AVX2-NEXT: retq 1512; 1513; AVX512-LABEL: min_le_v8i32: 1514; AVX512: # %bb.0: 1515; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0 1516; AVX512-NEXT: retq 1517 %1 = icmp ule <8 x i32> %a, %b 1518 %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b 1519 ret <8 x i32> %2 1520} 1521 1522define <8 x i16> @min_le_v8i16(<8 x i16> %a, <8 x i16> %b) { 1523; SSE2-LABEL: min_le_v8i16: 1524; SSE2: # %bb.0: 1525; SSE2-NEXT: movdqa %xmm0, %xmm2 1526; SSE2-NEXT: psubusw %xmm1, %xmm2 1527; SSE2-NEXT: psubw %xmm2, %xmm0 1528; SSE2-NEXT: retq 1529; 1530; SSE41-LABEL: min_le_v8i16: 1531; SSE41: # %bb.0: 1532; SSE41-NEXT: pminuw %xmm1, %xmm0 1533; SSE41-NEXT: retq 1534; 1535; SSE42-LABEL: min_le_v8i16: 1536; SSE42: # %bb.0: 1537; SSE42-NEXT: pminuw %xmm1, %xmm0 1538; SSE42-NEXT: retq 1539; 1540; AVX-LABEL: min_le_v8i16: 1541; AVX: # %bb.0: 1542; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 1543; AVX-NEXT: retq 1544 %1 = icmp ule <8 x i16> %a, %b 1545 %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b 1546 ret <8 x i16> %2 1547} 1548 1549define <16 x i16> @min_le_v16i16(<16 x i16> %a, <16 x i16> %b) { 1550; SSE2-LABEL: min_le_v16i16: 1551; SSE2: # %bb.0: 1552; SSE2-NEXT: movdqa %xmm0, %xmm4 1553; SSE2-NEXT: psubusw %xmm2, %xmm4 1554; SSE2-NEXT: psubw %xmm4, %xmm0 1555; SSE2-NEXT: movdqa %xmm1, %xmm2 1556; SSE2-NEXT: psubusw %xmm3, %xmm2 1557; SSE2-NEXT: psubw %xmm2, %xmm1 1558; SSE2-NEXT: retq 1559; 1560; SSE41-LABEL: min_le_v16i16: 1561; SSE41: # %bb.0: 1562; SSE41-NEXT: pminuw %xmm2, %xmm0 1563; SSE41-NEXT: pminuw %xmm3, %xmm1 1564; SSE41-NEXT: retq 1565; 1566; SSE42-LABEL: min_le_v16i16: 1567; SSE42: # %bb.0: 1568; SSE42-NEXT: pminuw %xmm2, %xmm0 1569; SSE42-NEXT: pminuw %xmm3, %xmm1 1570; SSE42-NEXT: retq 1571; 1572; AVX1-LABEL: min_le_v16i16: 1573; AVX1: # %bb.0: 1574; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1575; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1576; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm2 1577; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm0 1578; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1579; AVX1-NEXT: retq 1580; 1581; AVX2-LABEL: min_le_v16i16: 1582; AVX2: # %bb.0: 1583; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0 1584; AVX2-NEXT: retq 1585; 1586; AVX512-LABEL: min_le_v16i16: 1587; AVX512: # %bb.0: 1588; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0 1589; AVX512-NEXT: retq 1590 %1 = icmp ule <16 x i16> %a, %b 1591 %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b 1592 ret <16 x i16> %2 1593} 1594 1595define <16 x i8> @min_le_v16i8(<16 x i8> %a, <16 x i8> %b) { 1596; SSE-LABEL: min_le_v16i8: 1597; SSE: # %bb.0: 1598; SSE-NEXT: pminub %xmm1, %xmm0 1599; SSE-NEXT: retq 1600; 1601; AVX-LABEL: min_le_v16i8: 1602; AVX: # %bb.0: 1603; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0 1604; AVX-NEXT: retq 1605 %1 = icmp ule <16 x i8> %a, %b 1606 %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b 1607 ret <16 x i8> %2 1608} 1609 1610define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { 1611; SSE-LABEL: min_le_v32i8: 1612; SSE: # %bb.0: 1613; SSE-NEXT: pminub %xmm2, %xmm0 1614; SSE-NEXT: pminub %xmm3, %xmm1 1615; SSE-NEXT: retq 1616; 1617; AVX1-LABEL: min_le_v32i8: 1618; AVX1: # %bb.0: 1619; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1620; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1621; AVX1-NEXT: vpminub %xmm2, %xmm3, %xmm2 1622; AVX1-NEXT: vpminub %xmm1, %xmm0, %xmm0 1623; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1624; AVX1-NEXT: retq 1625; 1626; AVX2-LABEL: min_le_v32i8: 1627; AVX2: # %bb.0: 1628; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0 1629; AVX2-NEXT: retq 1630; 1631; AVX512-LABEL: min_le_v32i8: 1632; AVX512: # %bb.0: 1633; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0 1634; AVX512-NEXT: retq 1635 %1 = icmp ule <32 x i8> %a, %b 1636 %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b 1637 ret <32 x i8> %2 1638} 1639 1640; 1641; Constant Folding 1642; 1643 1644define <2 x i64> @max_gt_v2i64c() { 1645; SSE-LABEL: max_gt_v2i64c: 1646; SSE: # %bb.0: 1647; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] 1648; SSE-NEXT: retq 1649; 1650; AVX-LABEL: max_gt_v2i64c: 1651; AVX: # %bb.0: 1652; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] 1653; AVX-NEXT: retq 1654 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 1655 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0 1656 %3 = icmp ugt <2 x i64> %1, %2 1657 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2 1658 ret <2 x i64> %4 1659} 1660 1661define <4 x i64> @max_gt_v4i64c() { 1662; SSE-LABEL: max_gt_v4i64c: 1663; SSE: # %bb.0: 1664; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] 1665; SSE-NEXT: pcmpeqd %xmm0, %xmm0 1666; SSE-NEXT: retq 1667; 1668; AVX-LABEL: max_gt_v4i64c: 1669; AVX: # %bb.0: 1670; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] 1671; AVX-NEXT: retq 1672 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 1673 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0 1674 %3 = icmp ugt <4 x i64> %1, %2 1675 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2 1676 ret <4 x i64> %4 1677} 1678 1679define <4 x i32> @max_gt_v4i32c() { 1680; SSE-LABEL: max_gt_v4i32c: 1681; SSE: # %bb.0: 1682; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] 1683; SSE-NEXT: retq 1684; 1685; AVX-LABEL: max_gt_v4i32c: 1686; AVX: # %bb.0: 1687; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] 1688; AVX-NEXT: retq 1689 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 1690 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0 1691 %3 = icmp ugt <4 x i32> %1, %2 1692 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2 1693 ret <4 x i32> %4 1694} 1695 1696define <8 x i32> @max_gt_v8i32c() { 1697; SSE-LABEL: max_gt_v8i32c: 1698; SSE: # %bb.0: 1699; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] 1700; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] 1701; SSE-NEXT: retq 1702; 1703; AVX-LABEL: max_gt_v8i32c: 1704; AVX: # %bb.0: 1705; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7] 1706; AVX-NEXT: retq 1707 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 1708 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0 1709 %3 = icmp ugt <8 x i32> %1, %2 1710 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2 1711 ret <8 x i32> %4 1712} 1713 1714define <8 x i16> @max_gt_v8i16c() { 1715; SSE-LABEL: max_gt_v8i16c: 1716; SSE: # %bb.0: 1717; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] 1718; SSE-NEXT: retq 1719; 1720; AVX-LABEL: max_gt_v8i16c: 1721; AVX: # %bb.0: 1722; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] 1723; AVX-NEXT: retq 1724 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 1725 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0 1726 %3 = icmp ugt <8 x i16> %1, %2 1727 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2 1728 ret <8 x i16> %4 1729} 1730 1731define <16 x i16> @max_gt_v16i16c() { 1732; SSE-LABEL: max_gt_v16i16c: 1733; SSE: # %bb.0: 1734; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] 1735; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] 1736; SSE-NEXT: retq 1737; 1738; AVX-LABEL: max_gt_v16i16c: 1739; AVX: # %bb.0: 1740; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8] 1741; AVX-NEXT: retq 1742 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 1743 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0 1744 %3 = icmp ugt <16 x i16> %1, %2 1745 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2 1746 ret <16 x i16> %4 1747} 1748 1749define <16 x i8> @max_gt_v16i8c() { 1750; SSE-LABEL: max_gt_v16i8c: 1751; SSE: # %bb.0: 1752; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] 1753; SSE-NEXT: retq 1754; 1755; AVX-LABEL: max_gt_v16i8c: 1756; AVX: # %bb.0: 1757; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] 1758; AVX-NEXT: retq 1759 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 1760 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0 1761 %3 = icmp ugt <16 x i8> %1, %2 1762 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2 1763 ret <16 x i8> %4 1764} 1765 1766define <2 x i64> @max_ge_v2i64c() { 1767; SSE-LABEL: max_ge_v2i64c: 1768; SSE: # %bb.0: 1769; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] 1770; SSE-NEXT: retq 1771; 1772; AVX-LABEL: max_ge_v2i64c: 1773; AVX: # %bb.0: 1774; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] 1775; AVX-NEXT: retq 1776 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 1777 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0 1778 %3 = icmp uge <2 x i64> %1, %2 1779 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2 1780 ret <2 x i64> %4 1781} 1782 1783define <4 x i64> @max_ge_v4i64c() { 1784; SSE-LABEL: max_ge_v4i64c: 1785; SSE: # %bb.0: 1786; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] 1787; SSE-NEXT: pcmpeqd %xmm0, %xmm0 1788; SSE-NEXT: retq 1789; 1790; AVX-LABEL: max_ge_v4i64c: 1791; AVX: # %bb.0: 1792; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] 1793; AVX-NEXT: retq 1794 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 1795 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0 1796 %3 = icmp uge <4 x i64> %1, %2 1797 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2 1798 ret <4 x i64> %4 1799} 1800 1801define <4 x i32> @max_ge_v4i32c() { 1802; SSE-LABEL: max_ge_v4i32c: 1803; SSE: # %bb.0: 1804; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] 1805; SSE-NEXT: retq 1806; 1807; AVX-LABEL: max_ge_v4i32c: 1808; AVX: # %bb.0: 1809; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] 1810; AVX-NEXT: retq 1811 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 1812 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0 1813 %3 = icmp uge <4 x i32> %1, %2 1814 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2 1815 ret <4 x i32> %4 1816} 1817 1818define <8 x i32> @max_ge_v8i32c() { 1819; SSE-LABEL: max_ge_v8i32c: 1820; SSE: # %bb.0: 1821; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] 1822; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] 1823; SSE-NEXT: retq 1824; 1825; AVX-LABEL: max_ge_v8i32c: 1826; AVX: # %bb.0: 1827; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7] 1828; AVX-NEXT: retq 1829 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 1830 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0 1831 %3 = icmp uge <8 x i32> %1, %2 1832 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2 1833 ret <8 x i32> %4 1834} 1835 1836define <8 x i16> @max_ge_v8i16c() { 1837; SSE-LABEL: max_ge_v8i16c: 1838; SSE: # %bb.0: 1839; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] 1840; SSE-NEXT: retq 1841; 1842; AVX-LABEL: max_ge_v8i16c: 1843; AVX: # %bb.0: 1844; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] 1845; AVX-NEXT: retq 1846 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 1847 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0 1848 %3 = icmp uge <8 x i16> %1, %2 1849 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2 1850 ret <8 x i16> %4 1851} 1852 1853define <16 x i16> @max_ge_v16i16c() { 1854; SSE-LABEL: max_ge_v16i16c: 1855; SSE: # %bb.0: 1856; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] 1857; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] 1858; SSE-NEXT: retq 1859; 1860; AVX-LABEL: max_ge_v16i16c: 1861; AVX: # %bb.0: 1862; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8] 1863; AVX-NEXT: retq 1864 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 1865 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0 1866 %3 = icmp uge <16 x i16> %1, %2 1867 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2 1868 ret <16 x i16> %4 1869} 1870 1871define <16 x i8> @max_ge_v16i8c() { 1872; SSE-LABEL: max_ge_v16i8c: 1873; SSE: # %bb.0: 1874; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] 1875; SSE-NEXT: retq 1876; 1877; AVX-LABEL: max_ge_v16i8c: 1878; AVX: # %bb.0: 1879; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] 1880; AVX-NEXT: retq 1881 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 1882 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0 1883 %3 = icmp uge <16 x i8> %1, %2 1884 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2 1885 ret <16 x i8> %4 1886} 1887 1888define <2 x i64> @min_lt_v2i64c() { 1889; SSE-LABEL: min_lt_v2i64c: 1890; SSE: # %bb.0: 1891; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] 1892; SSE-NEXT: retq 1893; 1894; AVX-LABEL: min_lt_v2i64c: 1895; AVX: # %bb.0: 1896; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] 1897; AVX-NEXT: retq 1898 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 1899 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0 1900 %3 = icmp ult <2 x i64> %1, %2 1901 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2 1902 ret <2 x i64> %4 1903} 1904 1905define <4 x i64> @min_lt_v4i64c() { 1906; SSE-LABEL: min_lt_v4i64c: 1907; SSE: # %bb.0: 1908; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] 1909; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] 1910; SSE-NEXT: retq 1911; 1912; AVX-LABEL: min_lt_v4i64c: 1913; AVX: # %bb.0: 1914; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] 1915; AVX-NEXT: retq 1916 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 1917 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0 1918 %3 = icmp ult <4 x i64> %1, %2 1919 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2 1920 ret <4 x i64> %4 1921} 1922 1923define <4 x i32> @min_lt_v4i32c() { 1924; SSE-LABEL: min_lt_v4i32c: 1925; SSE: # %bb.0: 1926; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] 1927; SSE-NEXT: retq 1928; 1929; AVX-LABEL: min_lt_v4i32c: 1930; AVX: # %bb.0: 1931; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] 1932; AVX-NEXT: retq 1933 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 1934 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0 1935 %3 = icmp ult <4 x i32> %1, %2 1936 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2 1937 ret <4 x i32> %4 1938} 1939 1940define <8 x i32> @min_lt_v8i32c() { 1941; SSE-LABEL: min_lt_v8i32c: 1942; SSE: # %bb.0: 1943; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] 1944; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] 1945; SSE-NEXT: retq 1946; 1947; AVX-LABEL: min_lt_v8i32c: 1948; AVX: # %bb.0: 1949; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1] 1950; AVX-NEXT: retq 1951 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 1952 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0 1953 %3 = icmp ult <8 x i32> %1, %2 1954 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2 1955 ret <8 x i32> %4 1956} 1957 1958define <8 x i16> @min_lt_v8i16c() { 1959; SSE-LABEL: min_lt_v8i16c: 1960; SSE: # %bb.0: 1961; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1] 1962; SSE-NEXT: retq 1963; 1964; AVX-LABEL: min_lt_v8i16c: 1965; AVX: # %bb.0: 1966; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1] 1967; AVX-NEXT: retq 1968 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 1969 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 1, i32 0 1970 %3 = icmp ult <8 x i16> %1, %2 1971 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2 1972 ret <8 x i16> %4 1973} 1974 1975define <16 x i16> @min_lt_v16i16c() { 1976; SSE-LABEL: min_lt_v16i16c: 1977; SSE: # %bb.0: 1978; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0] 1979; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] 1980; SSE-NEXT: retq 1981; 1982; AVX-LABEL: min_lt_v16i16c: 1983; AVX: # %bb.0: 1984; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [1,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0] 1985; AVX-NEXT: retq 1986 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 1987 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 1, i32 0 1988 %3 = icmp ult <16 x i16> %1, %2 1989 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2 1990 ret <16 x i16> %4 1991} 1992 1993define <16 x i8> @min_lt_v16i8c() { 1994; SSE-LABEL: min_lt_v16i8c: 1995; SSE: # %bb.0: 1996; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] 1997; SSE-NEXT: retq 1998; 1999; AVX-LABEL: min_lt_v16i8c: 2000; AVX: # %bb.0: 2001; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] 2002; AVX-NEXT: retq 2003 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 2004 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 1, i32 0 2005 %3 = icmp ult <16 x i8> %1, %2 2006 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2 2007 ret <16 x i8> %4 2008} 2009 2010define <2 x i64> @min_le_v2i64c() { 2011; SSE-LABEL: min_le_v2i64c: 2012; SSE: # %bb.0: 2013; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] 2014; SSE-NEXT: retq 2015; 2016; AVX-LABEL: min_le_v2i64c: 2017; AVX: # %bb.0: 2018; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] 2019; AVX-NEXT: retq 2020 %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 2021 %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0 2022 %3 = icmp ule <2 x i64> %1, %2 2023 %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2 2024 ret <2 x i64> %4 2025} 2026 2027define <4 x i64> @min_le_v4i64c() { 2028; SSE-LABEL: min_le_v4i64c: 2029; SSE: # %bb.0: 2030; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] 2031; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] 2032; SSE-NEXT: retq 2033; 2034; AVX-LABEL: min_le_v4i64c: 2035; AVX: # %bb.0: 2036; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] 2037; AVX-NEXT: retq 2038 %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 2039 %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0 2040 %3 = icmp ule <4 x i64> %1, %2 2041 %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2 2042 ret <4 x i64> %4 2043} 2044 2045define <4 x i32> @min_le_v4i32c() { 2046; SSE-LABEL: min_le_v4i32c: 2047; SSE: # %bb.0: 2048; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] 2049; SSE-NEXT: retq 2050; 2051; AVX-LABEL: min_le_v4i32c: 2052; AVX: # %bb.0: 2053; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] 2054; AVX-NEXT: retq 2055 %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 2056 %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0 2057 %3 = icmp ule <4 x i32> %1, %2 2058 %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2 2059 ret <4 x i32> %4 2060} 2061 2062define <8 x i32> @min_le_v8i32c() { 2063; SSE-LABEL: min_le_v8i32c: 2064; SSE: # %bb.0: 2065; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] 2066; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] 2067; SSE-NEXT: retq 2068; 2069; AVX-LABEL: min_le_v8i32c: 2070; AVX: # %bb.0: 2071; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1] 2072; AVX-NEXT: retq 2073 %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 2074 %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0 2075 %3 = icmp ule <8 x i32> %1, %2 2076 %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2 2077 ret <8 x i32> %4 2078} 2079 2080define <8 x i16> @min_le_v8i16c() { 2081; SSE-LABEL: min_le_v8i16c: 2082; SSE: # %bb.0: 2083; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] 2084; SSE-NEXT: retq 2085; 2086; AVX-LABEL: min_le_v8i16c: 2087; AVX: # %bb.0: 2088; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] 2089; AVX-NEXT: retq 2090 %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 2091 %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0 2092 %3 = icmp ule <8 x i16> %1, %2 2093 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2 2094 ret <8 x i16> %4 2095} 2096 2097define <16 x i16> @min_le_v16i16c() { 2098; SSE-LABEL: min_le_v16i16c: 2099; SSE: # %bb.0: 2100; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0] 2101; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] 2102; SSE-NEXT: retq 2103; 2104; AVX-LABEL: min_le_v16i16c: 2105; AVX: # %bb.0: 2106; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0] 2107; AVX-NEXT: retq 2108 %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 2109 %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0 2110 %3 = icmp ule <16 x i16> %1, %2 2111 %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2 2112 ret <16 x i16> %4 2113} 2114 2115define <16 x i8> @min_le_v16i8c() { 2116; SSE-LABEL: min_le_v16i8c: 2117; SSE: # %bb.0: 2118; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] 2119; SSE-NEXT: retq 2120; 2121; AVX-LABEL: min_le_v16i8c: 2122; AVX: # %bb.0: 2123; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] 2124; AVX-NEXT: retq 2125 %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 2126 %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0 2127 %3 = icmp ule <16 x i8> %1, %2 2128 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2 2129 ret <16 x i8> %4 2130} 2131