1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64 4 5define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind { 6; CHECK-LABEL: t1: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: psllw %xmm1, %xmm0 9; CHECK-NEXT: ret{{[l|q]}} 10entry: 11 %tmp6 = bitcast <2 x i64> %c to <8 x i16> ; <<8 x i16>> [#uses=1] 12 %tmp8 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1] 13 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind readnone ; <<8 x i16>> [#uses=1] 14 %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1] 15 ret <2 x i64> %tmp10 16} 17 18define <2 x i64> @t3(<2 x i64> %b1, i32 %c) nounwind { 19; X86-LABEL: t3: 20; X86: # %bb.0: # %entry 21; X86-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 22; X86-NEXT: psraw %xmm1, %xmm0 23; X86-NEXT: retl 24; 25; X64-LABEL: t3: 26; X64: # %bb.0: # %entry 27; X64-NEXT: movd %edi, %xmm1 28; X64-NEXT: psraw %xmm1, %xmm0 29; X64-NEXT: retq 30entry: 31 %tmp2 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1] 32 %tmp4 = insertelement <4 x i32> undef, i32 %c, i32 0 ; <<4 x i32>> [#uses=1] 33 %tmp8 = bitcast <4 x i32> %tmp4 to <8 x i16> ; <<8 x i16>> [#uses=1] 34 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16>> [#uses=1] 35 %tmp11 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1] 36 ret <2 x i64> %tmp11 37} 38 39declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone 40 41define <2 x i64> @t2(<2 x i64> %b1, <2 x i64> %c) nounwind { 42; CHECK-LABEL: t2: 43; CHECK: # %bb.0: # %entry 44; CHECK-NEXT: psrlq %xmm1, %xmm0 45; CHECK-NEXT: ret{{[l|q]}} 46entry: 47 %tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone ; <<2 x i64>> [#uses=1] 48 ret <2 x i64> %tmp9 49} 50 51declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone 52 53declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone 54