1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE 4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX 6 7define i64 @extract_any_extend_vector_inreg_v16i64(<16 x i64> %a0, i32 %a1) nounwind { 8; X86-SSE-LABEL: extract_any_extend_vector_inreg_v16i64: 9; X86-SSE: # %bb.0: 10; X86-SSE-NEXT: pushl %ebp 11; X86-SSE-NEXT: movl %esp, %ebp 12; X86-SSE-NEXT: andl $-16, %esp 13; X86-SSE-NEXT: subl $272, %esp # imm = 0x110 14; X86-SSE-NEXT: movl 88(%ebp), %ecx 15; X86-SSE-NEXT: movdqa 72(%ebp), %xmm0 16; X86-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero 17; X86-SSE-NEXT: xorps %xmm1, %xmm1 18; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 19; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 20; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 21; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 22; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 23; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 24; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 25; X86-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp) 26; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 27; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 28; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 29; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 30; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 31; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) 32; X86-SSE-NEXT: movaps %xmm1, (%esp) 33; X86-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp) 34; X86-SSE-NEXT: leal (%ecx,%ecx), %eax 35; X86-SSE-NEXT: andl $31, %eax 36; X86-SSE-NEXT: movl 128(%esp,%eax,4), %eax 37; X86-SSE-NEXT: leal 1(%ecx,%ecx), %ecx 38; X86-SSE-NEXT: andl $31, %ecx 39; X86-SSE-NEXT: movl (%esp,%ecx,4), %edx 40; X86-SSE-NEXT: movl %ebp, %esp 41; X86-SSE-NEXT: popl %ebp 42; X86-SSE-NEXT: retl 43; 44; X64-SSE-LABEL: extract_any_extend_vector_inreg_v16i64: 45; X64-SSE: # %bb.0: 46; X64-SSE-NEXT: pushq %rax 47; X64-SSE-NEXT: # kill: def $edi killed $edi def $rdi 48; X64-SSE-NEXT: psrldq {{.*#+}} xmm7 = xmm7[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero 49; X64-SSE-NEXT: xorps %xmm0, %xmm0 50; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 51; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 52; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 53; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 54; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 55; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 56; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 57; X64-SSE-NEXT: movdqa %xmm7, -{{[0-9]+}}(%rsp) 58; X64-SSE-NEXT: andl $15, %edi 59; X64-SSE-NEXT: movq -128(%rsp,%rdi,8), %rax 60; X64-SSE-NEXT: popq %rcx 61; X64-SSE-NEXT: retq 62; 63; X86-AVX-LABEL: extract_any_extend_vector_inreg_v16i64: 64; X86-AVX: # %bb.0: 65; X86-AVX-NEXT: pushl %ebp 66; X86-AVX-NEXT: movl %esp, %ebp 67; X86-AVX-NEXT: andl $-32, %esp 68; X86-AVX-NEXT: subl $288, %esp # imm = 0x120 69; X86-AVX-NEXT: movl 40(%ebp), %ecx 70; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 71; X86-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1 72; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp) 73; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp) 74; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp) 75; X86-AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp) 76; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp) 77; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp) 78; X86-AVX-NEXT: vmovaps %ymm1, (%esp) 79; X86-AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp) 80; X86-AVX-NEXT: leal (%ecx,%ecx), %eax 81; X86-AVX-NEXT: andl $31, %eax 82; X86-AVX-NEXT: movl 128(%esp,%eax,4), %eax 83; X86-AVX-NEXT: leal 1(%ecx,%ecx), %ecx 84; X86-AVX-NEXT: andl $31, %ecx 85; X86-AVX-NEXT: movl (%esp,%ecx,4), %edx 86; X86-AVX-NEXT: movl %ebp, %esp 87; X86-AVX-NEXT: popl %ebp 88; X86-AVX-NEXT: vzeroupper 89; X86-AVX-NEXT: retl 90; 91; X64-AVX-LABEL: extract_any_extend_vector_inreg_v16i64: 92; X64-AVX: # %bb.0: 93; X64-AVX-NEXT: pushq %rbp 94; X64-AVX-NEXT: movq %rsp, %rbp 95; X64-AVX-NEXT: andq $-32, %rsp 96; X64-AVX-NEXT: subq $160, %rsp 97; X64-AVX-NEXT: # kill: def $edi killed $edi def $rdi 98; X64-AVX-NEXT: vpermq {{.*#+}} ymm0 = ymm3[3,3,3,3] 99; X64-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero 100; X64-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1 101; X64-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp) 102; X64-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp) 103; X64-AVX-NEXT: vmovaps %ymm1, (%rsp) 104; X64-AVX-NEXT: vmovdqa %ymm0, {{[0-9]+}}(%rsp) 105; X64-AVX-NEXT: andl $15, %edi 106; X64-AVX-NEXT: movq (%rsp,%rdi,8), %rax 107; X64-AVX-NEXT: movq %rbp, %rsp 108; X64-AVX-NEXT: popq %rbp 109; X64-AVX-NEXT: vzeroupper 110; X64-AVX-NEXT: retq 111 %1 = extractelement <16 x i64> %a0, i32 15 112 %2 = insertelement <16 x i64> zeroinitializer, i64 %1, i32 4 113 %3 = extractelement <16 x i64> %2, i32 %a1 114 ret i64 %3 115} 116