1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86 3; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X86 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX2 6 7declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x i64>, i8) nounwind readnone 8declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x i64>, i8) nounwind readnone 9 10declare <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float>, <4 x float>, <4 x i32>, i8) nounwind readnone 11declare <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float>, <8 x float>, <8 x i32>, i8) nounwind readnone 12 13declare <16 x i8> @llvm.x86.xop.vpperm(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone 14 15define <2 x double> @combine_vpermil2pd_identity(<2 x double> %a0, <2 x double> %a1) { 16; CHECK-LABEL: combine_vpermil2pd_identity: 17; CHECK: # %bb.0: 18; CHECK-NEXT: vmovaps %xmm1, %xmm0 19; CHECK-NEXT: ret{{[l|q]}} 20 %res0 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a1, <2 x double> %a0, <2 x i64> <i64 2, i64 0>, i8 0) 21 %res1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %res0, <2 x double> undef, <2 x i64> <i64 2, i64 0>, i8 0) 22 ret <2 x double> %res1 23} 24 25define <4 x double> @combine_vpermil2pd256_identity(<4 x double> %a0, <4 x double> %a1) { 26; CHECK-LABEL: combine_vpermil2pd256_identity: 27; CHECK: # %bb.0: 28; CHECK-NEXT: vmovaps %ymm1, %ymm0 29; CHECK-NEXT: ret{{[l|q]}} 30 %res0 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a1, <4 x double> %a0, <4 x i64> <i64 2, i64 0, i64 2, i64 0>, i8 0) 31 %res1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %res0, <4 x double> undef, <4 x i64> <i64 2, i64 0, i64 2, i64 0>, i8 0) 32 ret <4 x double> %res1 33} 34 35define <4 x double> @combine_vpermil2pd256_0z73(<4 x double> %a0, <4 x double> %a1) { 36; CHECK-LABEL: combine_vpermil2pd256_0z73: 37; CHECK: # %bb.0: 38; CHECK-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0],zero,ymm1[3],ymm0[3] 39; CHECK-NEXT: ret{{[l|q]}} 40 %res0 = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 undef, i32 7, i32 3> 41 %res1 = shufflevector <4 x double> %res0, <4 x double> zeroinitializer, <4 x i32> <i32 0, i32 7, i32 2, i32 3> 42 ret <4 x double> %res1 43} 44 45define <4 x float> @combine_vpermil2ps_identity(<4 x float> %a0, <4 x float> %a1) { 46; CHECK-LABEL: combine_vpermil2ps_identity: 47; CHECK: # %bb.0: 48; CHECK-NEXT: vmovaps %xmm1, %xmm0 49; CHECK-NEXT: ret{{[l|q]}} 50 %res0 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a1, <4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>, i8 0) 51 %res1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %res0, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>, i8 0) 52 ret <4 x float> %res1 53} 54 55define <4 x float> @combine_vpermil2ps_1z74(<4 x float> %a0, <4 x float> %a1) { 56; CHECK-LABEL: combine_vpermil2ps_1z74: 57; CHECK: # %bb.0: 58; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,1],xmm1[3,0] 59; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 60; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] 61; CHECK-NEXT: ret{{[l|q]}} 62 %res0 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 1, i32 1, i32 7, i32 4>, i8 0) 63 %res1 = shufflevector <4 x float> %res0, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 7, i32 2, i32 3> 64 ret <4 x float> %res1 65} 66 67define <4 x float> @combine_vpermil2ps_02zu(<4 x float> %a0, <4 x float> %a1) { 68; CHECK-LABEL: combine_vpermil2ps_02zu: 69; CHECK: # %bb.0: 70; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero 71; CHECK-NEXT: ret{{[l|q]}} 72 %res0 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 undef>, i8 0) 73 ret <4 x float> %res0 74} 75 76define <8 x float> @combine_vpermil2ps256_identity(<8 x float> %a0, <8 x float> %a1) { 77; CHECK-LABEL: combine_vpermil2ps256_identity: 78; CHECK: # %bb.0: 79; CHECK-NEXT: vmovaps %ymm1, %ymm0 80; CHECK-NEXT: ret{{[l|q]}} 81 %res0 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a1, <8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 1, i32 0, i32 3, i32 2>, i8 0) 82 %res1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %res0, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 1, i32 0, i32 3, i32 2>, i8 0) 83 ret <8 x float> %res1 84} 85 86define <8 x float> @combine_vpermil2ps256_08z945Az(<8 x float> %a0, <8 x float> %a1) { 87; CHECK-LABEL: combine_vpermil2ps256_08z945Az: 88; CHECK: # %bb.0: 89; CHECK-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[0],zero,ymm1[1],ymm0[4,5],ymm1[6],zero 90; CHECK-NEXT: ret{{[l|q]}} 91 %res0 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 0, i32 1, i32 6, i32 7>, i8 0) 92 %res1 = shufflevector <8 x float> %res0, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 8> 93 ret <8 x float> %res1 94} 95 96define <8 x float> @combine_vpermil2ps256_zero(<8 x float> %a0, <8 x float> %a1) { 97; CHECK-LABEL: combine_vpermil2ps256_zero: 98; CHECK: # %bb.0: 99; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 100; CHECK-NEXT: ret{{[l|q]}} 101 %res0 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a1, <8 x float> %a0, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>, i8 2) 102 ret <8 x float> %res0 103} 104 105define <4 x float> @combine_vpermil2ps_blend_with_zero(<4 x float> %a0, <4 x float> %a1) { 106; CHECK-LABEL: combine_vpermil2ps_blend_with_zero: 107; CHECK: # %bb.0: 108; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 109; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] 110; CHECK-NEXT: ret{{[l|q]}} 111 %res0 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 8, i32 1, i32 2, i32 3>, i8 2) 112 ret <4 x float> %res0 113} 114 115define <2 x double> @combine_vpermil2pd_as_shufpd(<2 x double> %a0, <2 x double> %a1) { 116; CHECK-LABEL: combine_vpermil2pd_as_shufpd: 117; CHECK: # %bb.0: 118; CHECK-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0] 119; CHECK-NEXT: ret{{[l|q]}} 120 %res0 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> <i64 2, i64 4>, i8 0) 121 ret <2 x double> %res0 122} 123 124define <4 x double> @combine_vpermil2pd256_as_shufpd(<4 x double> %a0, <4 x double> %a1) { 125; CHECK-LABEL: combine_vpermil2pd256_as_shufpd: 126; CHECK: # %bb.0: 127; CHECK-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[3],ymm1[3] 128; CHECK-NEXT: ret{{[l|q]}} 129 %res0 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> <i64 0, i64 4, i64 2, i64 7>, i8 0) 130 ret <4 x double> %res0 131} 132 133define <4 x double> @demandedelts_vpermil2pd256_as_shufpd(<4 x double> %a0, <4 x double> %a1, i64 %a2) { 134; X86-LABEL: demandedelts_vpermil2pd256_as_shufpd: 135; X86: # %bb.0: 136; X86-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero 137; X86-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],mem[0] 138; X86-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm2, %ymm2 139; X86-NEXT: vpermil2pd $0, %ymm2, %ymm1, %ymm0, %ymm0 140; X86-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,2,3] 141; X86-NEXT: retl 142; 143; X64-LABEL: demandedelts_vpermil2pd256_as_shufpd: 144; X64: # %bb.0: 145; X64-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm1[0,0],ymm0[3],ymm1[3] 146; X64-NEXT: retq 147 %res0 = insertelement <4 x i64> <i64 0, i64 4, i64 2, i64 7>, i64 %a2, i32 0 148 %res1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> %res0, i8 0) 149 %res2 = shufflevector <4 x double> %res1, <4 x double> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 3> 150 ret <4 x double> %res2 151} 152 153define <16 x i8> @combine_vpperm_identity(<16 x i8> %a0, <16 x i8> %a1) { 154; CHECK-LABEL: combine_vpperm_identity: 155; CHECK: # %bb.0: 156; CHECK-NEXT: vmovaps %xmm1, %xmm0 157; CHECK-NEXT: ret{{[l|q]}} 158 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16>) 159 %res1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res0, <16 x i8> undef, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 160 ret <16 x i8> %res1 161} 162 163define <16 x i8> @combine_vpperm_zero(<16 x i8> %a0, <16 x i8> %a1) { 164; CHECK-LABEL: combine_vpperm_zero: 165; CHECK: # %bb.0: 166; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 167; CHECK-NEXT: ret{{[l|q]}} 168 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>) 169 %res1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res0, <16 x i8> undef, <16 x i8> <i8 0, i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>) 170 %res2 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res1, <16 x i8> undef, <16 x i8> <i8 0, i8 1, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>) 171 ret <16 x i8> %res2 172} 173 174define <16 x i8> @combine_vpperm_identity_bitcast(<16 x i8> %a0, <16 x i8> %a1) { 175; X86-LABEL: combine_vpperm_identity_bitcast: 176; X86: # %bb.0: 177; X86-NEXT: vpaddq {{\.LCPI.*}}, %xmm0, %xmm0 178; X86-NEXT: retl 179; 180; X64-LABEL: combine_vpperm_identity_bitcast: 181; X64: # %bb.0: 182; X64-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 183; X64-NEXT: retq 184 %mask = bitcast <2 x i64> <i64 1084818905618843912, i64 506097522914230528> to <16 x i8> 185 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %mask) 186 %res1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res0, <16 x i8> undef, <16 x i8> %mask) 187 %res2 = bitcast <16 x i8> %res1 to <2 x i64> 188 %res3 = add <2 x i64> %res2, <i64 1084818905618843912, i64 506097522914230528> 189 %res4 = bitcast <2 x i64> %res3 to <16 x i8> 190 ret <16 x i8> %res4 191} 192 193define <16 x i8> @combine_vpperm_as_blend_with_zero(<16 x i8> %a0, <16 x i8> %a1) { 194; CHECK-LABEL: combine_vpperm_as_blend_with_zero: 195; CHECK: # %bb.0: 196; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1 197; CHECK-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3],xmm1[4,5,6,7] 198; CHECK-NEXT: ret{{[l|q]}} 199 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 0, i8 1, i8 128, i8 129, i8 4, i8 5, i8 6, i8 7, i8 130, i8 131, i8 132, i8 133, i8 134, i8 135, i8 136, i8 137>) 200 ret <16 x i8> %res0 201} 202 203define <16 x i8> @combine_vpperm_as_unary_unpckhbw(<16 x i8> %a0, <16 x i8> %a1) { 204; CHECK-LABEL: combine_vpperm_as_unary_unpckhbw: 205; CHECK: # %bb.0: 206; CHECK-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 207; CHECK-NEXT: ret{{[l|q]}} 208 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 8, i8 undef, i8 9, i8 25, i8 10, i8 26, i8 11, i8 27, i8 12, i8 28, i8 13, i8 29, i8 14, i8 30, i8 15, i8 31>) 209 ret <16 x i8> %res0 210} 211 212define <16 x i8> @combine_vpperm_as_unpckhbw(<16 x i8> %a0, <16 x i8> %a1) { 213; CHECK-LABEL: combine_vpperm_as_unpckhbw: 214; CHECK: # %bb.0: 215; CHECK-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 216; CHECK-NEXT: ret{{[l|q]}} 217 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 8, i8 24, i8 9, i8 25, i8 10, i8 26, i8 11, i8 27, i8 12, i8 28, i8 13, i8 29, i8 14, i8 30, i8 15, i8 31>) 218 ret <16 x i8> %res0 219} 220 221define <16 x i8> @combine_vpperm_as_unpcklbw(<16 x i8> %a0, <16 x i8> %a1) { 222; CHECK-LABEL: combine_vpperm_as_unpcklbw: 223; CHECK: # %bb.0: 224; CHECK-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 225; CHECK-NEXT: ret{{[l|q]}} 226 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 16, i8 0, i8 17, i8 1, i8 18, i8 2, i8 19, i8 3, i8 20, i8 4, i8 21, i8 5, i8 22, i8 6, i8 23, i8 7>) 227 ret <16 x i8> %res0 228} 229 230define <4 x i32> @combine_vpperm_10zz32BA(<4 x i32> %a0, <4 x i32> %a1) { 231; CHECK-LABEL: combine_vpperm_10zz32BA: 232; CHECK: # %bb.0: 233; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm0[2,3,0,1],zero,zero,zero,zero,xmm0[6,7,4,5],xmm1[6,7,4,5] 234; CHECK-NEXT: ret{{[l|q]}} 235 %res0 = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 236 %res1 = bitcast <4 x i32> %res0 to <16 x i8> 237 %res2 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res1, <16 x i8> undef, <16 x i8> <i8 2, i8 3, i8 0, i8 1, i8 128, i8 128, i8 128, i8 128, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>) 238 %res3 = bitcast <16 x i8> %res2 to <4 x i32> 239 ret <4 x i32> %res3 240} 241 242define <16 x i8> @combine_vpperm_as_proti_v8i16(<16 x i8> %a0, <16 x i8> %a1) { 243; CHECK-LABEL: combine_vpperm_as_proti_v8i16: 244; CHECK: # %bb.0: 245; CHECK-NEXT: vprotw $8, %xmm0, %xmm0 246; CHECK-NEXT: ret{{[l|q]}} 247 %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 1, i8 0, i8 3, i8 2, i8 5, i8 4, i8 7, i8 6, i8 9, i8 8, i8 11, i8 10, i8 13, i8 12, i8 15, i8 14>) 248 ret <16 x i8> %res0 249} 250 251define <16 x i8> @combine_shuffle_proti_v2i64(<2 x i64> %a0) { 252; CHECK-LABEL: combine_shuffle_proti_v2i64: 253; CHECK: # %bb.0: 254; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[13,12,11,10,9,8,15,14,5,4,3,2,1,0,7,6] 255; CHECK-NEXT: ret{{[l|q]}} 256 %1 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a0, <2 x i64> %a0, <2 x i64> <i64 48, i64 48>) 257 %2 = bitcast <2 x i64> %1 to <16 x i8> 258 %3 = shufflevector <16 x i8> %2, <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 259 ret <16 x i8> %3 260} 261declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) 262 263define <16 x i8> @combine_shuffle_proti_v4i32(<4 x i32> %a0) { 264; CHECK-LABEL: combine_shuffle_proti_v4i32: 265; CHECK: # %bb.0: 266; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[14,13,12,15,10,9,8,11,6,5,4,7,2,1,0,3] 267; CHECK-NEXT: ret{{[l|q]}} 268 %1 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a0, <4 x i32> %a0, <4 x i32> <i32 8, i32 8, i32 8, i32 8>) 269 %2 = bitcast <4 x i32> %1 to <16 x i8> 270 %3 = shufflevector <16 x i8> %2, <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 271 ret <16 x i8> %3 272} 273declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) 274 275define void @buildvector_v4f32_0404(float %a, float %b, <4 x float>* %ptr) { 276; X86-LABEL: buildvector_v4f32_0404: 277; X86: # %bb.0: 278; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 279; X86-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] 280; X86-NEXT: vmovaps %xmm0, (%eax) 281; X86-NEXT: retl 282; 283; X64-AVX-LABEL: buildvector_v4f32_0404: 284; X64-AVX: # %bb.0: 285; X64-AVX-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[0],xmm1[0] 286; X64-AVX-NEXT: vmovaps %xmm0, (%rdi) 287; X64-AVX-NEXT: retq 288; 289; X64-AVX2-LABEL: buildvector_v4f32_0404: 290; X64-AVX2: # %bb.0: 291; X64-AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 292; X64-AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] 293; X64-AVX2-NEXT: vmovaps %xmm0, (%rdi) 294; X64-AVX2-NEXT: retq 295 %v0 = insertelement <4 x float> undef, float %a, i32 0 296 %v1 = insertelement <4 x float> %v0, float %b, i32 1 297 %v2 = insertelement <4 x float> %v1, float %a, i32 2 298 %v3 = insertelement <4 x float> %v2, float %b, i32 3 299 store <4 x float> %v3, <4 x float>* %ptr 300 ret void 301} 302 303define void @buildvector_v4f32_07z6(float %a, <4 x float> %b, <4 x float>* %ptr) { 304; X86-LABEL: buildvector_v4f32_07z6: 305; X86: # %bb.0: 306; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 307; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero 308; X86-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm1[0],xmm0[3],zero,xmm0[2] 309; X86-NEXT: vmovaps %xmm0, (%eax) 310; X86-NEXT: retl 311; 312; X64-LABEL: buildvector_v4f32_07z6: 313; X64: # %bb.0: 314; X64-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[3],zero,xmm1[2] 315; X64-NEXT: vmovaps %xmm0, (%rdi) 316; X64-NEXT: retq 317 %b2 = extractelement <4 x float> %b, i32 2 318 %b3 = extractelement <4 x float> %b, i32 3 319 %v0 = insertelement <4 x float> undef, float %a, i32 0 320 %v1 = insertelement <4 x float> %v0, float %b3, i32 1 321 %v2 = insertelement <4 x float> %v1, float 0.0, i32 2 322 %v3 = insertelement <4 x float> %v2, float %b2, i32 3 323 store <4 x float> %v3, <4 x float>* %ptr 324 ret void 325} 326 327define <2 x double> @constant_fold_vpermil2pd() { 328; CHECK-LABEL: constant_fold_vpermil2pd: 329; CHECK: # %bb.0: 330; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-2.0E+0,2.0E+0] 331; CHECK-NEXT: ret{{[l|q]}} 332 %1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> <double 1.0, double 2.0>, <2 x double> <double -2.0, double -1.0>, <2 x i64> <i64 4, i64 2>, i8 2) 333 ret <2 x double> %1 334} 335 336define <4 x double> @constant_fold_vpermil2pd_256() { 337; CHECK-LABEL: constant_fold_vpermil2pd_256: 338; CHECK: # %bb.0: 339; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [-4.0E+0,0.0E+0,4.0E+0,3.0E+0] 340; CHECK-NEXT: ret{{[l|q]}} 341 %1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> <double 1.0, double 2.0, double 3.0, double 4.0>, <4 x double> <double -4.0, double -3.0, double -2.0, double -1.0>, <4 x i64> <i64 4, i64 8, i64 2, i64 0>, i8 2) 342 ret <4 x double> %1 343} 344 345define <4 x float> @constant_fold_vpermil2ps() { 346; CHECK-LABEL: constant_fold_vpermil2ps: 347; CHECK: # %bb.0: 348; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-4.0E+0,1.0E+0,3.0E+0,0.0E+0] 349; CHECK-NEXT: ret{{[l|q]}} 350 %1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, <4 x float> <float -4.0, float -3.0, float -2.0, float -1.0>, <4 x i32> <i32 4, i32 0, i32 2, i32 8>, i8 2) 351 ret <4 x float> %1 352} 353 354define <8 x float> @constant_fold_vpermil2ps_256() { 355; CHECK-LABEL: constant_fold_vpermil2ps_256: 356; CHECK: # %bb.0: 357; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [-8.0E+0,1.0E+0,3.0E+0,0.0E+0,5.0E+0,0.0E+0,5.0E+0,7.0E+0] 358; CHECK-NEXT: ret{{[l|q]}} 359 %1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x float> <float -8.0, float -7.0, float -6.0, float -5.0, float -4.0, float -3.0, float -2.0, float -1.0>, <8 x i32> <i32 4, i32 0, i32 2, i32 8, i32 0, i32 8, i32 0, i32 2>, i8 2) 360 ret <8 x float> %1 361} 362 363define <16 x i8> @constant_fold_vpperm() { 364; CHECK-LABEL: constant_fold_vpperm: 365; CHECK: # %bb.0: 366; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] 367; CHECK-NEXT: ret{{[l|q]}} 368 %1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> <i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <16 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16>) 369 ret <16 x i8> %1 370} 371 372define <4 x float> @PR31296(i8* %in) { 373; X86-LABEL: PR31296: 374; X86: # %bb.0: # %entry 375; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 376; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 377; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,zero,mem[0] 378; X86-NEXT: retl 379; 380; X64-LABEL: PR31296: 381; X64: # %bb.0: # %entry 382; X64-NEXT: movl (%rdi), %eax 383; X64-NEXT: vmovq %rax, %xmm0 384; X64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,zero,mem[0] 385; X64-NEXT: retq 386entry: 387 %0 = getelementptr i8, i8* %in, i32 0 388 %1 = bitcast i8* %0 to i32* 389 %2 = load i32, i32* %1 390 %3 = zext i32 %2 to i128 391 %4 = bitcast i128 %3 to <4 x float> 392 %5 = shufflevector <4 x float> %4, <4 x float> <float 0.000000e+00, float 1.000000e+00, float undef, float undef>, <4 x i32> <i32 0, i32 4, i32 4, i32 5> 393 ret <4 x float> %5 394} 395