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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bitalg,+avx512vl | FileCheck %s
3
4declare i16 @llvm.x86.avx512.mask.vpshufbitqmb.128(<16 x i8> %a, <16 x i8> %b, i16 %mask)
5define i16 @test_vpshufbitqmb_128(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
6; CHECK-LABEL: test_vpshufbitqmb_128:
7; CHECK:       ## %bb.0:
8; CHECK-NEXT:    vpshufbitqmb %xmm3, %xmm2, %k1
9; CHECK-NEXT:    vpshufbitqmb %xmm1, %xmm0, %k0 {%k1}
10; CHECK-NEXT:    kmovd %k0, %eax
11; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
12; CHECK-NEXT:    retq
13  %res = call i16 @llvm.x86.avx512.mask.vpshufbitqmb.128(<16 x i8> %a, <16 x i8> %b, i16 -1)
14  %res2 = call i16 @llvm.x86.avx512.mask.vpshufbitqmb.128(<16 x i8> %c, <16 x i8> %d, i16 %res)
15  ret i16 %res2
16}
17
18declare i32 @llvm.x86.avx512.mask.vpshufbitqmb.256(<32 x i8> %a, <32 x i8> %b, i32 %mask)
19define i32 @test_vpshufbitqmb_256(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c, <32 x i8> %d) {
20; CHECK-LABEL: test_vpshufbitqmb_256:
21; CHECK:       ## %bb.0:
22; CHECK-NEXT:    vpshufbitqmb %ymm3, %ymm2, %k1
23; CHECK-NEXT:    vpshufbitqmb %ymm1, %ymm0, %k0 {%k1}
24; CHECK-NEXT:    kmovd %k0, %eax
25; CHECK-NEXT:    vzeroupper
26; CHECK-NEXT:    retq
27  %res = call i32 @llvm.x86.avx512.mask.vpshufbitqmb.256(<32 x i8> %a, <32 x i8> %b, i32 -1)
28  %res2 = call i32 @llvm.x86.avx512.mask.vpshufbitqmb.256(<32 x i8> %c, <32 x i8> %d, i32 %res)
29  ret i32 %res2
30}
31
32declare i64 @llvm.x86.avx512.mask.vpshufbitqmb.512(<64 x i8> %a, <64 x i8> %b, i64 %mask)
33define i64 @test_vpshufbitqmb_512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
34; CHECK-LABEL: test_vpshufbitqmb_512:
35; CHECK:       ## %bb.0:
36; CHECK-NEXT:    vpshufbitqmb %zmm3, %zmm2, %k1
37; CHECK-NEXT:    vpshufbitqmb %zmm1, %zmm0, %k0 {%k1}
38; CHECK-NEXT:    kmovq %k0, %rax
39; CHECK-NEXT:    vzeroupper
40; CHECK-NEXT:    retq
41  %res = call i64 @llvm.x86.avx512.mask.vpshufbitqmb.512(<64 x i8> %a, <64 x i8> %b, i64 -1)
42  %res2 = call i64 @llvm.x86.avx512.mask.vpshufbitqmb.512(<64 x i8> %c, <64 x i8> %d, i64 %res)
43  ret i64 %res2
44}
45