1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-- -mattr=+x87 -mattr=-sse -run-pass none -o - %s | FileCheck %s 3# This test ensures that the MIR parser parses the x87 fpsw and fpcw regs 4 5--- | 6 declare float @llvm.sqrt.f32(float) 7 8 define void @f1(float* %a, float* %b) { 9 %1 = load float, float* %a, align 4 10 %2 = load float, float* %b, align 4 11 %sub = fsub float %1, %2 12 store float %sub, float* %a, align 4 13 ret void 14 } 15 16 define void @f2(double* %a, double* %b) { 17 %1 = load double, double* %a, align 8 18 %2 = load double, double* %b, align 8 19 %add = fadd double %1, %2 20 store double %add, double* %a, align 8 21 ret void 22 } 23 24 define void @f3(x86_fp80* %a, x86_fp80* %b) { 25 %1 = load x86_fp80, x86_fp80* %a, align 16 26 %2 = load x86_fp80, x86_fp80* %b, align 16 27 %mul = fmul x86_fp80 %1, %2 28 store x86_fp80 %mul, x86_fp80* %a, align 16 29 ret void 30 } 31 32 define void @f4(float* %a, float* %b) { 33 %1 = load float, float* %a, align 4 34 %2 = load float, float* %b, align 4 35 %div = fdiv float %1, %2 36 store float %div, float* %a, align 4 37 ret void 38 } 39 40 define void @f5(float* %val, double* %ret) { 41 %1 = load float, float* %val, align 4 42 %res = fpext float %1 to double 43 store double %res, double* %ret, align 8 44 ret void 45 } 46 47 define void @f6(double* %val, float* %ret) { 48 %1 = load double, double* %val, align 8 49 %res = fptrunc double %1 to float 50 store float %res, float* %ret, align 4 51 ret void 52 } 53 54 define void @f7(float* %a) { 55 %1 = load float, float* %a, align 4 56 %res = call float @llvm.sqrt.f32(float %1) 57 store float %res, float* %a, align 4 58 ret void 59 } 60 61 62 63... 64--- 65name: f1 66alignment: 16 67tracksRegLiveness: true 68liveins: 69 - { reg: '$rdi' } 70 - { reg: '$rsi' } 71frameInfo: 72 maxAlignment: 1 73machineFunctionInfo: {} 74body: | 75 bb.0 (%ir-block.0): 76 liveins: $rdi, $rsi 77 78 ; CHECK-LABEL: name: f1 79 ; CHECK: liveins: $rdi, $rsi 80 ; CHECK: renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.a) 81 ; CHECK: renamable $fp0 = SUB_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.b) 82 ; CHECK: ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.a) 83 ; CHECK: RET 0 84 renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.a) 85 renamable $fp0 = SUB_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.b) 86 ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.a) 87 RET 0 88 89... 90--- 91name: f2 92alignment: 16 93tracksRegLiveness: true 94liveins: 95 - { reg: '$rdi' } 96 - { reg: '$rsi' } 97frameInfo: 98 maxAlignment: 1 99machineFunctionInfo: {} 100body: | 101 bb.0 (%ir-block.0): 102 liveins: $rdi, $rsi 103 104 ; CHECK-LABEL: name: f2 105 ; CHECK: liveins: $rdi, $rsi 106 ; CHECK: renamable $fp0 = LD_Fp64m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 8 from %ir.a) 107 ; CHECK: renamable $fp0 = ADD_Fp64m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 8 from %ir.b) 108 ; CHECK: ST_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 8 into %ir.a) 109 ; CHECK: RET 0 110 renamable $fp0 = LD_Fp64m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 8 from %ir.a) 111 renamable $fp0 = ADD_Fp64m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 8 from %ir.b) 112 ST_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 8 into %ir.a) 113 RET 0 114 115... 116--- 117name: f3 118alignment: 16 119tracksRegLiveness: true 120liveins: 121 - { reg: '$rdi' } 122 - { reg: '$rsi' } 123frameInfo: 124 maxAlignment: 1 125machineFunctionInfo: {} 126body: | 127 bb.0 (%ir-block.0): 128 liveins: $rdi, $rsi 129 130 ; CHECK-LABEL: name: f3 131 ; CHECK: liveins: $rdi, $rsi 132 ; CHECK: renamable $fp0 = LD_Fp80m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 10 from %ir.a, align 16) 133 ; CHECK: renamable $fp1 = LD_Fp80m killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 10 from %ir.b, align 16) 134 ; CHECK: renamable $fp0 = MUL_Fp80 killed renamable $fp0, killed renamable $fp1, implicit-def dead $fpsw, implicit $fpcw 135 ; CHECK: ST_FpP80m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 10 into %ir.a, align 16) 136 ; CHECK: RET 0 137 renamable $fp0 = LD_Fp80m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 10 from %ir.a, align 16) 138 renamable $fp1 = LD_Fp80m killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 10 from %ir.b, align 16) 139 renamable $fp0 = MUL_Fp80 killed renamable $fp0, killed renamable $fp1, implicit-def dead $fpsw, implicit $fpcw 140 ST_FpP80m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 10 into %ir.a, align 16) 141 RET 0 142 143... 144--- 145name: f4 146alignment: 16 147tracksRegLiveness: true 148liveins: 149 - { reg: '$rdi' } 150 - { reg: '$rsi' } 151frameInfo: 152 maxAlignment: 1 153machineFunctionInfo: {} 154body: | 155 bb.0 (%ir-block.0): 156 liveins: $rdi, $rsi 157 158 ; CHECK-LABEL: name: f4 159 ; CHECK: liveins: $rdi, $rsi 160 ; CHECK: renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.a) 161 ; CHECK: renamable $fp0 = DIV_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.b) 162 ; CHECK: ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.a) 163 ; CHECK: RET 0 164 renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.a) 165 renamable $fp0 = DIV_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.b) 166 ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.a) 167 RET 0 168 169... 170--- 171name: f5 172alignment: 16 173tracksRegLiveness: true 174liveins: 175 - { reg: '$rdi' } 176 - { reg: '$rsi' } 177frameInfo: 178 maxAlignment: 1 179machineFunctionInfo: {} 180body: | 181 bb.0 (%ir-block.0): 182 liveins: $rdi, $rsi 183 184 ; CHECK-LABEL: name: f5 185 ; CHECK: liveins: $rdi, $rsi 186 ; CHECK: renamable $fp0 = LD_Fp32m64 killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.val) 187 ; CHECK: ST_Fp64m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 8 into %ir.ret) 188 ; CHECK: RET 0 189 renamable $fp0 = LD_Fp32m64 killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.val) 190 ST_Fp64m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 8 into %ir.ret) 191 RET 0 192 193... 194--- 195name: f6 196alignment: 16 197tracksRegLiveness: true 198liveins: 199 - { reg: '$rdi' } 200 - { reg: '$rsi' } 201frameInfo: 202 maxAlignment: 4 203stack: 204 - { id: 0, size: 4, alignment: 4 } 205machineFunctionInfo: {} 206body: | 207 bb.0 (%ir-block.0): 208 liveins: $rdi, $rsi 209 210 ; CHECK-LABEL: name: f6 211 ; CHECK: liveins: $rdi, $rsi 212 ; CHECK: renamable $fp0 = LD_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 8 from %ir.val) 213 ; CHECK: ST_Fp64m32 %stack.0, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %stack.0) 214 ; CHECK: renamable $fp0 = LD_Fp32m %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %stack.0) 215 ; CHECK: ST_Fp32m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.ret) 216 ; CHECK: RET 0 217 renamable $fp0 = LD_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 8 from %ir.val) 218 ST_Fp64m32 %stack.0, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %stack.0) 219 renamable $fp0 = LD_Fp32m %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %stack.0) 220 ST_Fp32m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.ret) 221 RET 0 222 223... 224--- 225name: f7 226alignment: 16 227tracksRegLiveness: true 228liveins: 229 - { reg: '$rdi' } 230frameInfo: 231 maxAlignment: 1 232machineFunctionInfo: {} 233body: | 234 bb.0 (%ir-block.0): 235 liveins: $rdi 236 237 ; CHECK-LABEL: name: f7 238 ; CHECK: liveins: $rdi 239 ; CHECK: renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.a) 240 ; CHECK: renamable $fp0 = SQRT_Fp32 killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw 241 ; CHECK: ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.a) 242 ; CHECK: RET 0 243 renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load 4 from %ir.a) 244 renamable $fp0 = SQRT_Fp32 killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw 245 ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store 4 into %ir.a) 246 RET 0 247 248... 249