1; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s 2; RUN: opt < %s -msan -S -mcpu=z13 -msan-kernel=1 -float-abi=soft | FileCheck %s 3 4target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64" 5target triple = "s390x-unknown-linux-gnu" 6 7declare i64 @foo(i64 %guard, ...) #0 8 9attributes #0 = { "target-features"="+soft-float" "use-soft-float"="true" } 10 11declare i32 @random_i32() 12declare i64 @random_i64() 13declare float @random_float() 14declare double @random_double() 15 16define i64 @bar() #1 { 17 %arg2 = call i32 () @random_i32() 18 %arg3 = call float () @random_float() 19 %arg4 = call i32 () @random_i32() 20 %arg5 = call double () @random_double() 21 %arg6 = call i64 () @random_i64() 22 %arg9 = call i32 () @random_i32() 23 %arg11 = call float () @random_float() 24 %arg12 = call i32 () @random_i32() 25 %arg13 = call double () @random_double() 26 %arg14 = call i64 () @random_i64() 27 %1 = call i64 (i64, ...) @foo(i64 1, i32 zeroext %arg2, float %arg3, 28 i32 signext %arg4, double %arg5, i64 %arg6, 29 i64 7, double 8.0, i32 zeroext %arg9, 30 double 10.0, float %arg11, i32 signext %arg12, 31 double %arg13, i64 %arg14) 32 ret i64 %1 33} 34 35attributes #1 = { sanitize_memory } 36 37; In kernel the floating point values are passed in GPRs: 38; - r2@16 == i64 1 - skipped, because it's fixed 39; - r3@24 == i32 zext %arg2 - shadow is zero-extended 40; - r4@(32 + 4) == float %arg3 - right-justified, shadow is 32-bit 41; - r5@40 == i32 sext %arg4 - shadow is sign-extended 42; - r6@48 == double %arg5 - straightforward 43; - overflow@160 == i64 %arg6 - straightforward 44; - overflow@168 == 7 - filler 45; - overflow@176 == 8.0 - filler 46; - overflow@184 == i32 zext %arg9 - shadow is zero-extended 47; - overflow@192 == 10.0 - filler 48; - overflow@(200 + 4) == float %arg11 - right-justified, shadow is 32-bit 49; - overflow@208 == i32 sext %arg12 - shadow is sign-extended 50; - overflow@216 == double %arg13 - straightforward 51; - overflow@224 == i64 %arg14 - straightforward 52; Overflow arg area size is 72. 53 54; CHECK-LABEL: @bar 55 56; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 57; CHECK: [[S:%.*]] = add i64 [[B]], 24 58; CHECK: [[V:%.*]] = zext {{.*}} 59; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 60; CHECK: store {{.*}} [[V]], {{.*}} [[M]] 61 62; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 63; CHECK: [[S:%.*]] = add i64 [[B]], 36 64; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i32* 65; CHECK: store {{.*}} [[M]] 66 67; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 68; CHECK: [[S:%.*]] = add i64 [[B]], 40 69; CHECK: [[V:%.*]] = sext {{.*}} 70; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 71; CHECK: store {{.*}} [[V]], {{.*}} [[M]] 72 73; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 74; CHECK: [[S:%.*]] = add i64 [[B]], 48 75; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 76; CHECK: store {{.*}} [[M]] 77 78; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 79; CHECK: [[S:%.*]] = add i64 [[B]], 160 80; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 81; CHECK: store {{.*}} [[M]] 82 83; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 84; CHECK: [[S:%.*]] = add i64 [[B]], 168 85; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 86; CHECK: store {{.*}} [[M]] 87 88; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 89; CHECK: [[S:%.*]] = add i64 [[B]], 176 90; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 91; CHECK: store {{.*}} [[M]] 92 93; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 94; CHECK: [[S:%.*]] = add i64 [[B]], 184 95; CHECK: [[V:%.*]] = zext {{.*}} 96; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 97; CHECK: store {{.*}} [[V]], {{.*}} [[M]] 98 99; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 100; CHECK: [[S:%.*]] = add i64 [[B]], 192 101; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 102; CHECK: store {{.*}} [[M]] 103 104; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 105; CHECK: [[S:%.*]] = add i64 [[B]], 204 106; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i32* 107; CHECK: store {{.*}} [[M]] 108 109; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 110; CHECK: [[S:%.*]] = add i64 [[B]], 208 111; CHECK: [[V:%.*]] = sext {{.*}} 112; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 113; CHECK: store {{.*}} [[V]], {{.*}} [[M]] 114 115; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 116; CHECK: [[S:%.*]] = add i64 [[B]], 216 117; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 118; CHECK: store {{.*}} [[M]] 119 120; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64 121; CHECK: [[S:%.*]] = add i64 [[B]], 224 122; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64* 123; CHECK: store {{.*}} [[M]] 124 125; CHECK: store {{.*}} 72, {{.*}} %va_arg_overflow_size 126