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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
2
3// --------------------------------------------------------------------------//
4// Immediate out of lower bound [-8, 7].
5
6ld1b z23.b, p0/z, [x13, #-9, MUL VL]
7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
8// CHECK-NEXT: ld1b z23.b, p0/z, [x13, #-9, MUL VL]
9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10
11ld1b z29.b, p0/z, [x3, #8, MUL VL]
12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
13// CHECK-NEXT: ld1b z29.b, p0/z, [x3, #8, MUL VL]
14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15
16ld1b z21.h, p4/z, [x17, #-9, MUL VL]
17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
18// CHECK-NEXT: ld1b z21.h, p4/z, [x17, #-9, MUL VL]
19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
20
21ld1b z10.h, p5/z, [x16, #8, MUL VL]
22// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
23// CHECK-NEXT: ld1b z10.h, p5/z, [x16, #8, MUL VL]
24// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
25
26ld1b z30.s, p6/z, [x25, #-9, MUL VL]
27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
28// CHECK-NEXT: ld1b z30.s, p6/z, [x25, #-9, MUL VL]
29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
30
31ld1b z29.s, p5/z, [x15, #8, MUL VL]
32// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
33// CHECK-NEXT: ld1b z29.s, p5/z, [x15, #8, MUL VL]
34// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
35
36ld1b z28.d, p2/z, [x28, #-9, MUL VL]
37// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
38// CHECK-NEXT: ld1b z28.d, p2/z, [x28, #-9, MUL VL]
39// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
40
41ld1b z27.d, p1/z, [x26, #8, MUL VL]
42// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
43// CHECK-NEXT: ld1b z27.d, p1/z, [x26, #8, MUL VL]
44// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
45
46
47// --------------------------------------------------------------------------//
48// restricted predicate has range [0, 7].
49
50ld1b z27.b, p8/z, [x29, #1, MUL VL]
51// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
52// CHECK-NEXT: ld1b z27.b, p8/z, [x29, #1, MUL VL]
53// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
54
55ld1b z9.h, p8/z, [x25, #1, MUL VL]
56// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
57// CHECK-NEXT: ld1b z9.h, p8/z, [x25, #1, MUL VL]
58// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
59
60ld1b z12.s, p8/z, [x13, #1, MUL VL]
61// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
62// CHECK-NEXT: ld1b z12.s, p8/z, [x13, #1, MUL VL]
63// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
64
65ld1b z4.d, p8/z, [x11, #1, MUL VL]
66// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
67// CHECK-NEXT: ld1b z4.d, p8/z, [x11, #1, MUL VL]
68// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
69
70
71// --------------------------------------------------------------------------//
72// Invalid vector list.
73
74ld1b { }, p0/z, [x1, #1, MUL VL]
75// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
76// CHECK-NEXT: ld1b { }, p0/z, [x1, #1, MUL VL]
77// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
78
79ld1b { z1.b, z2.b }, p0/z, [x1, #1, MUL VL]
80// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
81// CHECK-NEXT: ld1b { z1.b, z2.b }, p0/z, [x1, #1, MUL VL]
82// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
83
84ld1b { v0.2d }, p0/z, [x1, #1, MUL VL]
85// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
86// CHECK-NEXT: ld1b { v0.2d }, p0/z, [x1, #1, MUL VL]
87// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
88
89
90// --------------------------------------------------------------------------//
91// Invalid scalar + scalar addressing modes
92
93ld1b z0.b, p0/z, [x0, xzr]
94// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
95// CHECK-NEXT: ld1b z0.b, p0/z, [x0, xzr]
96// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
97
98ld1b z0.b, p0/z, [x0, x0, lsl #1]
99// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
100// CHECK-NEXT: ld1b z0.b, p0/z, [x0, x0, lsl #1]
101// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
102
103ld1b z0.b, p0/z, [x0, w0]
104// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
105// CHECK-NEXT: ld1b z0.b, p0/z, [x0, w0]
106// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
107
108ld1b z0.b, p0/z, [x0, w0, uxtw]
109// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
110// CHECK-NEXT: ld1b z0.b, p0/z, [x0, w0, uxtw]
111// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
112
113
114// --------------------------------------------------------------------------//
115// Invalid scalar + vector addressing modes
116
117ld1b z0.d, p0/z, [x0, z0.b]
118// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
119// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.b]
120// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
121
122ld1b z0.d, p0/z, [x0, z0.h]
123// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
124// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.h]
125// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
126
127ld1b z0.d, p0/z, [x0, z0.s]
128// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
129// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.s]
130// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
131
132ld1b z0.s, p0/z, [x0, z0.s]
133// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
134// CHECK-NEXT: ld1b z0.s, p0/z, [x0, z0.s]
135// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
136
137ld1b z0.s, p0/z, [x0, z0.s, uxtw #1]
138// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
139// CHECK-NEXT: ld1b z0.s, p0/z, [x0, z0.s, uxtw #1]
140// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
141
142ld1b z0.s, p0/z, [x0, z0.s, lsl #0]
143// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
144// CHECK-NEXT: ld1b z0.s, p0/z, [x0, z0.s, lsl #0]
145// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
146
147ld1b z0.d, p0/z, [x0, z0.d, lsl #1]
148// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
149// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.d, lsl #1]
150// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
151
152ld1b z0.d, p0/z, [x0, z0.d, sxtw #1]
153// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
154// CHECK-NEXT: ld1b z0.d, p0/z, [x0, z0.d, sxtw #1]
155// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
156
157
158// --------------------------------------------------------------------------//
159// Invalid vector + immediate addressing modes
160
161ld1b z0.s, p0/z, [z0.s, #-1]
162// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
163// CHECK-NEXT: ld1b z0.s, p0/z, [z0.s, #-1]
164// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
165
166ld1b z0.s, p0/z, [z0.s, #32]
167// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
168// CHECK-NEXT: ld1b z0.s, p0/z, [z0.s, #32]
169// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
170
171ld1b z0.d, p0/z, [z0.d, #-1]
172// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
173// CHECK-NEXT: ld1b z0.d, p0/z, [z0.d, #-1]
174// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
175
176ld1b z0.d, p0/z, [z0.d, #32]
177// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
178// CHECK-NEXT: ld1b z0.d, p0/z, [z0.d, #32]
179// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
180
181
182// --------------------------------------------------------------------------//
183// Negative tests for instructions that are incompatible with movprfx
184
185movprfx z0.d, p0/z, z7.d
186ld1b    { z0.d }, p0/z, [z0.d]
187// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
188// CHECK-NEXT: ld1b    { z0.d }, p0/z, [z0.d]
189// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
190
191movprfx z0, z7
192ld1b    { z0.d }, p0/z, [z0.d]
193// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
194// CHECK-NEXT: ld1b    { z0.d }, p0/z, [z0.d]
195// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
196