1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3// --------------------------------------------------------------------------// 4// Immediate out of lower bound [-8, 7]. 5 6st1w z19.s, p2, [x18, #-9, MUL VL] 7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 8// CHECK-NEXT: st1w z19.s, p2, [x18, #-9, MUL VL] 9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11// Immediate out of upper bound [-8, 7]. 12st1w z1.s, p5, [x23, #8, MUL VL] 13// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 14// CHECK-NEXT: st1w z1.s, p5, [x23, #8, MUL VL] 15// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 16 17// Immediate out of lower bound [-8, 7]. 18st1w z21.d, p2, [x29, #-9, MUL VL] 19// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 20// CHECK-NEXT: st1w z21.d, p2, [x29, #-9, MUL VL] 21// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 22 23// Immediate out of upper bound [-8, 7]. 24st1w z10.d, p5, [x26, #8, MUL VL] 25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 26// CHECK-NEXT: st1w z10.d, p5, [x26, #8, MUL VL] 27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 28 29// --------------------------------------------------------------------------// 30// Invalid predicate 31 32st1w z1.s, p8, [x3, #1, MUL VL] 33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 34// CHECK-NEXT: st1w z1.s, p8, [x3, #1, MUL VL] 35// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 36 37st1w z12.d, p8, [x26, #3, MUL VL] 38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 39// CHECK-NEXT: st1w z12.d, p8, [x26, #3, MUL VL] 40// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 41 42st1w z12.d, p7.b, [x26, #3, MUL VL] 43// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 44// CHECK-NEXT: st1w z12.d, p7.b, [x26, #3, MUL VL] 45// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 46 47st1w z12.d, p7.q, [x26, #3, MUL VL] 48// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 49// CHECK-NEXT: st1w z12.d, p7.q, [x26, #3, MUL VL] 50// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 51 52// --------------------------------------------------------------------------// 53// Invalid vector list 54 55st1w { }, p0, [x0] 56// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected 57// CHECK-NEXT: st1w { }, p0, [x0] 58// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 59 60st1w { z1.s, z2.s }, p0, [x0] 61// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 62// CHECK-NEXT: st1w { z1.s, z2.s }, p0, [x0] 63// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 64 65st1w { v0.4s }, p0, [x0] 66// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 67// CHECK-NEXT: st1w { v0.4s }, p0, [x0] 68// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 69 70 71// --------------------------------------------------------------------------// 72// Invalid scalar + scalar addressing modes 73 74st1w z0.s, p0, [x0, x0] 75// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2' 76// CHECK-NEXT: st1w z0.s, p0, [x0, x0] 77// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 78 79st1w z0.s, p0, [x0, xzr] 80// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2' 81// CHECK-NEXT: st1w z0.s, p0, [x0, xzr] 82// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 83 84st1w z0.s, p0, [x0, x0, lsl #3] 85// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2' 86// CHECK-NEXT: st1w z0.s, p0, [x0, x0, lsl #3] 87// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 88 89st1w z0.s, p0, [x0, w0] 90// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2' 91// CHECK-NEXT: st1w z0.s, p0, [x0, w0] 92// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 93 94st1w z0.s, p0, [x0, w0, uxtw] 95// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2' 96// CHECK-NEXT: st1w z0.s, p0, [x0, w0, uxtw] 97// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 98 99 100// --------------------------------------------------------------------------// 101// Invalid scalar + vector addressing modes 102 103st1w z0.d, p0, [x0, z0.h] 104// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 105// CHECK-NEXT: st1w z0.d, p0, [x0, z0.h] 106// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 107 108st1w z0.d, p0, [x0, z0.s] 109// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 110// CHECK-NEXT: st1w z0.d, p0, [x0, z0.s] 111// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 112 113st1w z0.s, p0, [x0, z0.s] 114// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' 115// CHECK-NEXT: st1w z0.s, p0, [x0, z0.s] 116// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 117 118st1w z0.s, p0, [x0, z0.s, uxtw #3] 119// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #2' 120// CHECK-NEXT: st1w z0.s, p0, [x0, z0.s, uxtw #3] 121// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 122 123st1w z0.s, p0, [x0, z0.s, lsl #2] 124// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #2' 125// CHECK-NEXT: st1w z0.s, p0, [x0, z0.s, lsl #2] 126// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 127 128st1w z0.d, p0, [x0, z0.d, lsl #3] 129// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2' 130// CHECK-NEXT: st1w z0.d, p0, [x0, z0.d, lsl #3] 131// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 132 133st1w z0.d, p0, [x0, z0.d, sxtw #3] 134// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2' 135// CHECK-NEXT: st1w z0.d, p0, [x0, z0.d, sxtw #3] 136// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 137 138 139// --------------------------------------------------------------------------// 140// Invalid vector + immediate addressing modes 141 142st1w z0.s, p0, [z0.s, #-1] 143// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 144// CHECK-NEXT: st1w z0.s, p0, [z0.s, #-1] 145// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 146 147st1w z0.s, p0, [z0.s, #-4] 148// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 149// CHECK-NEXT: st1w z0.s, p0, [z0.s, #-4] 150// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 151 152st1w z0.s, p0, [z0.s, #125] 153// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 154// CHECK-NEXT: st1w z0.s, p0, [z0.s, #125] 155// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 156 157st1w z0.s, p0, [z0.s, #128] 158// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 159// CHECK-NEXT: st1w z0.s, p0, [z0.s, #128] 160// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 161 162st1w z0.s, p0, [z0.s, #3] 163// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 164// CHECK-NEXT: st1w z0.s, p0, [z0.s, #3] 165// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 166 167st1w z0.d, p0, [z0.d, #-1] 168// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 169// CHECK-NEXT: st1w z0.d, p0, [z0.d, #-1] 170// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 171 172st1w z0.d, p0, [z0.d, #-4] 173// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 174// CHECK-NEXT: st1w z0.d, p0, [z0.d, #-4] 175// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 176 177st1w z0.d, p0, [z0.d, #125] 178// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 179// CHECK-NEXT: st1w z0.d, p0, [z0.d, #125] 180// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 181 182st1w z0.d, p0, [z0.d, #128] 183// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 184// CHECK-NEXT: st1w z0.d, p0, [z0.d, #128] 185// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 186 187st1w z0.d, p0, [z0.d, #3] 188// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 189// CHECK-NEXT: st1w z0.d, p0, [z0.d, #3] 190// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 191 192 193// --------------------------------------------------------------------------// 194// Negative tests for instructions that are incompatible with movprfx 195 196movprfx z31.d, p7/z, z6.d 197st1w { z31.d }, p7, [z31.d, #124] 198// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 199// CHECK-NEXT: st1w { z31.d }, p7, [z31.d, #124] 200// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 201 202movprfx z31, z6 203st1w { z31.d }, p7, [z31.d, #124] 204// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 205// CHECK-NEXT: st1w { z31.d }, p7, [z31.d, #124] 206// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 207