1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s 2 3// --------------------------------------------------------------------------// 4// Source and Destination Registers must match 5 6fmaxnmp z0.h, p0/m, z1.h, z2.h 7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register 8// CHECK-NEXT: fmaxnmp z0.h, p0/m, z1.h, z2.h 9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11 12// --------------------------------------------------------------------------// 13// Invalid element width 14 15fmaxnmp z0.b, p0/m, z0.b, z1.b 16// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 17// CHECK-NEXT: fmaxnmp z0.b, p0/m, z0.b, z1.b 18// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 19 20 21// --------------------------------------------------------------------------// 22// Element sizes must match 23 24fmaxnmp z0.h, p0/m, z0.s, z1.s 25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 26// CHECK-NEXT: fmaxnmp z0.h, p0/m, z0.s, z1.s 27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 28 29fmaxnmp z0.h, p0/m, z0.h, z1.s 30// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 31// CHECK-NEXT: fmaxnmp z0.h, p0/m, z0.h, z1.s 32// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 33 34 35// --------------------------------------------------------------------------// 36// Invalid predicate operation 37 38fmaxnmp z0.h, p0/z, z0.h, z1.h 39// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 40// CHECK-NEXT: fmaxnmp z0.h, p0/z, z0.h, z1.h 41// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 42 43 44// --------------------------------------------------------------------------// 45// Predicate not in restricted predicate range 46 47fmaxnmp z0.h, p8/m, z0.h, z1.h 48// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 49// CHECK-NEXT: fmaxnmp z0.h, p8/m, z0.h, z1.h 50// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 51