1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s 2 3 4// ------------------------------------------------------------------------- // 5// z register out of range for index 6 7sqrdmulh z0.h, z1.h, z8.h[0] 8// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 9// CHECK-NEXT: sqrdmulh z0.h, z1.h, z8.h[0] 10// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 11 12sqrdmulh z0.s, z1.s, z8.s[0] 13// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 14// CHECK-NEXT: sqrdmulh z0.s, z1.s, z8.s[0] 15// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 16 17sqrdmulh z0.d, z1.d, z16.d[0] 18// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 19// CHECK-NEXT: sqrdmulh z0.d, z1.d, z16.d[0] 20// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 21 22 23// ------------------------------------------------------------------------- // 24// Invalid element index 25 26sqrdmulh z0.h, z1.h, z2.h[-1] 27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7]. 28// CHECK-NEXT: sqrdmulh z0.h, z1.h, z2.h[-1] 29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 30 31sqrdmulh z0.h, z1.h, z2.h[8] 32// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7]. 33// CHECK-NEXT: sqrdmulh z0.h, z1.h, z2.h[8] 34// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 35 36sqrdmulh z0.s, z1.s, z2.s[-1] 37// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]. 38// CHECK-NEXT: sqrdmulh z0.s, z1.s, z2.s[-1] 39// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 40 41sqrdmulh z0.s, z1.s, z2.s[4] 42// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]. 43// CHECK-NEXT: sqrdmulh z0.s, z1.s, z2.s[4] 44// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 45 46sqrdmulh z0.d, z1.d, z2.d[-1] 47// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. 48// CHECK-NEXT: sqrdmulh z0.d, z1.d, z2.d[-1] 49// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 50 51sqrdmulh z0.d, z1.d, z2.d[2] 52// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. 53// CHECK-NEXT: sqrdmulh z0.d, z1.d, z2.d[2] 54// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 55 56// ------------------------------------------------------------------------- // 57// Invalid element width 58 59sqrdmulh z0.b, z1.h, z2.h 60// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 61// CHECK-NEXT: sqrdmulh z0.b, z1.h, z2.h 62// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 63 64sqrdmulh z0.h, z1.s, z2.s 65// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 66// CHECK-NEXT: sqrdmulh z0.h, z1.s, z2.s 67// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 68 69sqrdmulh z0.s, z1.d, z2.d 70// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 71// CHECK-NEXT: sqrdmulh z0.s, z1.d, z2.d 72// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 73 74sqrdmulh z0.d, z1.b, z2.b 75// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 76// CHECK-NEXT: sqrdmulh z0.d, z1.b, z2.b 77// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 78 79sqrdmulh z0.b, z1.b, z2.b[0] 80// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 81// CHECK-NEXT: sqrdmulh z0.b, z1.b, z2.b[0] 82// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 83 84sqrdmulh z0.b, z1.h, z2.h[0] 85// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 86// CHECK-NEXT: sqrdmulh z0.b, z1.h, z2.h[0] 87// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 88 89sqrdmulh z0.h, z1.s, z2.s[0] 90// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 91// CHECK-NEXT: sqrdmulh z0.h, z1.s, z2.s[0] 92// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 93 94sqrdmulh z0.s, z1.d, z2.d[0] 95// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 96// CHECK-NEXT: sqrdmulh z0.s, z1.d, z2.d[0] 97// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 98 99sqrdmulh z0.d, z1.b, z2.b[0] 100// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 101// CHECK-NEXT: sqrdmulh z0.d, z1.b, z2.b[0] 102// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 103 104// --------------------------------------------------------------------------// 105// Negative tests for instructions that are incompatible with movprfx 106 107movprfx z31.d, p0/z, z6.d 108sqrdmulh z31.d, z31.d, z15.d 109// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 110// CHECK-NEXT: sqrdmulh z31.d, z31.d, z15.d 111// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 112 113movprfx z31, z6 114sqrdmulh z31.d, z31.d, z15.d 115// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 116// CHECK-NEXT: sqrdmulh z31.d, z31.d, z15.d 117// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 118 119movprfx z31.d, p0/z, z6.d 120sqrdmulh z31.d, z31.d, z15.d[1] 121// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 122// CHECK-NEXT: sqrdmulh z31.d, z31.d, z15.d[1] 123// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 124 125movprfx z31, z6 126sqrdmulh z31.d, z31.d, z15.d[1] 127// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 128// CHECK-NEXT: sqrdmulh z31.d, z31.d, z15.d[1] 129// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 130