1@ RUN: llvm-mc -triple thumbv7a--none-eabi -arm-implicit-it=always < %s -show-encoding | FileCheck %s 2 3@ Single instruction 4 .section test1 5@ CHECK-LABEL: test1 6 addeq r0, #1 7@ CHECK: it eq 8@ CHECK: addeq 9 10@ Multiple instructions, same condition 11 .section test2 12@ CHECK-LABEL: test2 13 addeq r0, #1 14 addeq r0, #1 15 addeq r0, #1 16 addeq r0, #1 17@ CHECK: itttt eq 18@ CHECK: addeq 19@ CHECK: addeq 20@ CHECK: addeq 21@ CHECK: addeq 22 23@ Multiple instructions, equal but opposite conditions 24 .section test3 25@ CHECK-LABEL: test3 26 addeq r0, #1 27 addne r0, #1 28 addeq r0, #1 29 addne r0, #1 30@ CHECK: itete eq 31@ CHECK: addeq 32@ CHECK: addne 33@ CHECK: addeq 34@ CHECK: addne 35 36@ Multiple instructions, unrelated conditions 37 .section test4 38@ CHECK-LABEL: test4 39 addeq r0, #1 40 addlt r0, #1 41 addeq r0, #1 42 addge r0, #1 43@ CHECK: it eq 44@ CHECK: addeq 45@ CHECK: it lt 46@ CHECK: addlt 47@ CHECK: it eq 48@ CHECK: addeq 49@ CHECK: it ge 50@ CHECK: addge 51 52@ More than 4 instructions eligible for a block 53 .section test5 54@ CHECK-LABEL: test5 55 addeq r0, #1 56 addeq r0, #1 57 addeq r0, #1 58 addeq r0, #1 59 addeq r0, #1 60 addeq r0, #1 61@ CHECK: itttt eq 62@ CHECK: addeq 63@ CHECK: addeq 64@ CHECK: addeq 65@ CHECK: addeq 66@ CHECK: itt eq 67@ CHECK: addeq 68@ CHECK: addeq 69 70@ Flush on a label 71 .section test6 72@ CHECK-LABEL: test6 73 addeq r0, #1 74label: 75 addeq r0, #1 76five: 77 addeq r0, #1 78@ CHECK: it eq 79@ CHECK: addeq 80@ CHECK: label 81@ CHECK: it eq 82@ CHECK: addeq 83@ CHECK: five 84@ CHECK: it eq 85@ CHECK: addeq 86 87@ Flush on a section-change directive 88 .section test7a 89@ CHECK-LABEL: test7a 90 addeq r0, #1 91 .section test7b 92 addeq r0, #1 93 .previous 94 addeq r0, #1 95 .pushsection test7c 96 addeq r0, #1 97 .popsection 98 addeq r0, #1 99@ CHECK: it eq 100@ CHECK: addeq 101@ CHECK: it eq 102@ CHECK: addeq 103@ CHECK: it eq 104@ CHECK: addeq 105@ CHECK: it eq 106@ CHECK: addeq 107@ CHECK: it eq 108@ CHECK: addeq 109 110@ Flush on an ISA change (even to the same ISA) 111 .section test8 112@ CHECK-LABEL: test8 113 addeq r0, #1 114 .thumb 115 addeq r0, #1 116 .arm 117 addeq r0, #1 118 .thumb 119 addeq r0, #1 120@ CHECK: it eq 121@ CHECK: addeq 122@ CHECK: it eq 123@ CHECK: addeq 124@ CHECK: addeq 125@ CHECK: it eq 126@ CHECK: addeq 127 128@ Flush on an arch, cpu or fpu change 129 .section test9 130@ CHECK-LABEL: test9 131 addeq r0, #1 132 .arch armv7-a 133 addeq r0, #1 134 .cpu cortex-a15 135 addeq r0, #1 136 .fpu vfpv3 137 addeq r0, #1 138@ CHECK: it eq 139@ CHECK: addeq 140@ CHECK: it eq 141@ CHECK: addeq 142@ CHECK: it eq 143@ CHECK: addeq 144@ CHECK: it eq 145@ CHECK: addeq 146 147@ Flush on an unpredicable instruction 148 .section test10 149@ CHECK-LABEL: test10 150 addeq r0, #1 151 setend le 152 addeq r0, #1 153 hvc #0 154 addeq r0, #1 155@ CHECK: it eq 156@ CHECK: addeq 157@ CHECK: setend le 158@ CHECK: it eq 159@ CHECK: addeq 160@ CHECK: hvc.w #0 161@ CHECK: it eq 162@ CHECK: addeq 163 164@ Flush when reaching an explicit IT instruction 165 .section test11 166@ CHECK-LABEL: test11 167 addeq r0, #1 168 it eq 169 addeq r0, #1 170@ CHECK: it eq 171@ CHECK: addeq 172@ CHECK: it eq 173@ CHECK: addeq 174 175@ Don't extend an explicit IT instruction 176 .section test12 177@ CHECK-LABEL: test12 178 it eq 179 addeq r0, #1 180 addeq r0, #1 181@ CHECK: it eq 182@ CHECK: addeq 183@ CHECK: it eq 184@ CHECK: addeq 185 186@ Branch-like instructions can only be used at the end of an IT block, so 187@ terminate it. 188 .section test13 189@ CHECK-LABEL: test13 190 .cpu cortex-a15 191 addeq pc, r0 192 addeq pc, sp, pc 193 ldreq pc, [r0, #4] 194 ldreq pc, [r0, #-4] 195 ldreq pc, [r0, r1] 196 ldreq pc, [pc, #-0] 197 moveq pc, r0 198 bleq #4 199 blxeq #4 200 blxeq r0 201 bxeq r0 202 bxjeq r0 203 tbbeq [r0, r1] 204 tbheq [r0, r1, lsl #1] 205 ereteq 206 rfeiaeq r0 207 rfeiaeq r0! 208 rfedbeq r0 209 rfedbeq r0! 210 smceq #0 211 ldmiaeq r0, {pc} 212 ldmiaeq r0!, {r1, pc} 213 ldmdbeq r0, {pc} 214 ldmdbeq r0!, {r1, pc} 215 popeq {pc} 216 .arch armv8-m.main 217 bxnseq r0 218 blxnseq r0 219@ CHECK: it eq 220@ CHECK: addeq pc, r0 221@ CHECK: it eq 222@ CHECK: addeq pc, sp, pc 223@ CHECK: it eq 224@ CHECK: ldreq.w pc, [r0, #4] 225@ CHECK: it eq 226@ CHECK: ldreq pc, [r0, #-4] 227@ CHECK: it eq 228@ CHECK: ldreq.w pc, [r0, r1] 229@ CHECK: it eq 230@ CHECK: ldreq.w pc, [pc, #-0] 231@ CHECK: it eq 232@ CHECK: moveq pc, r0 233@ CHECK: it eq 234@ CHECK: bleq #4 235@ CHECK: it eq 236@ CHECK: blxeq #4 237@ CHECK: it eq 238@ CHECK: blxeq r0 239@ CHECK: it eq 240@ CHECK: bxeq r0 241@ CHECK: it eq 242@ CHECK: bxjeq r0 243@ CHECK: it eq 244@ CHECK: tbbeq [r0, r1] 245@ CHECK: it eq 246@ CHECK: tbheq [r0, r1, lsl #1] 247@ CHECK: it eq 248@ CHECK: ereteq 249@ CHECK: it eq 250@ CHECK: rfeiaeq r0 251@ CHECK: it eq 252@ CHECK: rfeiaeq r0! 253@ CHECK: it eq 254@ CHECK: rfedbeq r0 255@ CHECK: it eq 256@ CHECK: rfedbeq r0! 257@ CHECK: it eq 258@ CHECK: smceq #0 259@ CHECK: it eq 260@ CHECK: ldmeq.w r0, {pc} 261@ CHECK: it eq 262@ CHECK: ldmeq.w r0!, {r1, pc} 263@ CHECK: it eq 264@ CHECK: ldmdbeq r0, {pc} 265@ CHECK: it eq 266@ CHECK: ldmdbeq r0!, {r1, pc} 267@ CHECK: it eq 268@ CHECK: popeq {pc} 269@ CHECK: it eq 270@ CHECK: bxnseq r0 271@ CHECK: it eq 272@ CHECK: blxnseq r0 273 274@ Thumb 16-bit ALU instructions set the flags iff they are not in an IT block, 275@ so instruction matching must change when generating an implicit IT block. 276 .section test14 277@ CHECK-LABEL: test14 278@ Outside an IT block, the 16-bit encoding must set flags 279 add r0, #1 280@ CHECK:add.w r0, r0, #1 @ encoding: [0x00,0xf1,0x01,0x00] 281 adds r0, #1 282@ CHECK: adds r0, #1 @ encoding: [0x01,0x30] 283@ Inside an IT block, the 16-bit encoding can not set flags 284 addeq r0, #1 285@ CHECK: itt eq 286@ CHECK: addeq r0, #1 @ encoding: [0x01,0x30] 287 addseq r0, #1 288@ CHECK: addseq.w r0, r0, #1 @ encoding: [0x10,0xf1,0x01,0x00] 289 290@ Some variants of the B instruction have their own condition code field, and 291@ are not valid in IT blocks. 292 .section test15 293@ CHECK-LABEL: test15 294@ Outside of an IT block, the 4 variants (narrow/wide, 295@ predicated/non-predicated) are selected as normal, and the predicated 296@ encodings are used instead of opening a new IT block: 297 b #0x100 298@ CHECK: b #256 @ encoding: [0x80,0xe0] 299 b #0x800 300@ CHECK: b.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc] 301 beq #0x4 302@ CHECK-NOT: it 303@ CHECK: beq #4 @ encoding: [0x02,0xd0] 304 beq #0x100 305@ CHECK-NOT: it 306@ CHECK: beq.w #256 @ encoding: [0x00,0xf0,0x80,0x80] 307 308@ We could support "beq #0x100000" to "beq #0x1fffffc" by using t2Bcc in 309@ an IT block (these currently fail as the target is out of range). However, long 310@ ranges like this are rarely assembly-time constants, so this probably isn't 311@ worth doing. 312 313@ If we already have an open IT block, we can use the non-predicated encodings, 314@ which have a greater range: 315 addeq r0, r1 316 beq #0x4 317@ CHECK: itt eq 318@ CHECK: addeq r0, r1 319@ CHECK: beq #4 @ encoding: [0x02,0xe0] 320 addeq r0, r1 321 beq #0x100 322@ CHECK: itt eq 323@ CHECK: addeq r0, r1 324@ CHECK: beq #256 @ encoding: [0x80,0xe0] 325 addeq r0, r1 326 beq #0x800 327@ CHECK: itt eq 328@ CHECK: addeq r0, r1 329@ CHECK: beq.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc] 330 331@ If we have an open but incompatible IT block, we close it and use the 332@ self-predicated encodings, without an IT block: 333 addeq r0, r1 334 bgt #0x4 335@ CHECK: it eq 336@ CHECK: addeq r0, r1 337@ CHECK: bgt #4 @ encoding: [0x02,0xdc] 338 addeq r0, r1 339 bgt #0x100 340@ CHECK: it eq 341@ CHECK: addeq r0, r1 342@ CHECK: bgt.w #256 @ encoding: [0x00,0xf3,0x80,0x80] 343 344@ Breakpoint instructions are allowed in IT blocks, but are always executed 345@ regardless of the condition flags. We could continue an IT block through 346@ them, but currently do not. 347 .section test16 348@ CHECK-LABEL: test16 349 addeq r0, r1 350 bkpt #0 351 addeq r0, r1 352@ CHECK: it eq 353@ CHECK: addeq r0, r1 354@ CHECK: bkpt #0 355@ CHECK: it eq 356@ CHECK: addeq r0, r1 357 358@ The .if directive causes entire assembly statments to be dropped before they 359@ reach the IT block generation code. This happens to be exactly what we want, 360@ and allows IT blocks to extend into and out of .if blocks. Only one arm of the 361@ .if will be seen by the IT state tracking code, so the subeq shouldn't have 362@ any effect here. 363 .section test17 364@ CHECK-LABEL: test17 365 addeq r0, r1 366 .if 1 367 addeq r0, r1 368 .else 369 subeq r0, r1 370 .endif 371 addeq r0, r1 372@ CHECK: ittt eq 373@ CHECK: addeq 374@ CHECK: addeq 375@ CHECK: addeq 376 377@ TODO: There are some other directives which we could continue through, such 378@ as .set and .global, but we currently conservatively flush the IT block before 379@ every directive (except for .if and friends, which are handled separately). 380 .section test18 381@ CHECK-LABEL: test18 382 addeq r0, r1 383 .set s, 1 384 addeq r0, r1 385@ CHECK: it eq 386@ CHECK: addeq 387@ CHECK: it eq 388@ CHECK: addeq 389 390@ The .rept directive can be used to create long IT blocks. 391 .section test19 392@ CHECK-LABEL: test19 393 .rept 3 394 addeq r0, r1 395 subne r0, r1 396 .endr 397@ CHECK: itete eq 398@ CHECK: addeq r0, r1 399@ CHECK: subne r0, r0, r1 400@ CHECK: addeq r0, r1 401@ CHECK: subne r0, r0, r1 402@ CHECK: ite eq 403@ CHECK: addeq r0, r1 404@ CHECK: subne r0, r0, r1 405 406@ Flush at end of file 407 .section test99 408@ CHECK-LABEL: test99 409 addeq r0, #1 410@ CHECK: it eq 411@ CHECK: addeq 412