1@ RUN: not llvm-mc < %s -triple thumbv8-unknown-unknown -show-encoding -mattr=-fp64,-fpregs64,-neon 2> %t > %t2 2@ RUN: FileCheck %s < %t --check-prefix=CHECK-ERRORS 3@ RUN: FileCheck %s < %t2 4 5 vadd.f64 d0, d1, d2 6 vsub.f64 d2, d3, d4 7 vdiv.f64 d4, d5, d6 8 vmul.f64 d6, d7, d8 9 vnmul.f64 d8, d9, d10 10@ CHECK-ERRORS: error: instruction requires: double precision VFP 11@ CHECK-ERRORS-NEXT: vadd.f64 d0, d1, d2 12@ CHECK-ERRORS: error: instruction requires: double precision VFP 13@ CHECK-ERRORS-NEXT: vsub.f64 d2, d3, d4 14@ CHECK-ERRORS: error: instruction requires: double precision VFP 15@ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d6 16@ CHECK-ERRORS: error: instruction requires: double precision VFP 17@ CHECK-ERRORS-NEXT: vmul.f64 d6, d7, d8 18@ CHECK-ERRORS: error: instruction requires: double precision VFP 19@ CHECK-ERRORS-NEXT: vnmul.f64 d8, d9, d10 20 21 vmla.f64 d11, d10, d9 22 vmls.f64 d8, d7, d6 23 vnmla.f64 d5, d4, d3 24 vnmls.f64 d2, d1, d0 25 vfma.f64 d1, d2, d3 26 vfms.f64 d4, d5, d6 27 vfnma.f64 d7, d8, d9 28 vfnms.f64 d10, d11, d12 29@ CHECK-ERRORS: error: instruction requires: double precision VFP 30@ CHECK-ERRORS-NEXT: vmla.f64 d11, d10, d9 31@ CHECK-ERRORS: error: instruction requires: double precision VFP 32@ CHECK-ERRORS-NEXT: vmls.f64 d8, d7, d6 33@ CHECK-ERRORS: error: instruction requires: double precision VFP 34@ CHECK-ERRORS-NEXT: vnmla.f64 d5, d4, d3 35@ CHECK-ERRORS: error: instruction requires: double precision VFP 36@ CHECK-ERRORS-NEXT: vnmls.f64 d2, d1, d0 37@ CHECK-ERRORS: error: instruction requires: double precision VFP 38@ CHECK-ERRORS-NEXT: vfma.f64 d1, d2, d3 39@ CHECK-ERRORS: error: instruction requires: double precision VFP 40@ CHECK-ERRORS-NEXT: vfms.f64 d4, d5, d6 41@ CHECK-ERRORS: error: instruction requires: double precision VFP 42@ CHECK-ERRORS-NEXT: vfnma.f64 d7, d8, d9 43@ CHECK-ERRORS: error: instruction requires: double precision VFP 44@ CHECK-ERRORS-NEXT: vfnms.f64 d10, d11, d12 45 46 vneg.f64 d15, d14 47 vsqrt.f64 d13, d12 48 vsqrt d13, d14 49@ CHECK-ERRORS: error: instruction requires: double precision VFP 50@ CHECK-ERRORS-NEXT: vneg.f64 d15, d14 51@ CHECK-ERRORS: error: instruction requires: double precision VFP 52@ CHECK-ERRORS-NEXT: vsqrt.f64 d13, d12 53@ CHECK-ERRORS: error: instruction requires: double precision VFP 54@ CHECK-ERRORS-NEXT: vsqrt d13, d14 55 56 vcmpe.f64 d0, d1 57 vcmp.f64 d2, d3 58 vabs.f64 d4, d5 59 vcmpe.f64 d5, #0 60 vcmp.f64 d6, #0 61@ CHECK-ERRORS: error: instruction requires: double precision VFP 62@ CHECK-ERRORS-NEXT: vcmpe.f64 d0, d1 63@ CHECK-ERRORS: error: instruction requires: double precision VFP 64@ CHECK-ERRORS-NEXT: vcmp.f64 d2, d3 65@ CHECK-ERRORS: error: instruction requires: double precision VFP 66@ CHECK-ERRORS-NEXT: vabs.f64 d4, d5 67@ CHECK-ERRORS: error: instruction requires: double precision VFP 68@ CHECK-ERRORS-NEXT: vcmpe.f64 d5, #0 69@ CHECK-ERRORS: error: instruction requires: double precision VFP 70@ CHECK-ERRORS-NEXT: vcmp.f64 d6, #0 71 72 @ FIXME: overlapping aliases and a probable TableGen indeterminacy mean 73 @ that the actual reason can vary by platform. 74 vmov.f64 d11, d10 75@ CHECK-ERRORS: instruction requires: 64-bit fp registers 76@ CHECK-ERRORS-NEXT: vmov.f64 d11, d10 77 78 vcvt.f64.s32 d9, s8 79 vcvt.f64.u32 d7, s6 80 vcvt.s32.f64 s5, d4 81 vcvt.u32.f64 s3, d2 82 vcvtr.s32.f64 s1, d0 83 vcvtr.u32.f64 s1, d2 84 vcvt.s16.f64 d3, d4, #1 85 vcvt.u16.f64 d5, d6, #2 86 vcvt.s32.f64 d7, d8, #3 87 vcvt.u32.f64 d9, d10, #4 88 vcvt.f64.s16 d11, d12, #3 89 vcvt.f64.u16 d13, d14, #2 90 vcvt.f64.s32 d15, d14, #1 91 vcvt.f64.u32 d13, d12, #1 92@ CHECK-ERRORS: error: instruction requires: double precision VFP 93@ CHECK-ERRORS-NEXT: vcvt.f64.s32 d9, s8 94@ CHECK-ERRORS: error: instruction requires: double precision VFP 95@ CHECK-ERRORS-NEXT: vcvt.f64.u32 d7, s6 96@ CHECK-ERRORS: error: instruction requires: double precision VFP 97@ CHECK-ERRORS-NEXT: vcvt.s32.f64 s5, d4 98@ CHECK-ERRORS: error: instruction requires: double precision VFP 99@ CHECK-ERRORS-NEXT: vcvt.u32.f64 s3, d2 100@ CHECK-ERRORS: error: instruction requires: double precision VFP 101@ CHECK-ERRORS-NEXT: vcvtr.s32.f64 s1, d0 102@ CHECK-ERRORS: error: instruction requires: double precision VFP 103@ CHECK-ERRORS-NEXT: vcvtr.u32.f64 s1, d2 104@ CHECK-ERRORS: error: instruction requires: double precision VFP 105@ CHECK-ERRORS-NEXT: vcvt.s16.f64 d3, d4, #1 106@ CHECK-ERRORS: error: instruction requires: double precision VFP 107@ CHECK-ERRORS-NEXT: vcvt.u16.f64 d5, d6, #2 108@ CHECK-ERRORS: error: instruction requires: double precision VFP 109@ CHECK-ERRORS-NEXT: vcvt.s32.f64 d7, d8, #3 110@ CHECK-ERRORS: error: instruction requires: double precision VFP 111@ CHECK-ERRORS-NEXT: vcvt.u32.f64 d9, d10, #4 112@ CHECK-ERRORS: error: instruction requires: double precision VFP 113@ CHECK-ERRORS-NEXT: vcvt.f64.s16 d11, d12, #3 114@ CHECK-ERRORS: error: instruction requires: double precision VFP 115@ CHECK-ERRORS-NEXT: vcvt.f64.u16 d13, d14, #2 116@ CHECK-ERRORS: error: instruction requires: double precision VFP 117@ CHECK-ERRORS-NEXT: vcvt.f64.s32 d15, d14, #1 118@ CHECK-ERRORS: error: instruction requires: double precision VFP 119@ CHECK-ERRORS-NEXT: vcvt.f64.u32 d13, d12, #1 120 121 @ v8 operations, also double precision so make sure they're rejected. 122 vselgt.f64 d0, d1, d2 123 vselge.f64 d3, d4, d5 124 vseleq.f64 d6, d7, d8 125 vselvs.f64 d9, d10, d11 126@ CHECK-ERRORS: error: instruction requires: double precision VFP 127@ CHECK-ERRORS-NEXT: vselgt.f64 d0, d1, d2 128@ CHECK-ERRORS: error: instruction requires: double precision VFP 129@ CHECK-ERRORS-NEXT: vselge.f64 d3, d4, d5 130@ CHECK-ERRORS: error: instruction requires: double precision VFP 131@ CHECK-ERRORS-NEXT: vseleq.f64 d6, d7, d8 132@ CHECK-ERRORS: error: instruction requires: double precision VFP 133@ CHECK-ERRORS-NEXT: vselvs.f64 d9, d10, d11 134 135 vmaxnm.f64 d12, d13, d14 136@ CHECK-ERRORS: error: instruction requires: double precision VFP 137@ CHECK-ERRORS-NEXT: vmaxnm.f64 d12, d13, d14 138 139 vcvtb.f64.f16 d7, s8 140 vcvtb.f16.f64 s9, d10 141 vcvtt.f64.f16 d11, s12 142 vcvtt.f16.f64 s13, d14 143@ CHECK-ERRORS: error: instruction requires: double precision VFP 144@ CHECK-ERRORS-NEXT: vcvtb.f64.f16 d7, s8 145@ CHECK-ERRORS: error: instruction requires: double precision VFP 146@ CHECK-ERRORS-NEXT: vcvtb.f16.f64 s9, d10 147@ CHECK-ERRORS: error: instruction requires: double precision VFP 148@ CHECK-ERRORS-NEXT: vcvtt.f64.f16 d11, s12 149@ CHECK-ERRORS: error: instruction requires: double precision VFP 150@ CHECK-ERRORS-NEXT: vcvtt.f16.f64 s13, d14 151 152 vrintz.f64 d15, d14 153 vrintr.f64.f64 d13, d12 154 vrintx.f64 d11, d10 155 vrinta.f64.f64 d9, d8 156 vrintn.f64 d7, d6 157 vrintp.f64.f64 d5, d4 158 vrintm.f64 d3, d2 159@ CHECK-ERRORS: error: instruction requires: double precision VFP 160@ CHECK-ERRORS-NEXT: vrintz.f64 d15, d14 161@ CHECK-ERRORS: error: instruction requires: double precision VFP 162@ CHECK-ERRORS-NEXT: vrintr.f64.f64 d13, d12 163@ CHECK-ERRORS: error: instruction requires: double precision VFP 164@ CHECK-ERRORS-NEXT: vrintx.f64 d11, d10 165@ CHECK-ERRORS: error: instruction requires: double precision VFP 166@ CHECK-ERRORS-NEXT: vrinta.f64.f64 d9, d8 167@ CHECK-ERRORS: error: instruction requires: double precision VFP 168@ CHECK-ERRORS-NEXT: vrintn.f64 d7, d6 169@ CHECK-ERRORS: error: instruction requires: double precision VFP 170@ CHECK-ERRORS-NEXT: vrintp.f64.f64 d5, d4 171@ CHECK-ERRORS: error: instruction requires: double precision VFP 172@ CHECK-ERRORS-NEXT: vrintm.f64 d3, d2 173 174 vstm r4, {} 175 vstm r4, {d15-d30} 176 vstm r4, {d15-d31} 177 vstm r4, {s15-s31} 178 vldm r4, {d15-d30} 179 vldm r4, {d15-d31} 180 vldm r4, {s15-s31} 181@ CHECK-ERRORS: error: register expected 182@ CHECK: vstmia r4, {d15, d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30} 183@ CHECK-ERRORS: error: list of registers must be at least 1 and at most 16 184@ CHECK: vstmia r4, {s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31} 185@ CHECK: vldmia r4, {d15, d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30} 186@ CHECK-ERRORS: error: list of registers must be at least 1 and at most 16 187@ CHECK: vldmia r4, {s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31} 188 189 @ Double precisionish operations that actually *are* allowed. 190 vldr d0, [sp] 191 vstr d3, [sp] 192 vldm r0, {d0, d1} 193 vstm r4, {d3, d4} 194 vpush {d6, d7} 195 vpop {d8, d9} 196 vmov r1, r0, d1 197 vmov d2, r3, r4 198 vmov.f64 r5, r6, d7 199 vmov.f64 d8, r9, r10 200@ CHECK: vldr d0, [sp] 201@ CHECK: vstr d3, [sp] 202@ CHECK: vldmia r0, {d0, d1} 203@ CHECK: vstmia r4, {d3, d4} 204@ CHECK: vpush {d6, d7} 205@ CHECK: vpop {d8, d9} 206@ CHECK: vmov r1, r0, d1 207@ CHECK: vmov d2, r3, r4 208@ CHECK: vmov r5, r6, d7 209@ CHECK: vmov d8, r9, r10 210