1# RUN: llvm-mc %s -triple=riscv64 -mattr=+d -riscv-no-aliases -show-encoding \ 2# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s 3# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d < %s \ 4# RUN: | llvm-objdump --mattr=+d -M no-aliases -d -r - \ 5# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s 6# 7# RUN: not llvm-mc -triple riscv32 -mattr=+d < %s 2>&1 \ 8# RUN: | FileCheck -check-prefix=CHECK-RV32 %s 9 10# CHECK-ASM-AND-OBJ: fcvt.l.d a0, ft0, dyn 11# CHECK-ASM: encoding: [0x53,0x75,0x20,0xc2] 12# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 13fcvt.l.d a0, ft0, dyn 14# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, ft1, dyn 15# CHECK-ASM: encoding: [0xd3,0xf5,0x30,0xc2] 16# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 17fcvt.lu.d a1, ft1, dyn 18# CHECK-ASM-AND-OBJ: fmv.x.d a2, ft2 19# CHECK-ASM: encoding: [0x53,0x06,0x01,0xe2] 20# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 21fmv.x.d a2, ft2 22# CHECK-ASM-AND-OBJ: fcvt.d.l ft3, a3, dyn 23# CHECK-ASM: encoding: [0xd3,0xf1,0x26,0xd2] 24# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 25fcvt.d.l ft3, a3, dyn 26# CHECK-ASM-AND-OBJ: fcvt.d.lu ft4, a4, dyn 27# CHECK-ASM: encoding: [0x53,0x72,0x37,0xd2] 28# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 29fcvt.d.lu ft4, a4, dyn 30# CHECK-ASM-AND-OBJ: fmv.d.x ft5, a5 31# CHECK-ASM: encoding: [0xd3,0x82,0x07,0xf2] 32# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 33fmv.d.x ft5, a5 34 35# Rounding modes 36# CHECK-ASM-AND-OBJ: fcvt.d.l ft3, a3, rne 37# CHECK-ASM: encoding: [0xd3,0x81,0x26,0xd2] 38# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 39fcvt.d.l ft3, a3, rne 40# CHECK-ASM-AND-OBJ: fcvt.d.lu ft4, a4, rtz 41# CHECK-ASM: encoding: [0x53,0x12,0x37,0xd2] 42# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 43fcvt.d.lu ft4, a4, rtz 44# CHECK-ASM-AND-OBJ: fcvt.l.d a0, ft0, rdn 45# CHECK-ASM: encoding: [0x53,0x25,0x20,0xc2] 46# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 47fcvt.l.d a0, ft0, rdn 48# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, ft1, rup 49# CHECK-ASM: encoding: [0xd3,0xb5,0x30,0xc2] 50# CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set 51fcvt.lu.d a1, ft1, rup 52