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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
3; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
4
5target datalayout = "e-m:m-p1:64:64:64-p:32:32:32-n8:16:32"
6
7define dso_local i16 @select_i16(i16 %a, i16 %b, i1 %cond) {
8; CHECK-LABEL: @select_i16(
9; CHECK-NEXT:  entry:
10; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[A:%.*]], i16 [[B:%.*]]
11; CHECK-NEXT:    ret i16 [[SEL]]
12;
13entry:
14  %conv0 = sext i16 %a to i32
15  %conv1 = sext i16 %b to i32
16  %sel = select i1 %cond, i32 %conv0, i32 %conv1
17  %conv4 = trunc i32 %sel to i16
18  ret i16 %conv4
19}
20
21define dso_local i8 @select_i8(i8 %a, i8 %b, i1 %cond) {
22; CHECK-LABEL: @select_i8(
23; CHECK-NEXT:  entry:
24; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i8 [[A:%.*]], i8 [[B:%.*]]
25; CHECK-NEXT:    ret i8 [[SEL]]
26;
27entry:
28  %conv0 = sext i8 %a to i32
29  %conv1 = sext i8 %b to i32
30  %sel = select i1 %cond, i32 %conv0, i32 %conv1
31  %conv4 = trunc i32 %sel to i8
32  ret i8 %conv4
33}
34
35define dso_local i16 @select_i8Ops_trunc_i16(i8 %a, i8 %b, i1 %cond) {
36; CHECK-LABEL: @select_i8Ops_trunc_i16(
37; CHECK-NEXT:  entry:
38; CHECK-NEXT:    [[CONV0:%.*]] = sext i8 [[A:%.*]] to i16
39; CHECK-NEXT:    [[CONV1:%.*]] = sext i8 [[B:%.*]] to i16
40; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[CONV0]], i16 [[CONV1]]
41; CHECK-NEXT:    ret i16 [[SEL]]
42;
43entry:
44  %conv0 = sext i8 %a to i32
45  %conv1 = sext i8 %b to i32
46  %sel = select i1 %cond, i32 %conv0, i32 %conv1
47  %conv4 = trunc i32 %sel to i16
48  ret i16 %conv4
49}
50
51;
52define dso_local i16 @select_i16_const(i16 %a, i1 %cond) {
53; CHECK-LABEL: @select_i16_const(
54; CHECK-NEXT:  entry:
55; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 109, i16 [[A:%.*]]
56; CHECK-NEXT:    ret i16 [[SEL]]
57;
58entry:
59  %conv = sext i16 %a to i32
60  %sel = select i1 %cond, i32 109, i32 %conv
61  %conv4 = trunc i32 %sel to i16
62  ret i16 %conv4
63}
64
65; 3080196 = 0x2f0004
66define dso_local i16 @select_i16_bigConst(i16 %a, i1 %cond) {
67; CHECK-LABEL: @select_i16_bigConst(
68; CHECK-NEXT:  entry:
69; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 4, i16 [[A:%.*]]
70; CHECK-NEXT:    ret i16 [[SEL]]
71;
72entry:
73  %conv = sext i16 %a to i32
74  %sel = select i1 %cond, i32 3080196, i32 %conv
75  %conv4 = trunc i32 %sel to i16
76  ret i16 %conv4
77}
78
79define dso_local i8 @select_i8_const(i8 %a, i1 %cond) {
80; CHECK-LABEL: @select_i8_const(
81; CHECK-NEXT:  entry:
82; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i8 109, i8 [[A:%.*]]
83; CHECK-NEXT:    ret i8 [[SEL]]
84;
85entry:
86  %conv = sext i8 %a to i32
87  %sel = select i1 %cond, i32 109, i32 %conv
88  %conv4 = trunc i32 %sel to i8
89  ret i8 %conv4
90}
91
92; 20228 = 0x4f02
93define dso_local i8 @select_i8_bigConst(i8 %a, i1 %cond) {
94; CHECK-LABEL: @select_i8_bigConst(
95; CHECK-NEXT:  entry:
96; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i8 4, i8 [[A:%.*]]
97; CHECK-NEXT:    ret i8 [[SEL]]
98;
99entry:
100  %conv = sext i8 %a to i32
101  %sel = select i1 %cond, i32 20228, i32 %conv
102  %conv4 = trunc i32 %sel to i8
103  ret i8 %conv4
104}
105
106define dso_local i16 @select_sext(i8 %a, i1 %cond) {
107; CHECK-LABEL: @select_sext(
108; CHECK-NEXT:  entry:
109; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[A:%.*]] to i16
110; CHECK-NEXT:    [[SUB:%.*]] = sub i16 0, [[CONV]]
111; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
112; CHECK-NEXT:    ret i16 [[SEL]]
113;
114entry:
115  %conv = sext i8 %a to i32
116  %sub = sub nsw i32 0, %conv
117  %sel = select i1 %cond, i32 %sub, i32 %conv
118  %conv4 = trunc i32 %sel to i16
119  ret i16 %conv4
120}
121
122define dso_local i16 @select_zext(i8 %a, i1 %cond) {
123; CHECK-LABEL: @select_zext(
124; CHECK-NEXT:  entry:
125; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i16
126; CHECK-NEXT:    [[SUB:%.*]] = sub i16 0, [[CONV]]
127; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
128; CHECK-NEXT:    ret i16 [[SEL]]
129;
130entry:
131  %conv = zext i8 %a to i32
132  %sub = sub nsw i32 0, %conv
133  %sel = select i1 %cond, i32 %sub, i32 %conv
134  %conv4 = trunc i32 %sel to i16
135  ret i16 %conv4
136}
137
138