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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -mtriple=aarch64-- -atomic-expand %s | FileCheck %s
3; RUN: opt -S -mtriple=aarch64-- -mattr=+outline-atomics -atomic-expand %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS
4
5define void @atomic_swap_f16(half* %ptr, half %val) nounwind {
6; CHECK-LABEL: @atomic_swap_f16(
7; CHECK-NEXT:    br label [[ATOMICRMW_START:%.*]]
8; CHECK:       atomicrmw.start:
9; CHECK-NEXT:    [[TMP1:%.*]] = call i64 @llvm.aarch64.ldaxr.p0f16(half* [[PTR:%.*]])
10; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i16
11; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i16 [[TMP2]] to half
12; CHECK-NEXT:    [[TMP4:%.*]] = bitcast half [[VAL:%.*]] to i16
13; CHECK-NEXT:    [[TMP5:%.*]] = zext i16 [[TMP4]] to i64
14; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.aarch64.stxr.p0f16(i64 [[TMP5]], half* [[PTR]])
15; CHECK-NEXT:    [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
16; CHECK-NEXT:    br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
17; CHECK:       atomicrmw.end:
18; CHECK-NEXT:    ret void
19;
20; OUTLINE-ATOMICS-LABEL: @atomic_swap_f16(
21; OUTLINE-ATOMICS-NEXT:    [[T1:%.*]] = atomicrmw xchg half* [[PTR:%.*]], half [[VAL:%.*]] acquire
22; OUTLINE-ATOMICS-NEXT:    ret void
23;
24  %t1 = atomicrmw xchg half* %ptr, half %val acquire
25  ret void
26}
27
28define void @atomic_swap_f32(float* %ptr, float %val) nounwind {
29; CHECK-LABEL: @atomic_swap_f32(
30; CHECK-NEXT:    br label [[ATOMICRMW_START:%.*]]
31; CHECK:       atomicrmw.start:
32; CHECK-NEXT:    [[TMP1:%.*]] = call i64 @llvm.aarch64.ldaxr.p0f32(float* [[PTR:%.*]])
33; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
34; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float
35; CHECK-NEXT:    [[TMP4:%.*]] = bitcast float [[VAL:%.*]] to i32
36; CHECK-NEXT:    [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
37; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.aarch64.stxr.p0f32(i64 [[TMP5]], float* [[PTR]])
38; CHECK-NEXT:    [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
39; CHECK-NEXT:    br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
40; CHECK:       atomicrmw.end:
41; CHECK-NEXT:    ret void
42;
43; OUTLINE-ATOMICS-LABEL: @atomic_swap_f32(
44; OUTLINE-ATOMICS-NEXT:    [[T1:%.*]] = atomicrmw xchg float* [[PTR:%.*]], float [[VAL:%.*]] acquire
45; OUTLINE-ATOMICS-NEXT:    ret void
46;
47  %t1 = atomicrmw xchg float* %ptr, float %val acquire
48  ret void
49}
50
51define void @atomic_swap_f64(double* %ptr, double %val) nounwind {
52; CHECK-LABEL: @atomic_swap_f64(
53; CHECK-NEXT:    br label [[ATOMICRMW_START:%.*]]
54; CHECK:       atomicrmw.start:
55; CHECK-NEXT:    [[TMP1:%.*]] = call i64 @llvm.aarch64.ldaxr.p0f64(double* [[PTR:%.*]])
56; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i64 [[TMP1]] to double
57; CHECK-NEXT:    [[TMP3:%.*]] = bitcast double [[VAL:%.*]] to i64
58; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.aarch64.stxr.p0f64(i64 [[TMP3]], double* [[PTR]])
59; CHECK-NEXT:    [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP4]], 0
60; CHECK-NEXT:    br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
61; CHECK:       atomicrmw.end:
62; CHECK-NEXT:    ret void
63;
64; OUTLINE-ATOMICS-LABEL: @atomic_swap_f64(
65; OUTLINE-ATOMICS-NEXT:    [[T1:%.*]] = atomicrmw xchg double* [[PTR:%.*]], double [[VAL:%.*]] acquire
66; OUTLINE-ATOMICS-NEXT:    ret void
67;
68  %t1 = atomicrmw xchg double* %ptr, double %val acquire
69  ret void
70}
71