• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -codegenprepare -mtriple=amdgcn--amdhsa < %s | FileCheck %s
3
4define amdgpu_kernel void @test_sink_as999_small_max_mubuf_offset(i32 addrspace(999)* %out, i8 addrspace(999)* %in) {
5; CHECK-LABEL: @test_sink_as999_small_max_mubuf_offset(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    [[OUT_GEP:%.*]] = getelementptr i32, i32 addrspace(999)* [[OUT:%.*]], i32 1024
8; CHECK-NEXT:    [[IN_GEP:%.*]] = getelementptr i8, i8 addrspace(999)* [[IN:%.*]], i64 4095
9; CHECK-NEXT:    [[TID:%.*]] = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #1
10; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[TID]], 0
11; CHECK-NEXT:    br i1 [[TMP0]], label [[ENDIF:%.*]], label [[IF:%.*]]
12; CHECK:       if:
13; CHECK-NEXT:    [[TMP1:%.*]] = load i8, i8 addrspace(999)* [[IN_GEP]], align 1
14; CHECK-NEXT:    [[TMP2:%.*]] = sext i8 [[TMP1]] to i32
15; CHECK-NEXT:    br label [[ENDIF]]
16; CHECK:       endif:
17; CHECK-NEXT:    [[X:%.*]] = phi i32 [ [[TMP2]], [[IF]] ], [ 0, [[ENTRY:%.*]] ]
18; CHECK-NEXT:    store i32 [[X]], i32 addrspace(999)* [[OUT_GEP]], align 4
19; CHECK-NEXT:    br label [[DONE:%.*]]
20; CHECK:       done:
21; CHECK-NEXT:    ret void
22;
23entry:
24  %out.gep = getelementptr i32, i32 addrspace(999)* %out, i32 1024
25  %in.gep = getelementptr i8, i8 addrspace(999)* %in, i64 4095
26  %tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
27  %tmp0 = icmp eq i32 %tid, 0
28  br i1 %tmp0, label %endif, label %if
29
30if:
31  %tmp1 = load i8, i8 addrspace(999)* %in.gep
32  %tmp2 = sext i8 %tmp1 to i32
33  br label %endif
34
35endif:
36  %x = phi i32 [ %tmp2, %if ], [ 0, %entry ]
37  store i32 %x, i32 addrspace(999)* %out.gep
38  br label %done
39
40done:
41  ret void
42}
43
44declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
45
46attributes #0 = { nounwind readnone }
47attributes #1 = { nounwind }
48attributes #2 = { nounwind argmemonly }
49