1; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown < %s | FileCheck -check-prefix=ASC -check-prefix=COMMON %s 2 3; COMMON-LABEL: @test_sink_ptrtoint_asc( 4; ASC: addrspacecast 5; ASC-NOT: ptrtoint 6; ASC-NOT: inttoptr 7 8define amdgpu_kernel void @test_sink_ptrtoint_asc(float addrspace(1)* nocapture %arg, float addrspace(1)* nocapture readonly %arg1, float addrspace(3)* %arg2) #0 { 9bb: 10 %tmp = getelementptr inbounds float, float addrspace(3)* %arg2, i32 16 11 %tmp2 = tail call i32 @llvm.amdgcn.workitem.id.x() #1 12 %tmp3 = sext i32 %tmp2 to i64 13 %tmp4 = getelementptr inbounds float, float addrspace(1)* %arg1, i64 %tmp3 14 %tmp5 = load float, float addrspace(1)* %tmp4, align 4 15 %tmp6 = addrspacecast float addrspace(3)* %tmp to float addrspace(4)* 16 %tmp7 = fcmp olt float %tmp5, 8.388608e+06 17 br i1 %tmp7, label %bb8, label %bb14 18 19bb8: ; preds = %bb 20 %tmp9 = tail call float @llvm.fma.f32(float %tmp5, float 0x3FE45F3060000000, float 5.000000e-01) #1 21 %tmp10 = fmul float %tmp9, 0x3E74442D00000000 22 %tmp11 = fsub float -0.000000e+00, %tmp10 23 %tmp12 = tail call float @llvm.fma.f32(float %tmp9, float 0x3E74442D00000000, float %tmp11) #1 24 store float %tmp12, float addrspace(4)* %tmp6, align 4 25 %tmp13 = fsub float -0.000000e+00, %tmp12 26 br label %bb15 27 28bb14: ; preds = %bb 29 store float 2.000000e+00, float addrspace(4)* %tmp6, align 4 30 br label %bb15 31 32bb15: ; preds = %bb14, %bb8 33 %tmp16 = phi float [ 0.000000e+00, %bb14 ], [ %tmp13, %bb8 ] 34 %tmp17 = fsub float -0.000000e+00, %tmp16 35 %tmp18 = tail call float @llvm.fma.f32(float 1.000000e+00, float 0x3FF0AAAAA0000000, float %tmp17) #1 36 %tmp19 = fsub float 2.187500e-01, %tmp18 37 %tmp20 = fsub float 7.187500e-01, %tmp19 38 %tmp21 = fcmp ogt float %tmp5, 1.600000e+01 39 %tmp22 = select i1 %tmp21, float 0x7FF8000000000000, float %tmp20 40 %tmp23 = getelementptr inbounds float, float addrspace(1)* %arg, i64 %tmp3 41 store float %tmp22, float addrspace(1)* %tmp23, align 4 42 ret void 43} 44 45declare float @llvm.fma.f32(float, float, float) #1 46declare i32 @llvm.amdgcn.workitem.id.x() #1 47 48attributes #0 = { nounwind } 49attributes #1 = { nounwind readnone } 50