1; RUN: opt -mtriple=amdgcn--amdhsa -S -amdgpu-inline -inline-threshold=0 < %s | FileCheck %s 2 3target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5" 4 5define void @use_flat_ptr_arg(float* nocapture %p) { 6entry: 7 %tmp1 = load float, float* %p, align 4 8 %div = fdiv float 1.000000e+00, %tmp1 9 %add0 = fadd float %div, 1.0 10 %add1 = fadd float %add0, 1.0 11 %add2 = fadd float %add1, 1.0 12 %add3 = fadd float %add2, 1.0 13 %add4 = fadd float %add3, 1.0 14 %add5 = fadd float %add4, 1.0 15 %add6 = fadd float %add5, 1.0 16 %add7 = fadd float %add6, 1.0 17 %add8 = fadd float %add7, 1.0 18 %add9 = fadd float %add8, 1.0 19 %add10 = fadd float %add9, 1.0 20 store float %add10, float* %p, align 4 21 ret void 22} 23 24define void @use_private_ptr_arg(float addrspace(5)* nocapture %p) { 25entry: 26 %tmp1 = load float, float addrspace(5)* %p, align 4 27 %div = fdiv float 1.000000e+00, %tmp1 28 %add0 = fadd float %div, 1.0 29 %add1 = fadd float %add0, 1.0 30 %add2 = fadd float %add1, 1.0 31 %add3 = fadd float %add2, 1.0 32 %add4 = fadd float %add3, 1.0 33 %add5 = fadd float %add4, 1.0 34 %add6 = fadd float %add5, 1.0 35 %add7 = fadd float %add6, 1.0 36 %add8 = fadd float %add7, 1.0 37 %add9 = fadd float %add8, 1.0 38 %add10 = fadd float %add9, 1.0 39 store float %add10, float addrspace(5)* %p, align 4 40 ret void 41} 42 43; Test that the inline threshold is boosted if called with an 44; addrspacecasted' alloca. 45; CHECK-LABEL: @test_inliner_flat_ptr( 46; CHECK: call i32 @llvm.amdgcn.workitem.id.x() 47; CHECK-NOT: call 48; CHECK-NOT: call 49define amdgpu_kernel void @test_inliner_flat_ptr(float addrspace(1)* nocapture %a, i32 %n) { 50entry: 51 %pvt_arr = alloca [64 x float], align 4, addrspace(5) 52 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() 53 %arrayidx = getelementptr inbounds float, float addrspace(1)* %a, i32 %tid 54 %tmp2 = load float, float addrspace(1)* %arrayidx, align 4 55 %add = add i32 %tid, 1 56 %arrayidx2 = getelementptr inbounds float, float addrspace(1)* %a, i32 %add 57 %tmp5 = load float, float addrspace(1)* %arrayidx2, align 4 58 %or = or i32 %tid, %n 59 %arrayidx5 = getelementptr inbounds [64 x float], [64 x float] addrspace(5)* %pvt_arr, i32 0, i32 %or 60 %arrayidx7 = getelementptr inbounds [64 x float], [64 x float] addrspace(5)* %pvt_arr, i32 0, i32 %or 61 %to.flat = addrspacecast float addrspace(5)* %arrayidx7 to float* 62 call void @use_private_ptr_arg(float addrspace(5)* %arrayidx7) 63 call void @use_flat_ptr_arg(float* %to.flat) 64 ret void 65} 66 67declare i32 @llvm.amdgcn.workitem.id.x() #1 68 69attributes #0 = { noinline } 70attributes #1 = { nounwind readnone } 71