1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4; Tests for Integer BitWidth <= 64 && BitWidth % 8 != 0. 5 6;; Flip sign bit then add INT_MIN -> nop. 7define i1 @test1(i1 %x) { 8; CHECK-LABEL: @test1( 9; CHECK-NEXT: ret i1 %x 10; 11 %tmp.2 = xor i1 %x, 1 12 %tmp.4 = add i1 %tmp.2, 1 13 ret i1 %tmp.4 14} 15 16;; Flip sign bit then add INT_MIN -> nop. 17define i47 @test2(i47 %x) { 18; CHECK-LABEL: @test2( 19; CHECK-NEXT: ret i47 %x 20; 21 %tmp.2 = xor i47 %x, 70368744177664 22 %tmp.4 = add i47 %tmp.2, 70368744177664 23 ret i47 %tmp.4 24} 25 26;; Flip sign bit then add INT_MIN -> nop. 27define i15 @test3(i15 %x) { 28; CHECK-LABEL: @test3( 29; CHECK-NEXT: ret i15 %x 30; 31 %tmp.2 = xor i15 %x, 16384 32 %tmp.4 = add i15 %tmp.2, 16384 33 ret i15 %tmp.4 34} 35 36; X + signbit --> X ^ signbit 37define <2 x i5> @test3vec(<2 x i5> %x) { 38; CHECK-LABEL: @test3vec( 39; CHECK-NEXT: [[Y:%.*]] = xor <2 x i5> %x, <i5 -16, i5 -16> 40; CHECK-NEXT: ret <2 x i5> [[Y]] 41; 42 %y = add <2 x i5> %x, <i5 16, i5 16> 43 ret <2 x i5> %y 44} 45 46;; (x & 0b1111..0) + 1 -> x | 1 47define i49 @test4(i49 %x) { 48; CHECK-LABEL: @test4( 49; CHECK-NEXT: [[TMP_4:%.*]] = or i49 %x, 1 50; CHECK-NEXT: ret i49 [[TMP_4]] 51; 52 %tmp.2 = and i49 %x, 562949953421310 53 %tmp.4 = add i49 %tmp.2, 1 54 ret i49 %tmp.4 55} 56 57define i7 @sext(i4 %x) { 58; CHECK-LABEL: @sext( 59; CHECK-NEXT: [[ADD:%.*]] = sext i4 %x to i7 60; CHECK-NEXT: ret i7 [[ADD]] 61; 62 %xor = xor i4 %x, -8 63 %zext = zext i4 %xor to i7 64 %add = add nsw i7 %zext, -8 65 ret i7 %add 66} 67 68define <2 x i10> @sext_vec(<2 x i3> %x) { 69; CHECK-LABEL: @sext_vec( 70; CHECK-NEXT: [[ADD:%.*]] = sext <2 x i3> %x to <2 x i10> 71; CHECK-NEXT: ret <2 x i10> [[ADD]] 72; 73 %xor = xor <2 x i3> %x, <i3 -4, i3 -4> 74 %zext = zext <2 x i3> %xor to <2 x i10> 75 %add = add nsw <2 x i10> %zext, <i10 -4, i10 -4> 76 ret <2 x i10> %add 77} 78 79; Multiple uses of the operands don't prevent the fold. 80 81define i4 @sext_multiuse(i4 %x) { 82; CHECK-LABEL: @sext_multiuse( 83; CHECK-NEXT: [[XOR:%.*]] = xor i4 %x, -8 84; CHECK-NEXT: [[ZEXT:%.*]] = zext i4 [[XOR]] to i7 85; CHECK-NEXT: [[ADD:%.*]] = sext i4 %x to i7 86; CHECK-NEXT: [[MUL:%.*]] = sdiv i7 [[ZEXT]], [[ADD]] 87; CHECK-NEXT: [[TRUNC:%.*]] = trunc i7 [[MUL]] to i4 88; CHECK-NEXT: [[DIV:%.*]] = sdiv i4 [[TRUNC]], [[XOR]] 89; CHECK-NEXT: ret i4 [[DIV]] 90; 91 %xor = xor i4 %x, -8 92 %zext = zext i4 %xor to i7 93 %add = add nsw i7 %zext, -8 94 %mul = sdiv i7 %zext, %add 95 %trunc = trunc i7 %mul to i4 96 %div = sdiv i4 %trunc, %xor 97 ret i4 %div 98} 99 100; Tests for Integer BitWidth > 64 && BitWidth <= 1024. 101 102;; Flip sign bit then add INT_MIN -> nop. 103define i111 @test5(i111 %x) { 104; CHECK-LABEL: @test5( 105; CHECK-NEXT: ret i111 %x 106; 107 %tmp.2 = shl i111 1, 110 108 %tmp.4 = xor i111 %x, %tmp.2 109 %tmp.6 = add i111 %tmp.4, %tmp.2 110 ret i111 %tmp.6 111} 112 113;; Flip sign bit then add INT_MIN -> nop. 114define i65 @test6(i65 %x) { 115; CHECK-LABEL: @test6( 116; CHECK-NEXT: ret i65 %x 117; 118 %tmp.0 = shl i65 1, 64 119 %tmp.2 = xor i65 %x, %tmp.0 120 %tmp.4 = add i65 %tmp.2, %tmp.0 121 ret i65 %tmp.4 122} 123 124;; Flip sign bit then add INT_MIN -> nop. 125define i1024 @test7(i1024 %x) { 126; CHECK-LABEL: @test7( 127; CHECK-NEXT: ret i1024 %x 128; 129 %tmp.0 = shl i1024 1, 1023 130 %tmp.2 = xor i1024 %x, %tmp.0 131 %tmp.4 = add i1024 %tmp.2, %tmp.0 132 ret i1024 %tmp.4 133} 134 135;; If we have add(xor(X, 0xF..F80..), 0x80..), it's an xor. 136define i128 @test8(i128 %x) { 137; CHECK-LABEL: @test8( 138; CHECK-NEXT: [[TMP_4:%.*]] = xor i128 %x, 170141183460469231731687303715884105600 139; CHECK-NEXT: ret i128 [[TMP_4]] 140; 141 %tmp.5 = shl i128 1, 127 142 %tmp.1 = ashr i128 %tmp.5, 120 143 %tmp.2 = xor i128 %x, %tmp.1 144 %tmp.4 = add i128 %tmp.2, %tmp.5 145 ret i128 %tmp.4 146} 147 148;; (x & 254)+1 -> (x & 254)|1 149define i77 @test9(i77 %x) { 150; CHECK-LABEL: @test9( 151; CHECK-NEXT: [[TMP_2:%.*]] = and i77 %x, 562949953421310 152; CHECK-NEXT: [[TMP_4:%.*]] = or i77 [[TMP_2]], 1 153; CHECK-NEXT: ret i77 [[TMP_4]] 154; 155 %tmp.2 = and i77 %x, 562949953421310 156 %tmp.4 = add i77 %tmp.2, 1 157 ret i77 %tmp.4 158} 159 160