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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -instcombine -S < %s | FileCheck %s
3
4target datalayout = "e-m:e-i64:64-n8:16:32:64"
5
6declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
7declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
8declare i32 @llvm.ctpop.i32(i32) nounwind readnone
9declare <2 x i8> @llvm.cttz.v2i8(<2 x i8>, i1) nounwind readnone
10declare <2 x i8> @llvm.ctlz.v2i8(<2 x i8>, i1) nounwind readnone
11declare <2 x i8> @llvm.ctpop.v2i8(<2 x i8>) nounwind readnone
12
13define i32 @lshr_ctlz_zero_is_not_undef(i32 %x) {
14; CHECK-LABEL: @lshr_ctlz_zero_is_not_undef(
15; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 0
16; CHECK-NEXT:    [[SH:%.*]] = zext i1 [[TMP1]] to i32
17; CHECK-NEXT:    ret i32 [[SH]]
18;
19  %ct = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
20  %sh = lshr i32 %ct, 5
21  ret i32 %sh
22}
23
24define i32 @lshr_cttz_zero_is_not_undef(i32 %x) {
25; CHECK-LABEL: @lshr_cttz_zero_is_not_undef(
26; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 0
27; CHECK-NEXT:    [[SH:%.*]] = zext i1 [[TMP1]] to i32
28; CHECK-NEXT:    ret i32 [[SH]]
29;
30  %ct = call i32 @llvm.cttz.i32(i32 %x, i1 false)
31  %sh = lshr i32 %ct, 5
32  ret i32 %sh
33}
34
35define i32 @lshr_ctpop(i32 %x) {
36; CHECK-LABEL: @lshr_ctpop(
37; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], -1
38; CHECK-NEXT:    [[SH:%.*]] = zext i1 [[TMP1]] to i32
39; CHECK-NEXT:    ret i32 [[SH]]
40;
41  %ct = call i32 @llvm.ctpop.i32(i32 %x)
42  %sh = lshr i32 %ct, 5
43  ret i32 %sh
44}
45
46define <2 x i8> @lshr_ctlz_zero_is_not_undef_splat_vec(<2 x i8> %x) {
47; CHECK-LABEL: @lshr_ctlz_zero_is_not_undef_splat_vec(
48; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], zeroinitializer
49; CHECK-NEXT:    [[SH:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8>
50; CHECK-NEXT:    ret <2 x i8> [[SH]]
51;
52  %ct = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %x, i1 false)
53  %sh = lshr <2 x i8> %ct, <i8 3, i8 3>
54  ret <2 x i8> %sh
55}
56
57define <2 x i8> @lshr_cttz_zero_is_not_undef_splat_vec(<2 x i8> %x) {
58; CHECK-LABEL: @lshr_cttz_zero_is_not_undef_splat_vec(
59; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], zeroinitializer
60; CHECK-NEXT:    [[SH:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8>
61; CHECK-NEXT:    ret <2 x i8> [[SH]]
62;
63  %ct = call <2 x i8> @llvm.cttz.v2i8(<2 x i8> %x, i1 false)
64  %sh = lshr <2 x i8> %ct, <i8 3, i8 3>
65  ret <2 x i8> %sh
66}
67
68define <2 x i8> @lshr_ctpop_splat_vec(<2 x i8> %x) {
69; CHECK-LABEL: @lshr_ctpop_splat_vec(
70; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -1, i8 -1>
71; CHECK-NEXT:    [[SH:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8>
72; CHECK-NEXT:    ret <2 x i8> [[SH]]
73;
74  %ct = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> %x)
75  %sh = lshr <2 x i8> %ct, <i8 3, i8 3>
76  ret <2 x i8> %sh
77}
78
79define i32 @lshr_ctlz_zero_is_undef(i32 %x) {
80; CHECK-LABEL: @lshr_ctlz_zero_is_undef(
81; CHECK-NEXT:    ret i32 0
82;
83  %ct = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
84  %sh = lshr i32 %ct, 5
85  ret i32 %sh
86}
87
88define i32 @lshr_cttz_zero_is_undef(i32 %x) {
89; CHECK-LABEL: @lshr_cttz_zero_is_undef(
90; CHECK-NEXT:    ret i32 0
91;
92  %ct = call i32 @llvm.cttz.i32(i32 %x, i1 true)
93  %sh = lshr i32 %ct, 5
94  ret i32 %sh
95}
96
97define <2 x i8> @lshr_ctlz_zero_is_undef_splat_vec(<2 x i8> %x) {
98; CHECK-LABEL: @lshr_ctlz_zero_is_undef_splat_vec(
99; CHECK-NEXT:    ret <2 x i8> zeroinitializer
100;
101  %ct = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %x, i1 true)
102  %sh = lshr <2 x i8> %ct, <i8 3, i8 3>
103  ret <2 x i8> %sh
104}
105
106define i8 @lshr_ctlz_zero_is_undef_vec(<2 x i8> %x) {
107; CHECK-LABEL: @lshr_ctlz_zero_is_undef_vec(
108; CHECK-NEXT:    ret i8 0
109;
110  %ct = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %x, i1 true)
111  %sh = lshr <2 x i8> %ct, <i8 3, i8 0>
112  %ex = extractelement <2 x i8> %sh, i32 0
113  ret i8 %ex
114}
115
116define <2 x i8> @lshr_cttz_zero_is_undef_splat_vec(<2 x i8> %x) {
117; CHECK-LABEL: @lshr_cttz_zero_is_undef_splat_vec(
118; CHECK-NEXT:    ret <2 x i8> zeroinitializer
119;
120  %ct = call <2 x i8> @llvm.cttz.v2i8(<2 x i8> %x, i1 true)
121  %sh = lshr <2 x i8> %ct, <i8 3, i8 3>
122  ret <2 x i8> %sh
123}
124
125define i8 @lshr_cttz_zero_is_undef_vec(<2 x i8> %x) {
126; CHECK-LABEL: @lshr_cttz_zero_is_undef_vec(
127; CHECK-NEXT:    ret i8 0
128;
129  %ct = call <2 x i8> @llvm.cttz.v2i8(<2 x i8> %x, i1 true)
130  %sh = lshr <2 x i8> %ct, <i8 3, i8 0>
131  %ex = extractelement <2 x i8> %sh, i32 0
132  ret i8 %ex
133}
134
135
136define i8 @lshr_exact(i8 %x) {
137; CHECK-LABEL: @lshr_exact(
138; CHECK-NEXT:    [[SHL:%.*]] = shl i8 [[X:%.*]], 2
139; CHECK-NEXT:    [[ADD:%.*]] = add i8 [[SHL]], 4
140; CHECK-NEXT:    [[LSHR:%.*]] = lshr exact i8 [[ADD]], 2
141; CHECK-NEXT:    ret i8 [[LSHR]]
142;
143  %shl = shl i8 %x, 2
144  %add = add i8 %shl, 4
145  %lshr = lshr i8 %add, 2
146  ret i8 %lshr
147}
148
149define <2 x i8> @lshr_exact_splat_vec(<2 x i8> %x) {
150; CHECK-LABEL: @lshr_exact_splat_vec(
151; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i8> [[X:%.*]], <i8 2, i8 2>
152; CHECK-NEXT:    [[ADD:%.*]] = add <2 x i8> [[SHL]], <i8 4, i8 4>
153; CHECK-NEXT:    [[LSHR:%.*]] = lshr exact <2 x i8> [[ADD]], <i8 2, i8 2>
154; CHECK-NEXT:    ret <2 x i8> [[LSHR]]
155;
156  %shl = shl <2 x i8> %x, <i8 2, i8 2>
157  %add = add <2 x i8> %shl, <i8 4, i8 4>
158  %lshr = lshr <2 x i8> %add, <i8 2, i8 2>
159  ret <2 x i8> %lshr
160}
161
162define i16 @bool_zext(i1 %x) {
163; CHECK-LABEL: @bool_zext(
164; CHECK-NEXT:    [[HIBIT:%.*]] = zext i1 [[X:%.*]] to i16
165; CHECK-NEXT:    ret i16 [[HIBIT]]
166;
167  %sext = sext i1 %x to i16
168  %hibit = lshr i16 %sext, 15
169  ret i16 %hibit
170}
171
172define <2 x i8> @bool_zext_splat(<2 x i1> %x) {
173; CHECK-LABEL: @bool_zext_splat(
174; CHECK-NEXT:    [[HIBIT:%.*]] = zext <2 x i1> [[X:%.*]] to <2 x i8>
175; CHECK-NEXT:    ret <2 x i8> [[HIBIT]]
176;
177  %sext = sext <2 x i1> %x to <2 x i8>
178  %hibit = lshr <2 x i8> %sext, <i8 7, i8 7>
179  ret <2 x i8> %hibit
180}
181
182define i32 @smear_sign_and_widen(i8 %x) {
183; CHECK-LABEL: @smear_sign_and_widen(
184; CHECK-NEXT:    [[TMP1:%.*]] = ashr i8 [[X:%.*]], 7
185; CHECK-NEXT:    [[HIBIT:%.*]] = zext i8 [[TMP1]] to i32
186; CHECK-NEXT:    ret i32 [[HIBIT]]
187;
188  %sext = sext i8 %x to i32
189  %hibit = lshr i32 %sext, 24
190  ret i32 %hibit
191}
192
193define i16 @smear_sign_and_widen_should_not_change_type(i4 %x) {
194; CHECK-LABEL: @smear_sign_and_widen_should_not_change_type(
195; CHECK-NEXT:    [[SEXT:%.*]] = sext i4 [[X:%.*]] to i16
196; CHECK-NEXT:    [[HIBIT:%.*]] = lshr i16 [[SEXT]], 12
197; CHECK-NEXT:    ret i16 [[HIBIT]]
198;
199  %sext = sext i4 %x to i16
200  %hibit = lshr i16 %sext, 12
201  ret i16 %hibit
202}
203
204define <2 x i8> @smear_sign_and_widen_splat(<2 x i6> %x) {
205; CHECK-LABEL: @smear_sign_and_widen_splat(
206; CHECK-NEXT:    [[TMP1:%.*]] = ashr <2 x i6> [[X:%.*]], <i6 2, i6 2>
207; CHECK-NEXT:    [[HIBIT:%.*]] = zext <2 x i6> [[TMP1]] to <2 x i8>
208; CHECK-NEXT:    ret <2 x i8> [[HIBIT]]
209;
210  %sext = sext <2 x i6> %x to <2 x i8>
211  %hibit = lshr <2 x i8> %sext, <i8 2, i8 2>
212  ret <2 x i8> %hibit
213}
214
215define i18 @fake_sext(i3 %x) {
216; CHECK-LABEL: @fake_sext(
217; CHECK-NEXT:    [[TMP1:%.*]] = lshr i3 [[X:%.*]], 2
218; CHECK-NEXT:    [[SH:%.*]] = zext i3 [[TMP1]] to i18
219; CHECK-NEXT:    ret i18 [[SH]]
220;
221  %sext = sext i3 %x to i18
222  %sh = lshr i18 %sext, 17
223  ret i18 %sh
224}
225
226; Avoid the transform if it would change the shift from a legal to illegal type.
227
228define i32 @fake_sext_but_should_not_change_type(i3 %x) {
229; CHECK-LABEL: @fake_sext_but_should_not_change_type(
230; CHECK-NEXT:    [[SEXT:%.*]] = sext i3 [[X:%.*]] to i32
231; CHECK-NEXT:    [[SH:%.*]] = lshr i32 [[SEXT]], 31
232; CHECK-NEXT:    ret i32 [[SH]]
233;
234  %sext = sext i3 %x to i32
235  %sh = lshr i32 %sext, 31
236  ret i32 %sh
237}
238
239define <2 x i8> @fake_sext_splat(<2 x i3> %x) {
240; CHECK-LABEL: @fake_sext_splat(
241; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i3> [[X:%.*]], <i3 2, i3 2>
242; CHECK-NEXT:    [[SH:%.*]] = zext <2 x i3> [[TMP1]] to <2 x i8>
243; CHECK-NEXT:    ret <2 x i8> [[SH]]
244;
245  %sext = sext <2 x i3> %x to <2 x i8>
246  %sh = lshr <2 x i8> %sext, <i8 7, i8 7>
247  ret <2 x i8> %sh
248}
249
250; Use a narrow shift: lshr (zext iM X to iN), C --> zext (lshr X, C) to iN
251
252define <2 x i32> @narrow_lshr_constant(<2 x i8> %x, <2 x i8> %y) {
253; CHECK-LABEL: @narrow_lshr_constant(
254; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 3, i8 3>
255; CHECK-NEXT:    [[SH:%.*]] = zext <2 x i8> [[TMP1]] to <2 x i32>
256; CHECK-NEXT:    ret <2 x i32> [[SH]]
257;
258  %zx = zext <2 x i8> %x to <2 x i32>
259  %sh = lshr <2 x i32> %zx, <i32 3, i32 3>
260  ret <2 x i32> %sh
261}
262