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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4define <4 x i32> @vec_select(<4 x i32> %a, <4 x i32> %b) {
5; CHECK-LABEL: @vec_select(
6; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, [[A:%.*]]
7; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <4 x i32> [[B:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
8; CHECK-NEXT:    [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A]], <4 x i32> [[SUB]]
9; CHECK-NEXT:    ret <4 x i32> [[TMP2]]
10;
11  %cmp = icmp slt <4 x i32> %b, zeroinitializer
12  %sext = sext <4 x i1> %cmp to <4 x i32>
13  %sub = sub nsw <4 x i32> zeroinitializer, %a
14  %t0 = icmp slt <4 x i32> %sext, zeroinitializer
15  %sext3 = sext <4 x i1> %t0 to <4 x i32>
16  %t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
17  %t2 = and <4 x i32> %a, %t1
18  %t3 = and <4 x i32> %sext3, %sub
19  %cond = or <4 x i32> %t2, %t3
20  ret <4 x i32> %cond
21}
22
23define <4 x i32> @vec_select_alternate_sign_bit_test(<4 x i32> %a, <4 x i32> %b) {
24; CHECK-LABEL: @vec_select_alternate_sign_bit_test(
25; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, [[A:%.*]]
26; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <4 x i32> [[B:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
27; CHECK-NEXT:    [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[SUB]], <4 x i32> [[A]]
28; CHECK-NEXT:    ret <4 x i32> [[TMP2]]
29;
30  %cmp = icmp sgt <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
31  %sext = sext <4 x i1> %cmp to <4 x i32>
32  %sub = sub nsw <4 x i32> zeroinitializer, %a
33  %t0 = icmp slt <4 x i32> %sext, zeroinitializer
34  %sext3 = sext <4 x i1> %t0 to <4 x i32>
35  %t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
36  %t2 = and <4 x i32> %a, %t1
37  %t3 = and <4 x i32> %sext3, %sub
38  %cond = or <4 x i32> %t2, %t3
39  ret <4 x i32> %cond
40}
41
42define <2 x i32> @is_negative_undef_elt(<2 x i32> %a) {
43; CHECK-LABEL: @is_negative_undef_elt(
44; CHECK-NEXT:    [[A_LOBIT:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
45; CHECK-NEXT:    ret <2 x i32> [[A_LOBIT]]
46;
47  %cmp = icmp slt <2 x i32> %a, <i32 0, i32 undef>
48  %sext = sext <2 x i1> %cmp to <2 x i32>
49  ret <2 x i32> %sext
50
51}
52
53define <2 x i32> @is_positive_undef_elt(<2 x i32> %a) {
54; CHECK-LABEL: @is_positive_undef_elt(
55; CHECK-NEXT:    [[A_LOBIT:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
56; CHECK-NEXT:    [[A_LOBIT_NOT:%.*]] = xor <2 x i32> [[A_LOBIT]], <i32 -1, i32 -1>
57; CHECK-NEXT:    ret <2 x i32> [[A_LOBIT_NOT]]
58;
59  %cmp = icmp sgt <2 x i32> %a, <i32 undef, i32 -1>
60  %sext = sext <2 x i1> %cmp to <2 x i32>
61  ret <2 x i32> %sext
62}
63
64