• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -loop-simplify -loop-fusion < %s | FileCheck %s
3
4@B = common global [1024 x i32] zeroinitializer, align 16
5
6define void @dep_free(i32* noalias %arg) {
7; CHECK-LABEL: @dep_free(
8; CHECK-NEXT:  bb:
9; CHECK-NEXT:    br label [[BB7:%.*]]
10; CHECK:       bb7:
11; CHECK-NEXT:    [[DOT014:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[TMP15:%.*]], [[BB27:%.*]] ]
12; CHECK-NEXT:    [[INDVARS_IV23:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[BB27]] ]
13; CHECK-NEXT:    [[DOT02:%.*]] = phi i32 [ 0, [[BB]] ], [ [[TMP28:%.*]], [[BB27]] ]
14; CHECK-NEXT:    [[INDVARS_IV1:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT:%.*]], [[BB27]] ]
15; CHECK-NEXT:    [[TMP:%.*]] = add nsw i32 [[DOT014]], -3
16; CHECK-NEXT:    [[TMP8:%.*]] = add nuw nsw i64 [[INDVARS_IV23]], 3
17; CHECK-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32
18; CHECK-NEXT:    [[TMP10:%.*]] = mul nsw i32 [[TMP]], [[TMP9]]
19; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[INDVARS_IV23]] to i32
20; CHECK-NEXT:    [[TMP12:%.*]] = srem i32 [[TMP10]], [[TMP11]]
21; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV23]]
22; CHECK-NEXT:    store i32 [[TMP12]], i32* [[TMP13]], align 4
23; CHECK-NEXT:    br label [[BB14:%.*]]
24; CHECK:       bb14:
25; CHECK-NEXT:    [[TMP20:%.*]] = add nsw i32 [[DOT02]], -3
26; CHECK-NEXT:    [[TMP21:%.*]] = add nuw nsw i64 [[INDVARS_IV1]], 3
27; CHECK-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
28; CHECK-NEXT:    [[TMP23:%.*]] = mul nsw i32 [[TMP20]], [[TMP22]]
29; CHECK-NEXT:    [[TMP24:%.*]] = trunc i64 [[INDVARS_IV1]] to i32
30; CHECK-NEXT:    [[TMP25:%.*]] = srem i32 [[TMP23]], [[TMP24]]
31; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[INDVARS_IV1]]
32; CHECK-NEXT:    store i32 [[TMP25]], i32* [[TMP26]], align 4
33; CHECK-NEXT:    br label [[BB27]]
34; CHECK:       bb27:
35; CHECK-NEXT:    [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV23]], 1
36; CHECK-NEXT:    [[TMP15]] = add nuw nsw i32 [[DOT014]], 1
37; CHECK-NEXT:    [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
38; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
39; CHECK-NEXT:    [[TMP28]] = add nuw nsw i32 [[DOT02]], 1
40; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
41; CHECK-NEXT:    br i1 [[EXITCOND]], label [[BB7]], label [[BB18:%.*]]
42; CHECK:       bb18:
43; CHECK-NEXT:    br label [[BB29:%.*]]
44; CHECK:       bb29:
45; CHECK-NEXT:    ret void
46;
47bb:
48  br label %bb7
49
50bb7:                                              ; preds = %bb, %bb14
51  %.014 = phi i32 [ 0, %bb ], [ %tmp15, %bb14 ]
52  %indvars.iv23 = phi i64 [ 0, %bb ], [ %indvars.iv.next3, %bb14 ]
53  %tmp = add nsw i32 %.014, -3
54  %tmp8 = add nuw nsw i64 %indvars.iv23, 3
55  %tmp9 = trunc i64 %tmp8 to i32
56  %tmp10 = mul nsw i32 %tmp, %tmp9
57  %tmp11 = trunc i64 %indvars.iv23 to i32
58  %tmp12 = srem i32 %tmp10, %tmp11
59  %tmp13 = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv23
60  store i32 %tmp12, i32* %tmp13, align 4
61  br label %bb14
62
63bb14:                                             ; preds = %bb7
64  %indvars.iv.next3 = add nuw nsw i64 %indvars.iv23, 1
65  %tmp15 = add nuw nsw i32 %.014, 1
66  %exitcond4 = icmp ne i64 %indvars.iv.next3, 100
67  br i1 %exitcond4, label %bb7, label %bb17.preheader
68
69bb17.preheader:                                   ; preds = %bb14
70  br label %bb19
71
72bb19:                                             ; preds = %bb17.preheader, %bb27
73  %.02 = phi i32 [ 0, %bb17.preheader ], [ %tmp28, %bb27 ]
74  %indvars.iv1 = phi i64 [ 0, %bb17.preheader ], [ %indvars.iv.next, %bb27 ]
75  %tmp20 = add nsw i32 %.02, -3
76  %tmp21 = add nuw nsw i64 %indvars.iv1, 3
77  %tmp22 = trunc i64 %tmp21 to i32
78  %tmp23 = mul nsw i32 %tmp20, %tmp22
79  %tmp24 = trunc i64 %indvars.iv1 to i32
80  %tmp25 = srem i32 %tmp23, %tmp24
81  %tmp26 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvars.iv1
82  store i32 %tmp25, i32* %tmp26, align 4
83  br label %bb27
84
85bb27:                                             ; preds = %bb19
86  %indvars.iv.next = add nuw nsw i64 %indvars.iv1, 1
87  %tmp28 = add nuw nsw i32 %.02, 1
88  %exitcond = icmp ne i64 %indvars.iv.next, 100
89  br i1 %exitcond, label %bb19, label %bb18
90
91bb18:                                             ; preds = %bb27
92  br label %bb29
93
94bb29:                                             ; preds = %bb18
95  ret void
96}
97
98define void @dep_free_parametric(i32* noalias %arg, i64 %arg2) {
99; CHECK-LABEL: @dep_free_parametric(
100; CHECK-NEXT:  bb:
101; CHECK-NEXT:    [[TMP3:%.*]] = icmp slt i64 0, [[ARG2:%.*]]
102; CHECK-NEXT:    [[TMP161:%.*]] = icmp slt i64 0, [[ARG2]]
103; CHECK-NEXT:    br i1 [[TMP3]], label [[BB5_PREHEADER:%.*]], label [[BB27:%.*]]
104; CHECK:       bb5.preheader:
105; CHECK-NEXT:    br label [[BB5:%.*]]
106; CHECK:       bb5:
107; CHECK-NEXT:    [[DOT014:%.*]] = phi i64 [ [[TMP13:%.*]], [[BB25:%.*]] ], [ 0, [[BB5_PREHEADER]] ]
108; CHECK-NEXT:    [[DOT02:%.*]] = phi i64 [ [[TMP26:%.*]], [[BB25]] ], [ 0, [[BB5_PREHEADER]] ]
109; CHECK-NEXT:    [[TMP6:%.*]] = add nsw i64 [[DOT014]], -3
110; CHECK-NEXT:    [[TMP7:%.*]] = add nuw nsw i64 [[DOT014]], 3
111; CHECK-NEXT:    [[TMP8:%.*]] = mul nsw i64 [[TMP6]], [[TMP7]]
112; CHECK-NEXT:    [[TMP9:%.*]] = srem i64 [[TMP8]], [[DOT014]]
113; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP9]] to i32
114; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[DOT014]]
115; CHECK-NEXT:    store i32 [[TMP10]], i32* [[TMP11]], align 4
116; CHECK-NEXT:    br label [[BB12:%.*]]
117; CHECK:       bb12:
118; CHECK-NEXT:    [[TMP19:%.*]] = add nsw i64 [[DOT02]], -3
119; CHECK-NEXT:    [[TMP20:%.*]] = add nuw nsw i64 [[DOT02]], 3
120; CHECK-NEXT:    [[TMP21:%.*]] = mul nsw i64 [[TMP19]], [[TMP20]]
121; CHECK-NEXT:    [[TMP22:%.*]] = srem i64 [[TMP21]], [[DOT02]]
122; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP22]] to i32
123; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[DOT02]]
124; CHECK-NEXT:    store i32 [[TMP23]], i32* [[TMP24]], align 4
125; CHECK-NEXT:    br label [[BB25]]
126; CHECK:       bb25:
127; CHECK-NEXT:    [[TMP13]] = add nuw nsw i64 [[DOT014]], 1
128; CHECK-NEXT:    [[TMP:%.*]] = icmp slt i64 [[TMP13]], [[ARG2]]
129; CHECK-NEXT:    [[TMP26]] = add nuw nsw i64 [[DOT02]], 1
130; CHECK-NEXT:    [[TMP16:%.*]] = icmp slt i64 [[TMP26]], [[ARG2]]
131; CHECK-NEXT:    br i1 [[TMP16]], label [[BB5]], label [[BB27_LOOPEXIT:%.*]]
132; CHECK:       bb27.loopexit:
133; CHECK-NEXT:    br label [[BB27]]
134; CHECK:       bb27:
135; CHECK-NEXT:    ret void
136;
137bb:
138  %tmp3 = icmp slt i64 0, %arg2
139  br i1 %tmp3, label %bb5, label %bb15.preheader
140
141bb5:                                              ; preds = %bb5, %bb12
142  %.014 = phi i64 [ 0, %bb ], [ %tmp13, %bb12 ]
143  %tmp6 = add nsw i64 %.014, -3
144  %tmp7 = add nuw nsw i64 %.014, 3
145  %tmp8 = mul nsw i64 %tmp6, %tmp7
146  %tmp9 = srem i64 %tmp8, %.014
147  %tmp10 = trunc i64 %tmp9 to i32
148  %tmp11 = getelementptr inbounds i32, i32* %arg, i64 %.014
149  store i32 %tmp10, i32* %tmp11, align 4
150  br label %bb12
151
152bb12:                                             ; preds = %bb5
153  %tmp13 = add nuw nsw i64 %.014, 1
154  %tmp = icmp slt i64 %tmp13, %arg2
155  br i1 %tmp, label %bb5, label %bb15.preheader
156
157bb15.preheader:                                   ; preds = %bb12, %bb
158  %tmp161 = icmp slt i64 0, %arg2
159  br i1 %tmp161, label %bb18, label %bb27
160
161bb18:                                             ; preds = %bb15.preheader, %bb25
162  %.02 = phi i64 [ 0, %bb15.preheader ], [ %tmp26, %bb25 ]
163  %tmp19 = add nsw i64 %.02, -3
164  %tmp20 = add nuw nsw i64 %.02, 3
165  %tmp21 = mul nsw i64 %tmp19, %tmp20
166  %tmp22 = srem i64 %tmp21, %.02
167  %tmp23 = trunc i64 %tmp22 to i32
168  %tmp24 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %.02
169  store i32 %tmp23, i32* %tmp24, align 4
170  br label %bb25
171
172bb25:                                             ; preds = %bb18
173  %tmp26 = add nuw nsw i64 %.02, 1
174  %tmp16 = icmp slt i64 %tmp26, %arg2
175  br i1 %tmp16, label %bb18, label %bb27
176
177bb27:                                             ; preds = %bb17
178  ret void
179}
180
181define void @raw_only(i32* noalias %arg) {
182; CHECK-LABEL: @raw_only(
183; CHECK-NEXT:  bb:
184; CHECK-NEXT:    br label [[BB7:%.*]]
185; CHECK:       bb7:
186; CHECK-NEXT:    [[INDVARS_IV22:%.*]] = phi i64 [ 0, [[BB:%.*]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[BB18:%.*]] ]
187; CHECK-NEXT:    [[INDVARS_IV1:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT:%.*]], [[BB18]] ]
188; CHECK-NEXT:    [[TMP:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV22]]
189; CHECK-NEXT:    [[TMP8:%.*]] = trunc i64 [[INDVARS_IV22]] to i32
190; CHECK-NEXT:    store i32 [[TMP8]], i32* [[TMP]], align 4
191; CHECK-NEXT:    br label [[BB9:%.*]]
192; CHECK:       bb9:
193; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[INDVARS_IV1]]
194; CHECK-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
195; CHECK-NEXT:    [[TMP16:%.*]] = shl nsw i32 [[TMP15]], 1
196; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[INDVARS_IV1]]
197; CHECK-NEXT:    store i32 [[TMP16]], i32* [[TMP17]], align 4
198; CHECK-NEXT:    br label [[BB18]]
199; CHECK:       bb18:
200; CHECK-NEXT:    [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV22]], 1
201; CHECK-NEXT:    [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
202; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
203; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
204; CHECK-NEXT:    br i1 [[EXITCOND]], label [[BB7]], label [[BB19:%.*]]
205; CHECK:       bb19:
206; CHECK-NEXT:    ret void
207;
208bb:
209  br label %bb7
210
211bb11.preheader:                                   ; preds = %bb9
212  br label %bb13
213
214bb7:                                              ; preds = %bb, %bb9
215  %indvars.iv22 = phi i64 [ 0, %bb ], [ %indvars.iv.next3, %bb9 ]
216  %tmp = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv22
217  %tmp8 = trunc i64 %indvars.iv22 to i32
218  store i32 %tmp8, i32* %tmp, align 4
219  br label %bb9
220
221bb9:                                              ; preds = %bb7
222  %indvars.iv.next3 = add nuw nsw i64 %indvars.iv22, 1
223  %exitcond4 = icmp ne i64 %indvars.iv.next3, 100
224  br i1 %exitcond4, label %bb7, label %bb11.preheader
225
226bb13:                                             ; preds = %bb11.preheader, %bb18
227  %indvars.iv1 = phi i64 [ 0, %bb11.preheader ], [ %indvars.iv.next, %bb18 ]
228  %tmp14 = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv1
229  %tmp15 = load i32, i32* %tmp14, align 4
230  %tmp16 = shl nsw i32 %tmp15, 1
231  %tmp17 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvars.iv1
232  store i32 %tmp16, i32* %tmp17, align 4
233  br label %bb18
234
235bb18:                                             ; preds = %bb13
236  %indvars.iv.next = add nuw nsw i64 %indvars.iv1, 1
237  %exitcond = icmp ne i64 %indvars.iv.next, 100 br i1 %exitcond, label %bb13, label %bb19
238
239bb19:                                             ; preds = %bb18
240  ret void
241}
242
243define void @raw_only_parametric(i32* noalias %arg, i32 %arg4) {
244; CHECK-LABEL: @raw_only_parametric(
245; CHECK-NEXT:  bb:
246; CHECK-NEXT:    [[TMP:%.*]] = sext i32 [[ARG4:%.*]] to i64
247; CHECK-NEXT:    [[TMP64:%.*]] = icmp sgt i32 [[ARG4]], 0
248; CHECK-NEXT:    br i1 [[TMP64]], label [[BB8_PREHEADER:%.*]], label [[BB23:%.*]]
249; CHECK:       bb8.preheader:
250; CHECK-NEXT:    br label [[BB8:%.*]]
251; CHECK:       bb8:
252; CHECK-NEXT:    [[INDVARS_IV25:%.*]] = phi i64 [ [[INDVARS_IV_NEXT3:%.*]], [[BB8]] ], [ 0, [[BB8_PREHEADER]] ]
253; CHECK-NEXT:    [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BB8]] ], [ 0, [[BB8_PREHEADER]] ]
254; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV25]]
255; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[INDVARS_IV25]] to i32
256; CHECK-NEXT:    store i32 [[TMP10]], i32* [[TMP9]], align 4
257; CHECK-NEXT:    [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV25]], 1
258; CHECK-NEXT:    [[TMP6:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT3]], [[TMP]]
259; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[INDVARS_IV3]]
260; CHECK-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
261; CHECK-NEXT:    [[TMP20:%.*]] = shl nsw i32 [[TMP19]], 1
262; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[INDVARS_IV3]]
263; CHECK-NEXT:    store i32 [[TMP20]], i32* [[TMP21]], align 4
264; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV3]], 1
265; CHECK-NEXT:    [[TMP15:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], [[TMP]]
266; CHECK-NEXT:    br i1 [[TMP15]], label [[BB8]], label [[BB23_LOOPEXIT:%.*]]
267; CHECK:       bb23.loopexit:
268; CHECK-NEXT:    br label [[BB23]]
269; CHECK:       bb23:
270; CHECK-NEXT:    ret void
271;
272bb:
273  %tmp = sext i32 %arg4 to i64
274  %tmp64 = icmp sgt i32 %arg4, 0
275  br i1 %tmp64, label %bb8, label %bb23
276
277bb8:                                              ; preds = %bb, %bb8
278  %indvars.iv25 = phi i64 [ %indvars.iv.next3, %bb8 ], [ 0, %bb ]
279  %tmp9 = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv25
280  %tmp10 = trunc i64 %indvars.iv25 to i32
281  store i32 %tmp10, i32* %tmp9, align 4
282  %indvars.iv.next3 = add nuw nsw i64 %indvars.iv25, 1
283  %tmp6 = icmp slt i64 %indvars.iv.next3, %tmp
284  br i1 %tmp6, label %bb8, label %bb17
285
286bb17:                                             ; preds = %bb8, %bb17
287  %indvars.iv3 = phi i64 [ %indvars.iv.next, %bb17 ], [ 0, %bb8 ]
288  %tmp18 = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv3
289  %tmp19 = load i32, i32* %tmp18, align 4
290  %tmp20 = shl nsw i32 %tmp19, 1
291  %tmp21 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvars.iv3
292  store i32 %tmp20, i32* %tmp21, align 4
293  %indvars.iv.next = add nuw nsw i64 %indvars.iv3, 1
294  %tmp15 = icmp slt i64 %indvars.iv.next, %tmp
295  br i1 %tmp15, label %bb17, label %bb23
296
297bb23:                                             ; preds = %bb17, %bb
298  ret void
299}
300
301define void @forward_dep(i32* noalias %arg) {
302; CHECK-LABEL: @forward_dep(
303; CHECK-NEXT:  bb:
304; CHECK-NEXT:    br label [[BB7:%.*]]
305; CHECK:       bb7:
306; CHECK-NEXT:    [[DOT013:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[TMP15:%.*]], [[BB14:%.*]] ]
307; CHECK-NEXT:    [[INDVARS_IV22:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[BB14]] ]
308; CHECK-NEXT:    [[TMP:%.*]] = add nsw i32 [[DOT013]], -3
309; CHECK-NEXT:    [[TMP8:%.*]] = add nuw nsw i64 [[INDVARS_IV22]], 3
310; CHECK-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32
311; CHECK-NEXT:    [[TMP10:%.*]] = mul nsw i32 [[TMP]], [[TMP9]]
312; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[INDVARS_IV22]] to i32
313; CHECK-NEXT:    [[TMP12:%.*]] = srem i32 [[TMP10]], [[TMP11]]
314; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV22]]
315; CHECK-NEXT:    store i32 [[TMP12]], i32* [[TMP13]], align 4
316; CHECK-NEXT:    br label [[BB14]]
317; CHECK:       bb14:
318; CHECK-NEXT:    [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV22]], 1
319; CHECK-NEXT:    [[TMP15]] = add nuw nsw i32 [[DOT013]], 1
320; CHECK-NEXT:    [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
321; CHECK-NEXT:    br i1 [[EXITCOND4]], label [[BB7]], label [[BB19_PREHEADER:%.*]]
322; CHECK:       bb19.preheader:
323; CHECK-NEXT:    br label [[BB19:%.*]]
324; CHECK:       bb19:
325; CHECK-NEXT:    [[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BB25:%.*]] ], [ 0, [[BB19_PREHEADER]] ]
326; CHECK-NEXT:    [[TMP20:%.*]] = add nsw i64 [[INDVARS_IV1]], -3
327; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[TMP20]]
328; CHECK-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
329; CHECK-NEXT:    [[TMP23:%.*]] = mul nsw i32 [[TMP22]], 3
330; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[INDVARS_IV1]]
331; CHECK-NEXT:    store i32 [[TMP23]], i32* [[TMP24]], align 4
332; CHECK-NEXT:    br label [[BB25]]
333; CHECK:       bb25:
334; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
335; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
336; CHECK-NEXT:    br i1 [[EXITCOND]], label [[BB19]], label [[BB26:%.*]]
337; CHECK:       bb26:
338; CHECK-NEXT:    ret void
339;
340bb:
341  br label %bb7
342
343bb7:                                              ; preds = %bb, %bb14
344  %.013 = phi i32 [ 0, %bb ], [ %tmp15, %bb14 ]
345  %indvars.iv22 = phi i64 [ 0, %bb ], [ %indvars.iv.next3, %bb14 ]
346  %tmp = add nsw i32 %.013, -3
347  %tmp8 = add nuw nsw i64 %indvars.iv22, 3
348  %tmp9 = trunc i64 %tmp8 to i32
349  %tmp10 = mul nsw i32 %tmp, %tmp9
350  %tmp11 = trunc i64 %indvars.iv22 to i32
351  %tmp12 = srem i32 %tmp10, %tmp11
352  %tmp13 = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv22
353  store i32 %tmp12, i32* %tmp13, align 4
354  br label %bb14
355
356bb14:                                             ; preds = %bb7
357  %indvars.iv.next3 = add nuw nsw i64 %indvars.iv22, 1
358  %tmp15 = add nuw nsw i32 %.013, 1
359  %exitcond4 = icmp ne i64 %indvars.iv.next3, 100
360  br i1 %exitcond4, label %bb7, label %bb19
361
362bb19:                                             ; preds = %bb14, %bb25
363  %indvars.iv1 = phi i64 [ 0, %bb14 ], [ %indvars.iv.next, %bb25 ]
364  %tmp20 = add nsw i64 %indvars.iv1, -3
365  %tmp21 = getelementptr inbounds i32, i32* %arg, i64 %tmp20
366  %tmp22 = load i32, i32* %tmp21, align 4
367  %tmp23 = mul nsw i32 %tmp22, 3
368  %tmp24 = getelementptr inbounds i32, i32* %arg, i64 %indvars.iv1
369  store i32 %tmp23, i32* %tmp24, align 4
370  br label %bb25
371
372bb25:                                             ; preds = %bb19
373  %indvars.iv.next = add nuw nsw i64 %indvars.iv1, 1
374  %exitcond = icmp ne i64 %indvars.iv.next, 100
375  br i1 %exitcond, label %bb19, label %bb26
376
377bb26:                                             ; preds = %bb25
378  ret void
379}
380
381; Test that instructions in loop 1 latch are moved to the beginning of loop 2
382; latch iff it is proven safe. %inc.first and %cmp.first are moved, but
383; `store i32 0, i32* %Ai.first` is not.
384
385define void @flow_dep(i32* noalias %A, i32* noalias %B) {
386; CHECK-LABEL: @flow_dep(
387; CHECK-NEXT:  entry:
388; CHECK-NEXT:    br label [[FOR_FIRST:%.*]]
389; CHECK:       for.first:
390; CHECK-NEXT:    [[I_FIRST:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC_FIRST:%.*]], [[FOR_SECOND_LATCH:%.*]] ]
391; CHECK-NEXT:    [[I_SECOND:%.*]] = phi i64 [ [[INC_SECOND:%.*]], [[FOR_SECOND_LATCH]] ], [ 0, [[ENTRY]] ]
392; CHECK-NEXT:    [[AI_FIRST:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[I_FIRST]]
393; CHECK-NEXT:    store i32 0, i32* [[AI_FIRST]], align 4
394; CHECK-NEXT:    [[AI_SECOND:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I_SECOND]]
395; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* [[AI_SECOND]], align 4
396; CHECK-NEXT:    [[BI:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[I_SECOND]]
397; CHECK-NEXT:    store i32 [[TMP0]], i32* [[BI]], align 4
398; CHECK-NEXT:    br label [[FOR_SECOND_LATCH]]
399; CHECK:       for.second.latch:
400; CHECK-NEXT:    [[INC_FIRST]] = add nsw i64 [[I_FIRST]], 1
401; CHECK-NEXT:    [[CMP_FIRST:%.*]] = icmp slt i64 [[INC_FIRST]], 100
402; CHECK-NEXT:    [[INC_SECOND]] = add nsw i64 [[I_SECOND]], 1
403; CHECK-NEXT:    [[CMP_SECOND:%.*]] = icmp slt i64 [[INC_SECOND]], 100
404; CHECK-NEXT:    br i1 [[CMP_SECOND]], label [[FOR_FIRST]], label [[FOR_END:%.*]]
405; CHECK:       for.end:
406; CHECK-NEXT:    ret void
407;
408entry:
409  br label %for.first
410
411for.first:
412  %i.first = phi i64 [ 0, %entry ], [ %inc.first, %for.first ]
413  %Ai.first = getelementptr inbounds i32, i32* %A, i64 %i.first
414  store i32 0, i32* %Ai.first, align 4
415  %inc.first = add nsw i64 %i.first, 1
416  %cmp.first = icmp slt i64 %inc.first, 100
417  br i1 %cmp.first, label %for.first, label %for.second.preheader
418
419for.second.preheader:
420  br label %for.second
421
422for.second:
423  %i.second = phi i64 [ %inc.second, %for.second.latch ], [ 0, %for.second.preheader ]
424  %Ai.second = getelementptr inbounds i32, i32* %A, i64 %i.second
425  %0 = load i32, i32* %Ai.second, align 4
426  %Bi = getelementptr inbounds i32, i32* %B, i64 %i.second
427  store i32 %0, i32* %Bi, align 4
428  br label %for.second.latch
429
430for.second.latch:
431  %inc.second = add nsw i64 %i.second, 1
432  %cmp.second = icmp slt i64 %inc.second, 100
433  br i1 %cmp.second, label %for.second, label %for.end
434
435for.end:
436  ret void
437}
438
439; Test that `%add` is moved in basic block entry, and the two loops for.first
440; and for.second are fused.
441
442define i32 @moveinsts_preheader(i32* %A, i32 %x) {
443; CHECK-LABEL: @moveinsts_preheader(
444; CHECK-NEXT:  entry:
445; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[X:%.*]], 1
446; CHECK-NEXT:    br label [[FOR_FIRST:%.*]]
447; CHECK:       for.first:
448; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC_I:%.*]], [[FOR_FIRST]] ]
449; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INC_J:%.*]], [[FOR_FIRST]] ]
450; CHECK-NEXT:    [[AI:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[I]]
451; CHECK-NEXT:    store i32 0, i32* [[AI]], align 4
452; CHECK-NEXT:    [[INC_I]] = add nsw i64 [[I]], 1
453; CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt i64 [[INC_I]], 100
454; CHECK-NEXT:    [[AJ:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[J]]
455; CHECK-NEXT:    store i32 2, i32* [[AJ]], align 4
456; CHECK-NEXT:    [[INC_J]] = add nsw i64 [[J]], 1
457; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i64 [[INC_J]], 100
458; CHECK-NEXT:    br i1 [[CMP_J]], label [[FOR_FIRST]], label [[FOR_SECOND_EXIT:%.*]]
459; CHECK:       for.second.exit:
460; CHECK-NEXT:    ret i32 [[ADD]]
461;
462entry:
463  br label %for.first
464
465for.first:
466  %i = phi i64 [ 0, %entry ], [ %inc.i, %for.first ]
467  %Ai = getelementptr inbounds i32, i32* %A, i64 %i
468  store i32 0, i32* %Ai, align 4
469  %inc.i = add nsw i64 %i, 1
470  %cmp.i = icmp slt i64 %inc.i, 100
471  br i1 %cmp.i, label %for.first, label %for.first.exit
472
473for.first.exit:
474  %add = add nsw i32 %x, 1
475  br label %for.second
476
477for.second:
478  %j = phi i64 [ 0, %for.first.exit ], [ %inc.j, %for.second ]
479  %Aj = getelementptr inbounds i32, i32* %A, i64 %j
480  store i32 2, i32* %Aj, align 4
481  %inc.j = add nsw i64 %j, 1
482  %cmp.j = icmp slt i64 %inc.j, 100
483  br i1 %cmp.j, label %for.second, label %for.second.exit
484
485for.second.exit:
486  ret i32 %add
487}
488
489; Test that `%add` cannot be moved to basic block entry, as it uses %i, which
490; defined after basic block entry. And the two loops for.first and for.second
491; are not fused.
492
493define i64 @unsafe_preheader(i32* %A, i64 %x) {
494; CHECK-LABEL: @unsafe_preheader(
495; CHECK-NEXT:  entry:
496; CHECK-NEXT:    br label [[FOR_FIRST:%.*]]
497; CHECK:       for.first:
498; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC_I:%.*]], [[FOR_FIRST]] ]
499; CHECK-NEXT:    [[AI:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[I]]
500; CHECK-NEXT:    store i32 0, i32* [[AI]], align 4
501; CHECK-NEXT:    [[INC_I]] = add nsw i64 [[I]], 1
502; CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt i64 [[INC_I]], 100
503; CHECK-NEXT:    br i1 [[CMP_I]], label [[FOR_FIRST]], label [[FOR_FIRST_EXIT:%.*]]
504; CHECK:       for.first.exit:
505; CHECK-NEXT:    [[ADD:%.*]] = add nsw i64 [[X:%.*]], [[I]]
506; CHECK-NEXT:    br label [[FOR_SECOND:%.*]]
507; CHECK:       for.second:
508; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 0, [[FOR_FIRST_EXIT]] ], [ [[INC_J:%.*]], [[FOR_SECOND]] ]
509; CHECK-NEXT:    [[AJ:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[J]]
510; CHECK-NEXT:    store i32 2, i32* [[AJ]], align 4
511; CHECK-NEXT:    [[INC_J]] = add nsw i64 [[J]], 1
512; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i64 [[INC_J]], 100
513; CHECK-NEXT:    br i1 [[CMP_J]], label [[FOR_SECOND]], label [[FOR_SECOND_EXIT:%.*]]
514; CHECK:       for.second.exit:
515; CHECK-NEXT:    ret i64 [[ADD]]
516;
517entry:
518  br label %for.first
519
520for.first:
521  %i = phi i64 [ 0, %entry ], [ %inc.i, %for.first ]
522  %Ai = getelementptr inbounds i32, i32* %A, i64 %i
523  store i32 0, i32* %Ai, align 4
524  %inc.i = add nsw i64 %i, 1
525  %cmp.i = icmp slt i64 %inc.i, 100
526  br i1 %cmp.i, label %for.first, label %for.first.exit
527
528for.first.exit:
529  %add = add nsw i64 %x, %i
530  br label %for.second
531
532for.second:
533  %j = phi i64 [ 0, %for.first.exit ], [ %inc.j, %for.second ]
534  %Aj = getelementptr inbounds i32, i32* %A, i64 %j
535  store i32 2, i32* %Aj, align 4
536  %inc.j = add nsw i64 %j, 1
537  %cmp.j = icmp slt i64 %inc.j, 100
538  br i1 %cmp.j, label %for.second, label %for.second.exit
539
540for.second.exit:
541  ret i64 %add
542}
543