1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -basic-aa -loop-interchange -pass-remarks-missed='loop-interchange' -verify-loop-lcssa -S | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 5 6; void foo(int n, int m) { 7; int temp[16][16]; 8; int res[16][16]; 9; for(int i = 0; i < n; i++) { 10; for(int j = 0; j < m; j++) 11; res[j][i] = temp[j][i]; 12; } 13; } 14 15define void @lcssa_08(i32 %n, i32 %m) { 16; CHECK-LABEL: @lcssa_08( 17; CHECK-NEXT: entry: 18; CHECK-NEXT: [[TEMP:%.*]] = alloca [16 x [16 x i32]], align 4 19; CHECK-NEXT: [[RES:%.*]] = alloca [16 x [16 x i32]], align 4 20; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[N:%.*]], 0 21; CHECK-NEXT: br i1 [[CMP24]], label [[INNER_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 22; CHECK: outer.preheader: 23; CHECK-NEXT: br label [[OUTER_HEADER:%.*]] 24; CHECK: outer.header: 25; CHECK-NEXT: [[INDVARS_IV27:%.*]] = phi i64 [ 0, [[OUTER_PREHEADER:%.*]] ], [ [[INDVARS_IV_NEXT28:%.*]], [[OUTER_LATCH:%.*]] ] 26; CHECK-NEXT: [[CMP222:%.*]] = icmp sgt i32 [[M:%.*]], 0 27; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i64 28; CHECK-NEXT: br i1 [[CMP222]], label [[INNER_FOR_BODY_SPLIT1:%.*]], label [[OUTER_CRIT_EDGE:%.*]] 29; CHECK: inner.preheader: 30; CHECK-NEXT: [[WIDE_TRIP_COUNT29:%.*]] = zext i32 [[N]] to i64 31; CHECK-NEXT: br label [[INNER_FOR_BODY:%.*]] 32; CHECK: inner.for.body: 33; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[INNER_PREHEADER]] ], [ [[TMP1:%.*]], [[INNER_FOR_BODY_SPLIT:%.*]] ] 34; CHECK-NEXT: br label [[OUTER_PREHEADER]] 35; CHECK: inner.for.body.split1: 36; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [16 x [16 x i32]], [16 x [16 x i32]]* [[TEMP]], i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV27]] 37; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 38; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [16 x [16 x i32]], [16 x [16 x i32]]* [[RES]], i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV27]] 39; CHECK-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX8]], align 4 40; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1 41; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 42; CHECK-NEXT: br label [[INNER_CRIT_EDGE:%.*]] 43; CHECK: inner.for.body.split: 44; CHECK-NEXT: [[WIDE_TRIP_COUNT_LCSSA2:%.*]] = phi i64 [ [[WIDE_TRIP_COUNT]], [[OUTER_LATCH]] ] 45; CHECK-NEXT: [[TMP1]] = add nuw nsw i64 [[INDVARS_IV]], 1 46; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], [[WIDE_TRIP_COUNT_LCSSA2]] 47; CHECK-NEXT: br i1 [[TMP2]], label [[INNER_FOR_BODY]], label [[OUTER_CRIT_EDGE]] 48; CHECK: inner.crit_edge: 49; CHECK-NEXT: br label [[OUTER_LATCH]] 50; CHECK: outer.latch: 51; CHECK-NEXT: [[INDVARS_IV_NEXT28]] = add nuw nsw i64 [[INDVARS_IV27]], 1 52; CHECK-NEXT: [[EXITCOND30:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT28]], [[WIDE_TRIP_COUNT29]] 53; CHECK-NEXT: br i1 [[EXITCOND30]], label [[OUTER_HEADER]], label [[INNER_FOR_BODY_SPLIT]] 54; CHECK: outer.crit_edge: 55; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] 56; CHECK: for.cond.cleanup: 57; CHECK-NEXT: ret void 58; 59entry: 60 %temp = alloca [16 x [16 x i32]], align 4 61 %res = alloca [16 x [16 x i32]], align 4 62 %cmp24 = icmp sgt i32 %n, 0 63 br i1 %cmp24, label %outer.preheader, label %for.cond.cleanup 64 65outer.preheader: ; preds = %entry 66 %wide.trip.count29 = zext i32 %n to i64 67 br label %outer.header 68 69outer.header: ; preds = %outer.preheader, %outer.latch 70 %indvars.iv27 = phi i64 [ 0, %outer.preheader ], [ %indvars.iv.next28, %outer.latch ] 71 %cmp222 = icmp sgt i32 %m, 0 72 br i1 %cmp222, label %inner.preheader, label %outer.latch 73 74inner.preheader: ; preds = %outer.header 75 ; When inner.preheader becomes the outer preheader, do not move 76 ; %wide.trip.count into the inner loop header lest LCSSA break 77 ; (if %wide.trip.count gets moved, its use is now outside the inner loop). 78 %wide.trip.count = zext i32 %m to i64 79 br label %inner.for.body 80 81inner.for.body: ; preds = %inner.preheader, %inner.for.body 82 %indvars.iv = phi i64 [ 0, %inner.preheader ], [ %indvars.iv.next, %inner.for.body ] 83 %arrayidx6 = getelementptr inbounds [16 x [16 x i32]], [16 x [16 x i32]]* %temp, i64 0, i64 %indvars.iv, i64 %indvars.iv27 84 %0 = load i32, i32* %arrayidx6, align 4 85 %arrayidx8 = getelementptr inbounds [16 x [16 x i32]], [16 x [16 x i32]]* %res, i64 0, i64 %indvars.iv, i64 %indvars.iv27 86 store i32 %0, i32* %arrayidx8, align 4 87 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 88 %exitcond = icmp ne i64 %indvars.iv.next, %wide.trip.count 89 br i1 %exitcond, label %inner.for.body, label %inner.crit_edge 90 91inner.crit_edge: ; preds = %inner.for.body 92 br label %outer.latch 93 94outer.latch: ; preds = %inner.crit_edge, %outer.header 95 %indvars.iv.next28 = add nuw nsw i64 %indvars.iv27, 1 96 %exitcond30 = icmp ne i64 %indvars.iv.next28, %wide.trip.count29 97 br i1 %exitcond30, label %outer.header, label %outer.crit_edge 98 99outer.crit_edge: ; preds = %outer.latch 100 br label %for.cond.cleanup 101 102for.cond.cleanup: ; preds = %outer.crit_edge, %entry 103 ret void 104} 105 106@global = external local_unnamed_addr global [4 x [4 x [2 x i16]]] align 16 107 108; %N.ext is defined in the outer loop header and used in the inner loop. After 109; interchanging, it will be defined in the new inner loop and used in the new; 110; outer latch, so we need to create a new LCSSA phi node for it. 111 112define void @test2(i32 %N) { 113; CHECK-LABEL: @test2( 114; CHECK-NEXT: bb: 115; CHECK-NEXT: br label [[INNER_PREHEADER:%.*]] 116; CHECK: outer.header.preheader: 117; CHECK-NEXT: br label [[OUTER_HEADER:%.*]] 118; CHECK: outer.header: 119; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ [[OUTER_IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ], [ 0, [[OUTER_HEADER_PREHEADER:%.*]] ] 120; CHECK-NEXT: [[N_EXT:%.*]] = sext i32 [[N:%.*]] to i64 121; CHECK-NEXT: br label [[INNER_SPLIT1:%.*]] 122; CHECK: inner.preheader: 123; CHECK-NEXT: br label [[INNER:%.*]] 124; CHECK: inner: 125; CHECK-NEXT: [[INNER_IV:%.*]] = phi i64 [ [[TMP0:%.*]], [[INNER_SPLIT:%.*]] ], [ 0, [[INNER_PREHEADER]] ] 126; CHECK-NEXT: br label [[OUTER_HEADER_PREHEADER]] 127; CHECK: inner.split1: 128; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x [4 x [2 x i16]]], [4 x [4 x [2 x i16]]]* @global, i64 0, i64 [[INNER_IV]], i64 [[OUTER_IV]], i64 0 129; CHECK-NEXT: [[INNER_IV_NEXT:%.*]] = add nsw i64 [[INNER_IV]], 1 130; CHECK-NEXT: [[C_1:%.*]] = icmp ne i64 [[INNER_IV_NEXT]], [[N_EXT]] 131; CHECK-NEXT: br label [[OUTER_LATCH]] 132; CHECK: inner.split: 133; CHECK-NEXT: [[N_EXT_LCSSA:%.*]] = phi i64 [ [[N_EXT]], [[OUTER_LATCH]] ] 134; CHECK-NEXT: [[TMP0]] = add nsw i64 [[INNER_IV]], 1 135; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[TMP0]], [[N_EXT_LCSSA]] 136; CHECK-NEXT: br i1 [[TMP1]], label [[INNER]], label [[EXIT:%.*]] 137; CHECK: outer.latch: 138; CHECK-NEXT: [[OUTER_IV_NEXT]] = add nsw i64 [[OUTER_IV]], 1 139; CHECK-NEXT: [[C_2:%.*]] = icmp ne i64 [[OUTER_IV]], [[N_EXT]] 140; CHECK-NEXT: br i1 [[C_2]], label [[OUTER_HEADER]], label [[INNER_SPLIT]] 141; CHECK: exit: 142; CHECK-NEXT: ret void 143; 144bb: 145 br label %outer.header 146 147outer.header: ; preds = %bb11, %bb2 148 %outer.iv = phi i64 [ 0, %bb ], [ %outer.iv.next, %outer.latch ] 149 %N.ext = sext i32 %N to i64 150 br label %inner 151 152inner: ; preds = %bb6, %bb4 153 %inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner ] 154 %tmp8 = getelementptr inbounds [4 x [4 x [2 x i16]]], [4 x [4 x [2 x i16]]]* @global, i64 0, i64 %inner.iv, i64 %outer.iv, i64 0 155 %inner.iv.next = add nsw i64 %inner.iv, 1 156 %c.1 = icmp ne i64 %inner.iv.next, %N.ext 157 br i1 %c.1, label %inner, label %outer.latch 158 159outer.latch: ; preds = %bb6 160 %outer.iv.next = add nsw i64 %outer.iv, 1 161 %c.2 = icmp ne i64 %outer.iv, %N.ext 162 br i1 %c.2 , label %outer.header, label %exit 163 164exit: ; preds = %bb11 165 ret void 166} 167