1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -loop-interchange -verify-loop-lcssa -verify-dom-info -S %s | FileCheck %s 3 4@b = external dso_local global [5 x i32], align 16 5 6define void @test1() { 7; CHECK-LABEL: @test1( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: br label [[FOR_BODY2_PREHEADER:%.*]] 10; CHECK: for.body.preheader: 11; CHECK-NEXT: br label [[FOR_BODY:%.*]] 12; CHECK: for.body: 13; CHECK-NEXT: [[INC41:%.*]] = phi i32 [ [[INC4:%.*]], [[FOR_INC3:%.*]] ], [ undef, [[FOR_BODY_PREHEADER:%.*]] ] 14; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[INC41]] to i64 15; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 [[IDXPROM]] 16; CHECK-NEXT: br label [[FOR_BODY2_SPLIT:%.*]] 17; CHECK: for.body2.preheader: 18; CHECK-NEXT: br label [[FOR_BODY2:%.*]] 19; CHECK: for.body2: 20; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_INC_SPLIT:%.*]] ], [ 1, [[FOR_BODY2_PREHEADER]] ] 21; CHECK-NEXT: br label [[FOR_BODY_PREHEADER]] 22; CHECK: for.body2.split: 23; CHECK-NEXT: br label [[FOR_INC:%.*]] 24; CHECK: for.inc: 25; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 26; CHECK-NEXT: store i32 undef, i32* [[ARRAYIDX]], align 4 27; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[LSR_IV]], 4 28; CHECK-NEXT: [[LSR_IV_NEXT:%.*]] = add nuw nsw i32 [[LSR_IV]], 1 29; CHECK-NEXT: br label [[FOR_COND1_FOR_END_CRIT_EDGE:%.*]] 30; CHECK: for.inc.split: 31; CHECK-NEXT: [[TMP1]] = add nuw nsw i32 [[LSR_IV]], 1 32; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[LSR_IV]], 4 33; CHECK-NEXT: br i1 [[TMP2]], label [[FOR_BODY2]], label [[FOR_COND_FOR_END5_CRIT_EDGE:%.*]] 34; CHECK: for.cond1.for.end_crit_edge: 35; CHECK-NEXT: br label [[FOR_INC3]] 36; CHECK: for.inc3: 37; CHECK-NEXT: [[INC4]] = add nsw i32 [[INC41]], 1 38; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[FOR_INC_SPLIT]] 39; CHECK: for.cond.for.end5_crit_edge: 40; CHECK-NEXT: ret void 41; 42entry: 43 br label %for.body 44 45for.body: ; preds = %for.inc3, %entry 46 %inc41 = phi i32 [ %inc4, %for.inc3 ], [ undef, %entry ] 47 br label %for.body2 48 49for.body2: ; preds = %for.inc, %for.body 50 %lsr.iv = phi i32 [ %lsr.iv.next, %for.inc ], [ 1, %for.body ] 51 br label %for.inc 52 53for.inc: ; preds = %for.body2 54 %idxprom = sext i32 %inc41 to i64 55 %arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 %idxprom 56 %0 = load i32, i32* %arrayidx, align 4 57 store i32 undef, i32* %arrayidx, align 4 58 %cmp = icmp slt i32 %lsr.iv, 4 59 %lsr.iv.next = add nuw nsw i32 %lsr.iv, 1 60 br i1 %cmp, label %for.body2, label %for.cond1.for.end_crit_edge 61 62for.cond1.for.end_crit_edge: ; preds = %for.inc 63 br label %for.inc3 64 65for.inc3: ; preds = %for.cond1.for.end_crit_edge 66 %inc4 = add nsw i32 %inc41, 1 67 br i1 undef, label %for.body, label %for.cond.for.end5_crit_edge 68 69for.cond.for.end5_crit_edge: ; preds = %for.inc3 70 ret void 71} 72 73define void @test2() { 74; CHECK-LABEL: @test2( 75; CHECK-NEXT: entry: 76; CHECK-NEXT: br label [[FOR_BODY2_PREHEADER:%.*]] 77; CHECK: for.body.preheader: 78; CHECK-NEXT: br label [[FOR_BODY:%.*]] 79; CHECK: for.body: 80; CHECK-NEXT: [[INC41:%.*]] = phi i32 [ [[INC4:%.*]], [[FOR_INC3:%.*]] ], [ undef, [[FOR_BODY_PREHEADER:%.*]] ] 81; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[INC41]] to i64 82; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 [[IDXPROM]] 83; CHECK-NEXT: br label [[FOR_BODY2_SPLIT:%.*]] 84; CHECK: for.body2.preheader: 85; CHECK-NEXT: br label [[FOR_BODY2:%.*]] 86; CHECK: for.body2: 87; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_INC_SPLIT:%.*]] ], [ 1, [[FOR_BODY2_PREHEADER]] ] 88; CHECK-NEXT: br label [[FOR_BODY_PREHEADER]] 89; CHECK: for.body2.split: 90; CHECK-NEXT: br label [[FOR_INC:%.*]] 91; CHECK: for.inc: 92; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 93; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[LSR_IV]], 4 94; CHECK-NEXT: [[CMP_ZEXT:%.*]] = zext i1 [[CMP]] to i32 95; CHECK-NEXT: store i32 [[CMP_ZEXT]], i32* [[ARRAYIDX]], align 4 96; CHECK-NEXT: [[LSR_IV_NEXT:%.*]] = add nuw nsw i32 [[LSR_IV]], 1 97; CHECK-NEXT: br label [[FOR_COND1_FOR_END_CRIT_EDGE:%.*]] 98; CHECK: for.inc.split: 99; CHECK-NEXT: [[TMP1]] = add nuw nsw i32 [[LSR_IV]], 1 100; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[LSR_IV]], 4 101; CHECK-NEXT: br i1 [[TMP2]], label [[FOR_BODY2]], label [[FOR_COND_FOR_END5_CRIT_EDGE:%.*]] 102; CHECK: for.cond1.for.end_crit_edge: 103; CHECK-NEXT: br label [[FOR_INC3]] 104; CHECK: for.inc3: 105; CHECK-NEXT: [[INC4]] = add nsw i32 [[INC41]], 1 106; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[FOR_INC_SPLIT]] 107; CHECK: for.cond.for.end5_crit_edge: 108; CHECK-NEXT: ret void 109; 110entry: 111 br label %for.body 112 113for.body: ; preds = %for.inc3, %entry 114 %inc41 = phi i32 [ %inc4, %for.inc3 ], [ undef, %entry ] 115 br label %for.body2 116 117for.body2: ; preds = %for.inc, %for.body 118 %lsr.iv = phi i32 [ %lsr.iv.next, %for.inc ], [ 1, %for.body ] 119 br label %for.inc 120 121for.inc: ; preds = %for.body2 122 %idxprom = sext i32 %inc41 to i64 123 %arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 %idxprom 124 %0 = load i32, i32* %arrayidx, align 4 125 %cmp = icmp slt i32 %lsr.iv, 4 126 %cmp.zext = zext i1 %cmp to i32 127 store i32 %cmp.zext, i32* %arrayidx, align 4 128 %lsr.iv.next = add nuw nsw i32 %lsr.iv, 1 129 br i1 %cmp, label %for.body2, label %for.cond1.for.end_crit_edge 130 131for.cond1.for.end_crit_edge: ; preds = %for.inc 132 br label %for.inc3 133 134for.inc3: ; preds = %for.cond1.for.end_crit_edge 135 %inc4 = add nsw i32 %inc41, 1 136 br i1 undef, label %for.body, label %for.cond.for.end5_crit_edge 137 138for.cond.for.end5_crit_edge: ; preds = %for.inc3 139 ret void 140} 141