1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5target triple = "x86_64-unknown-linux-gnu" 6 7; PR15794 8; incorrect addition of llvm.mem.parallel_loop_access metadata is undefined 9; behaviour. Vectorizer ignores the memory dependency checks and goes ahead and 10; vectorizes this loop with uniform stores which has an output dependency. 11 12; void foo(int *a, int *b, int k, int m) { 13; for (int i = 0; i < m; i++) { 14; for (int j = 0; j < m; j++) { 15; a[i] = a[i + j + k] + 1; <<< 16; } 17; b[i] = b[i] + 3; 18; } 19; } 20 21; Function Attrs: nounwind uwtable 22define void @foo(i32* nocapture %a, i32* nocapture %b, i32 %k, i32 %m) #0 { 23; CHECK-LABEL: @foo( 24; CHECK-NEXT: entry: 25; CHECK-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[M:%.*]], 0 26; CHECK-NEXT: br i1 [[CMP27]], label [[FOR_BODY3_LR_PH_US_PREHEADER:%.*]], label [[FOR_END15:%.*]] 27; CHECK: for.body3.lr.ph.us.preheader: 28; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[M]], -1 29; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 30; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 31; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[K:%.*]] to i64 32; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US:%.*]] 33; CHECK: for.end.us: 34; CHECK-NEXT: [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDVARS_IV33:%.*]] 35; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX9_US]], align 4, !llvm.mem.parallel_loop_access !0 36; CHECK-NEXT: [[ADD10_US:%.*]] = add nsw i32 [[TMP4]], 3 37; CHECK-NEXT: store i32 [[ADD10_US]], i32* [[ARRAYIDX9_US]], align 4, !llvm.mem.parallel_loop_access !0 38; CHECK-NEXT: [[INDVARS_IV_NEXT34:%.*]] = add i64 [[INDVARS_IV33]], 1 39; CHECK-NEXT: [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV_NEXT34]] to i32 40; CHECK-NEXT: [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[M]] 41; CHECK-NEXT: br i1 [[EXITCOND36]], label [[FOR_END15_LOOPEXIT:%.*]], label [[FOR_BODY3_LR_PH_US]], !llvm.loop !2 42; CHECK: for.body3.us: 43; CHECK-NEXT: [[INDVARS_IV29:%.*]] = phi i64 [ [[BC_RESUME_VAL:%.*]], [[SCALAR_PH:%.*]] ], [ [[INDVARS_IV_NEXT30:%.*]], [[FOR_BODY3_US:%.*]] ] 44; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV29]] to i32 45; CHECK-NEXT: [[ADD4_US:%.*]] = add i32 [[ADD_US:%.*]], [[TMP5]] 46; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[ADD4_US]] to i64 47; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IDXPROM_US]] 48; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_US]], align 4, !llvm.mem.parallel_loop_access !0 49; CHECK-NEXT: [[ADD5_US:%.*]] = add nsw i32 [[TMP6]], 1 50; CHECK-NEXT: store i32 [[ADD5_US]], i32* [[ARRAYIDX7_US:%.*]], align 4, !llvm.mem.parallel_loop_access !0 51; CHECK-NEXT: [[INDVARS_IV_NEXT30]] = add i64 [[INDVARS_IV29]], 1 52; CHECK-NEXT: [[LFTR_WIDEIV31:%.*]] = trunc i64 [[INDVARS_IV_NEXT30]] to i32 53; CHECK-NEXT: [[EXITCOND32:%.*]] = icmp eq i32 [[LFTR_WIDEIV31]], [[M]] 54; CHECK-NEXT: br i1 [[EXITCOND32]], label [[FOR_END_US:%.*]], label [[FOR_BODY3_US]], !llvm.loop !3 55; CHECK: for.body3.lr.ph.us: 56; CHECK-NEXT: [[INDVARS_IV33]] = phi i64 [ [[INDVARS_IV_NEXT34]], [[FOR_END_US]] ], [ 0, [[FOR_BODY3_LR_PH_US_PREHEADER]] ] 57; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP3]], [[INDVARS_IV33]] 58; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i32 59; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[INDVARS_IV33]] to i32 60; CHECK-NEXT: [[ADD_US]] = add i32 [[TMP9]], [[K]] 61; CHECK-NEXT: [[ARRAYIDX7_US]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV33]] 62; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4 63; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH]], label [[VECTOR_SCEVCHECK:%.*]] 64; CHECK: vector.scevcheck: 65; CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP0]]) 66; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL]], 0 67; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL]], 1 68; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP8]], [[MUL_RESULT]] 69; CHECK-NEXT: [[TMP11:%.*]] = sub i32 [[TMP8]], [[MUL_RESULT]] 70; CHECK-NEXT: [[TMP12:%.*]] = icmp sgt i32 [[TMP11]], [[TMP8]] 71; CHECK-NEXT: [[TMP13:%.*]] = icmp slt i32 [[TMP10]], [[TMP8]] 72; CHECK-NEXT: [[TMP14:%.*]] = select i1 false, i1 [[TMP12]], i1 [[TMP13]] 73; CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[MUL_OVERFLOW]] 74; CHECK-NEXT: [[TMP16:%.*]] = or i1 false, [[TMP15]] 75; CHECK-NEXT: br i1 [[TMP16]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 76; CHECK: vector.ph: 77; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 4 78; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] 79; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 80; CHECK: vector.body: 81; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 82; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[INDEX]] to i32 83; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], 0 84; CHECK-NEXT: [[TMP19:%.*]] = add i32 [[ADD_US]], [[TMP18]] 85; CHECK-NEXT: [[TMP20:%.*]] = sext i32 [[TMP19]] to i64 86; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP20]] 87; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i32 0 88; CHECK-NEXT: [[TMP23:%.*]] = bitcast i32* [[TMP22]] to <4 x i32>* 89; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP23]], align 4 90; CHECK-NEXT: [[TMP24:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1> 91; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP24]], i32 0 92; CHECK-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0 93; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP24]], i32 1 94; CHECK-NEXT: store i32 [[TMP26]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0 95; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP24]], i32 2 96; CHECK-NEXT: store i32 [[TMP27]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0 97; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP24]], i32 3 98; CHECK-NEXT: store i32 [[TMP28]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0 99; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 100; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 101; CHECK-NEXT: br i1 [[TMP29]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !5 102; CHECK: middle.block: 103; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] 104; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END_US]], label [[SCALAR_PH]] 105; CHECK: scalar.ph: 106; CHECK-NEXT: [[BC_RESUME_VAL]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY3_LR_PH_US]] ], [ 0, [[VECTOR_SCEVCHECK]] ] 107; CHECK-NEXT: br label [[FOR_BODY3_US]] 108; CHECK: for.end15.loopexit: 109; CHECK-NEXT: br label [[FOR_END15]] 110; CHECK: for.end15: 111; CHECK-NEXT: ret void 112; 113entry: 114 %cmp27 = icmp sgt i32 %m, 0 115 br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15 116 117for.end.us: ; preds = %for.body3.us 118 %arrayidx9.us = getelementptr inbounds i32, i32* %b, i64 %indvars.iv33 119 %0 = load i32, i32* %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3 120 %add10.us = add nsw i32 %0, 3 121 store i32 %add10.us, i32* %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3 122 %indvars.iv.next34 = add i64 %indvars.iv33, 1 123 %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32 124 %exitcond36 = icmp eq i32 %lftr.wideiv35, %m 125 br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop !5 126 127for.body3.us: ; preds = %for.body3.us, %for.body3.lr.ph.us 128 %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ] 129 %1 = trunc i64 %indvars.iv29 to i32 130 %add4.us = add i32 %add.us, %1 131 %idxprom.us = sext i32 %add4.us to i64 132 %arrayidx.us = getelementptr inbounds i32, i32* %a, i64 %idxprom.us 133 %2 = load i32, i32* %arrayidx.us, align 4, !llvm.mem.parallel_loop_access !3 134 %add5.us = add nsw i32 %2, 1 135 store i32 %add5.us, i32* %arrayidx7.us, align 4, !llvm.mem.parallel_loop_access !3 136 %indvars.iv.next30 = add i64 %indvars.iv29, 1 137 %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32 138 %exitcond32 = icmp eq i32 %lftr.wideiv31, %m 139 br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop !4 140 141for.body3.lr.ph.us: ; preds = %for.end.us, %entry 142 %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ] 143 %3 = trunc i64 %indvars.iv33 to i32 144 %add.us = add i32 %3, %k 145 %arrayidx7.us = getelementptr inbounds i32, i32* %a, i64 %indvars.iv33 146 br label %for.body3.us 147 148for.end15: ; preds = %for.end.us, %entry 149 ret void 150} 151 152; Same test as above, but without the invalid parallel_loop_access metadata. 153 154; Here we can see the vectorizer does the mem dep checks and decides it is 155; unsafe to vectorize. 156define void @no-par-mem-metadata(i32* nocapture %a, i32* nocapture %b, i32 %k, i32 %m) #0 { 157; CHECK-LABEL: @no-par-mem-metadata( 158; CHECK-NEXT: entry: 159; CHECK-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[M:%.*]], 0 160; CHECK-NEXT: br i1 [[CMP27]], label [[FOR_BODY3_LR_PH_US_PREHEADER:%.*]], label [[FOR_END15:%.*]] 161; CHECK: for.body3.lr.ph.us.preheader: 162; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US:%.*]] 163; CHECK: for.end.us: 164; CHECK-NEXT: [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDVARS_IV33:%.*]] 165; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX9_US]], align 4 166; CHECK-NEXT: [[ADD10_US:%.*]] = add nsw i32 [[TMP0]], 3 167; CHECK-NEXT: store i32 [[ADD10_US]], i32* [[ARRAYIDX9_US]], align 4 168; CHECK-NEXT: [[INDVARS_IV_NEXT34:%.*]] = add i64 [[INDVARS_IV33]], 1 169; CHECK-NEXT: [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV_NEXT34]] to i32 170; CHECK-NEXT: [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[M]] 171; CHECK-NEXT: br i1 [[EXITCOND36]], label [[FOR_END15_LOOPEXIT:%.*]], label [[FOR_BODY3_LR_PH_US]], !llvm.loop !2 172; CHECK: for.body3.us: 173; CHECK-NEXT: [[INDVARS_IV29:%.*]] = phi i64 [ 0, [[FOR_BODY3_LR_PH_US]] ], [ [[INDVARS_IV_NEXT30:%.*]], [[FOR_BODY3_US:%.*]] ] 174; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV29]] to i32 175; CHECK-NEXT: [[ADD4_US:%.*]] = add i32 [[ADD_US:%.*]], [[TMP1]] 176; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[ADD4_US]] to i64 177; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IDXPROM_US]] 178; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX_US]], align 4 179; CHECK-NEXT: [[ADD5_US:%.*]] = add nsw i32 [[TMP2]], 1 180; CHECK-NEXT: store i32 [[ADD5_US]], i32* [[ARRAYIDX7_US:%.*]], align 4 181; CHECK-NEXT: [[INDVARS_IV_NEXT30]] = add i64 [[INDVARS_IV29]], 1 182; CHECK-NEXT: [[LFTR_WIDEIV31:%.*]] = trunc i64 [[INDVARS_IV_NEXT30]] to i32 183; CHECK-NEXT: [[EXITCOND32:%.*]] = icmp eq i32 [[LFTR_WIDEIV31]], [[M]] 184; CHECK-NEXT: br i1 [[EXITCOND32]], label [[FOR_END_US:%.*]], label [[FOR_BODY3_US]], !llvm.loop !1 185; CHECK: for.body3.lr.ph.us: 186; CHECK-NEXT: [[INDVARS_IV33]] = phi i64 [ [[INDVARS_IV_NEXT34]], [[FOR_END_US]] ], [ 0, [[FOR_BODY3_LR_PH_US_PREHEADER]] ] 187; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVARS_IV33]] to i32 188; CHECK-NEXT: [[ADD_US]] = add i32 [[TMP3]], [[K:%.*]] 189; CHECK-NEXT: [[ARRAYIDX7_US]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV33]] 190; CHECK-NEXT: br label [[FOR_BODY3_US]] 191; CHECK: for.end15.loopexit: 192; CHECK-NEXT: br label [[FOR_END15]] 193; CHECK: for.end15: 194; CHECK-NEXT: ret void 195; 196entry: 197 %cmp27 = icmp sgt i32 %m, 0 198 br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15 199 200for.end.us: ; preds = %for.body3.us 201 %arrayidx9.us = getelementptr inbounds i32, i32* %b, i64 %indvars.iv33 202 %0 = load i32, i32* %arrayidx9.us, align 4 203 %add10.us = add nsw i32 %0, 3 204 store i32 %add10.us, i32* %arrayidx9.us, align 4 205 %indvars.iv.next34 = add i64 %indvars.iv33, 1 206 %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32 207 %exitcond36 = icmp eq i32 %lftr.wideiv35, %m 208 br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop !5 209 210for.body3.us: ; preds = %for.body3.us, %for.body3.lr.ph.us 211 %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ] 212 %1 = trunc i64 %indvars.iv29 to i32 213 %add4.us = add i32 %add.us, %1 214 %idxprom.us = sext i32 %add4.us to i64 215 %arrayidx.us = getelementptr inbounds i32, i32* %a, i64 %idxprom.us 216 %2 = load i32, i32* %arrayidx.us, align 4 217 %add5.us = add nsw i32 %2, 1 218 store i32 %add5.us, i32* %arrayidx7.us, align 4 219 %indvars.iv.next30 = add i64 %indvars.iv29, 1 220 %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32 221 %exitcond32 = icmp eq i32 %lftr.wideiv31, %m 222 br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop !4 223 224for.body3.lr.ph.us: ; preds = %for.end.us, %entry 225 %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ] 226 %3 = trunc i64 %indvars.iv33 to i32 227 %add.us = add i32 %3, %k 228 %arrayidx7.us = getelementptr inbounds i32, i32* %a, i64 %indvars.iv33 229 br label %for.body3.us 230 231for.end15: ; preds = %for.end.us, %entry 232 ret void 233} 234 235attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } 236 237!3 = !{!4, !5} 238!4 = !{!4} 239!5 = !{!5} 240 241