1; RUN: opt -S -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -verify-loop-info -simplifycfg < %s | FileCheck %s 2 3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 4 5; Test no-predication of instructions that are provably safe, e.g. dividing by 6; a non-zero constant. 7define void @test(i32* nocapture %asd, i32* nocapture %aud, 8 i32* nocapture %asr, i32* nocapture %aur, 9 i32* nocapture %asd0, i32* nocapture %aud0, 10 i32* nocapture %asr0, i32* nocapture %aur0 11) { 12entry: 13 br label %for.body 14 15for.cond.cleanup: ; preds = %if.end 16 ret void 17 18; CHECK-LABEL: test 19; CHECK: vector.body: 20; CHECK: %{{.*}} = sdiv <2 x i32> %{{.*}}, <i32 11, i32 11> 21; CHECK: %{{.*}} = udiv <2 x i32> %{{.*}}, <i32 13, i32 13> 22; CHECK: %{{.*}} = srem <2 x i32> %{{.*}}, <i32 17, i32 17> 23; CHECK: %{{.*}} = urem <2 x i32> %{{.*}}, <i32 19, i32 19> 24; CHECK-NOT: %{{.*}} = sdiv <2 x i32> %{{.*}}, <i32 0, i32 0> 25; CHECK-NOT: %{{.*}} = udiv <2 x i32> %{{.*}}, <i32 0, i32 0> 26; CHECK-NOT: %{{.*}} = srem <2 x i32> %{{.*}}, <i32 0, i32 0> 27; CHECK-NOT: %{{.*}} = urem <2 x i32> %{{.*}}, <i32 0, i32 0> 28 29for.body: ; preds = %if.end, %entry 30 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end ] 31 %isd = getelementptr inbounds i32, i32* %asd, i64 %indvars.iv 32 %iud = getelementptr inbounds i32, i32* %aud, i64 %indvars.iv 33 %isr = getelementptr inbounds i32, i32* %asr, i64 %indvars.iv 34 %iur = getelementptr inbounds i32, i32* %aur, i64 %indvars.iv 35 %lsd = load i32, i32* %isd, align 4 36 %lud = load i32, i32* %iud, align 4 37 %lsr = load i32, i32* %isr, align 4 38 %lur = load i32, i32* %iur, align 4 39 %psd = add nsw i32 %lsd, 23 40 %pud = add nsw i32 %lud, 24 41 %psr = add nsw i32 %lsr, 25 42 %pur = add nsw i32 %lur, 26 43 %isd0 = getelementptr inbounds i32, i32* %asd0, i64 %indvars.iv 44 %iud0 = getelementptr inbounds i32, i32* %aud0, i64 %indvars.iv 45 %isr0 = getelementptr inbounds i32, i32* %asr0, i64 %indvars.iv 46 %iur0 = getelementptr inbounds i32, i32* %aur0, i64 %indvars.iv 47 %lsd0 = load i32, i32* %isd0, align 4 48 %lud0 = load i32, i32* %iud0, align 4 49 %lsr0 = load i32, i32* %isr0, align 4 50 %lur0 = load i32, i32* %iur0, align 4 51 %psd0 = add nsw i32 %lsd, 27 52 %pud0 = add nsw i32 %lud, 28 53 %psr0 = add nsw i32 %lsr, 29 54 %pur0 = add nsw i32 %lur, 30 55 %cmp1 = icmp slt i32 %lsd, 100 56 br i1 %cmp1, label %if.then, label %if.end 57 58if.then: ; preds = %for.body 59 %rsd = sdiv i32 %psd, 11 60 %rud = udiv i32 %pud, 13 61 %rsr = srem i32 %psr, 17 62 %rur = urem i32 %pur, 19 63 %rsd0 = sdiv i32 %psd0, 0 64 %rud0 = udiv i32 %pud0, 0 65 %rsr0 = srem i32 %psr0, 0 66 %rur0 = urem i32 %pur0, 0 67 br label %if.end 68 69if.end: ; preds = %if.then, %for.body 70 %ysd.0 = phi i32 [ %rsd, %if.then ], [ %psd, %for.body ] 71 %yud.0 = phi i32 [ %rud, %if.then ], [ %pud, %for.body ] 72 %ysr.0 = phi i32 [ %rsr, %if.then ], [ %psr, %for.body ] 73 %yur.0 = phi i32 [ %rur, %if.then ], [ %pur, %for.body ] 74 %ysd0.0 = phi i32 [ %rsd0, %if.then ], [ %psd0, %for.body ] 75 %yud0.0 = phi i32 [ %rud0, %if.then ], [ %pud0, %for.body ] 76 %ysr0.0 = phi i32 [ %rsr0, %if.then ], [ %psr0, %for.body ] 77 %yur0.0 = phi i32 [ %rur0, %if.then ], [ %pur0, %for.body ] 78 store i32 %ysd.0, i32* %isd, align 4 79 store i32 %yud.0, i32* %iud, align 4 80 store i32 %ysr.0, i32* %isr, align 4 81 store i32 %yur.0, i32* %iur, align 4 82 store i32 %ysd0.0, i32* %isd0, align 4 83 store i32 %yud0.0, i32* %iud0, align 4 84 store i32 %ysr0.0, i32* %isr0, align 4 85 store i32 %yur0.0, i32* %iur0, align 4 86 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 87 %exitcond = icmp eq i64 %indvars.iv.next, 128 88 br i1 %exitcond, label %for.cond.cleanup, label %for.body 89} 90