1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -reassociate -dce -S | FileCheck %s 3; PR12985 4 5; Verify the nsw flags are preserved when converting shl to mul. 6 7define i32 @shl_to_mul_nsw(i32 %i) { 8; 9; CHECK-LABEL: @shl_to_mul_nsw( 10; CHECK-NEXT: entry: 11; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I:%.*]], -2147483648 12; CHECK-NEXT: [[MUL2:%.*]] = add i32 [[MUL]], 1 13; CHECK-NEXT: ret i32 [[MUL2]] 14; 15entry: 16 %mul = shl nsw i32 %i, 31 17 %mul2 = add i32 %mul, 1 18 ret i32 %mul2 19} 20 21define i32 @shl_to_mul_nsw_2(i32 %i) { 22; 23; CHECK-LABEL: @shl_to_mul_nsw_2( 24; CHECK-NEXT: entry: 25; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[I:%.*]], 1073741824 26; CHECK-NEXT: [[MUL2:%.*]] = add i32 [[MUL]], 1 27; CHECK-NEXT: ret i32 [[MUL2]] 28; 29entry: 30 %mul = shl nsw i32 %i, 30 31 %mul2 = add i32 %mul, 1 32 ret i32 %mul2 33} 34 35define i32 @shl_to_mul_nuw(i32 %i) { 36; 37; CHECK-LABEL: @shl_to_mul_nuw( 38; CHECK-NEXT: entry: 39; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[I:%.*]], 4 40; CHECK-NEXT: [[MUL2:%.*]] = add i32 [[MUL]], 1 41; CHECK-NEXT: ret i32 [[MUL2]] 42; 43entry: 44 %mul = shl nuw i32 %i, 2 45 %mul2 = add i32 %mul, 1 46 ret i32 %mul2 47} 48 49define i32 @shl_to_mul_nuw_nsw(i32 %i) { 50; 51; CHECK-LABEL: @shl_to_mul_nuw_nsw( 52; CHECK-NEXT: entry: 53; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[I:%.*]], 4 54; CHECK-NEXT: [[MUL2:%.*]] = add i32 [[MUL]], 1 55; CHECK-NEXT: ret i32 [[MUL2]] 56; 57entry: 58 %mul = shl nuw nsw i32 %i, 2 59 %mul2 = add i32 %mul, 1 60 ret i32 %mul2 61} 62 63define i32 @shl_to_mul_nuw_nsw_bitwidth_m1(i32 %i) { 64; 65; CHECK-LABEL: @shl_to_mul_nuw_nsw_bitwidth_m1( 66; CHECK-NEXT: entry: 67; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[I:%.*]], -2147483648 68; CHECK-NEXT: [[MUL2:%.*]] = add i32 [[MUL]], 1 69; CHECK-NEXT: ret i32 [[MUL2]] 70; 71entry: 72 %mul = shl nuw nsw i32 %i, 31 73 %mul2 = add i32 %mul, 1 74 ret i32 %mul2 75} 76 77define i2 @pr23926(i2 %X1, i2 %X2) { 78; 79; CHECK-LABEL: @pr23926( 80; CHECK-NEXT: [[X1_NEG:%.*]] = sub i2 0, [[X1:%.*]] 81; CHECK-NEXT: [[ADD_NEG:%.*]] = add i2 [[X1_NEG]], -1 82; CHECK-NEXT: [[SUB:%.*]] = add i2 [[ADD_NEG]], [[X2:%.*]] 83; CHECK-NEXT: ret i2 [[SUB]] 84; 85 %add = add nuw i2 %X1, 1 86 %sub = sub nuw nsw i2 %X2, %add 87 ret i2 %sub 88} 89