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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
4
5define void @test() #0 {
6; CHECK-LABEL: @test(
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    br label [[LOOP:%.*]]
9; CHECK:       loop:
10; CHECK-NEXT:    [[DUMMY_PHI:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[OP_EXTRA1:%.*]], [[LOOP]] ]
11; CHECK-NEXT:    [[TMP0:%.*]] = phi i64 [ 2, [[ENTRY]] ], [ [[TMP6:%.*]], [[LOOP]] ]
12; CHECK-NEXT:    [[DUMMY_ADD:%.*]] = add i16 0, 0
13; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i64> undef, i64 [[TMP0]], i32 0
14; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <4 x i64> [[TMP1]], i64 [[TMP0]], i32 1
15; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <4 x i64> [[TMP2]], i64 [[TMP0]], i32 2
16; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <4 x i64> [[TMP3]], i64 [[TMP0]], i32 3
17; CHECK-NEXT:    [[TMP5:%.*]] = add <4 x i64> [[TMP4]], <i64 3, i64 2, i64 1, i64 0>
18; CHECK-NEXT:    [[TMP6]] = extractelement <4 x i64> [[TMP5]], i32 3
19; CHECK-NEXT:    [[TMP7:%.*]] = extractelement <4 x i64> [[TMP5]], i32 0
20; CHECK-NEXT:    [[DUMMY_SHL:%.*]] = shl i64 [[TMP7]], 32
21; CHECK-NEXT:    [[TMP8:%.*]] = add <4 x i64> <i64 1, i64 1, i64 1, i64 1>, [[TMP5]]
22; CHECK-NEXT:    [[TMP9:%.*]] = ashr exact <4 x i64> [[TMP8]], <i64 32, i64 32, i64 32, i64 32>
23; CHECK-NEXT:    [[TMP10:%.*]] = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP9]])
24; CHECK-NEXT:    [[OP_EXTRA:%.*]] = add i64 [[TMP10]], 0
25; CHECK-NEXT:    [[OP_EXTRA1]] = add i64 [[OP_EXTRA]], [[TMP6]]
26; CHECK-NEXT:    br label [[LOOP]]
27;
28entry:
29  br label %loop
30
31loop:
32  %dummy_phi = phi i64 [ 1, %entry ], [ %last, %loop ]
33  %0 = phi i64 [ 2, %entry ], [ %fork, %loop ]
34  %inc1 = add i64 %0, 1
35  %inc2 = add i64 %0, 2
36  %inc11 = add i64 1, %inc1
37  %exact1 = ashr exact i64 %inc11, 32
38  %inc3 = add i64 %0, 3
39  %dummy_add = add i16 0, 0
40  %inc12 = add i64 1, %inc2
41  %exact2 = ashr exact i64 %inc12, 32
42  %dummy_shl = shl i64 %inc3, 32
43  %inc13 = add i64 1, %inc3
44  %exact3 = ashr exact i64 %inc13, 32
45  %fork = add i64 %0, 0
46  %sum1 = add i64 %exact3, %exact2
47  %sum2 = add i64 %sum1, %exact1
48  %zsum = add i64 %sum2, 0
49  %sext22 = add i64 1, %fork
50  %exact4 = ashr exact i64 %sext22, 32
51  %join = add i64 %fork, %zsum
52  %last = add i64 %join, %exact4
53  br label %loop
54}
55
56