1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -basic-aa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5target triple = "x86_64-apple-macosx10.8.0" 6 7define void @main() { 8; CHECK-LABEL: @main( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: br label [[FOR_BODY:%.*]] 11; CHECK: for.body: 12; CHECK-NEXT: br label [[FOR_COND4_PREHEADER:%.*]] 13; CHECK: for.cond4.preheader: 14; CHECK-NEXT: br label [[FOR_BODY6:%.*]] 15; CHECK: for.body6: 16; CHECK-NEXT: br label [[FOR_BODY12:%.*]] 17; CHECK: for.body12: 18; CHECK-NEXT: [[FZIMG_069:%.*]] = phi double [ undef, [[FOR_BODY6]] ], [ [[ADD19:%.*]], [[IF_END:%.*]] ] 19; CHECK-NEXT: [[FZREAL_068:%.*]] = phi double [ undef, [[FOR_BODY6]] ], [ [[ADD20:%.*]], [[IF_END]] ] 20; CHECK-NEXT: [[MUL13:%.*]] = fmul double [[FZREAL_068]], [[FZREAL_068]] 21; CHECK-NEXT: [[MUL14:%.*]] = fmul double [[FZIMG_069]], [[FZIMG_069]] 22; CHECK-NEXT: [[ADD15:%.*]] = fadd double [[MUL13]], [[MUL14]] 23; CHECK-NEXT: [[CMP16:%.*]] = fcmp ogt double [[ADD15]], 4.000000e+00 24; CHECK-NEXT: br i1 [[CMP16]], label [[FOR_INC21:%.*]], label [[IF_END]] 25; CHECK: if.end: 26; CHECK-NEXT: [[MUL18:%.*]] = fmul double undef, [[FZIMG_069]] 27; CHECK-NEXT: [[ADD19]] = fadd double undef, [[MUL18]] 28; CHECK-NEXT: [[SUB:%.*]] = fsub double [[MUL13]], [[MUL14]] 29; CHECK-NEXT: [[ADD20]] = fadd double undef, [[SUB]] 30; CHECK-NEXT: br i1 undef, label [[FOR_BODY12]], label [[FOR_INC21]] 31; CHECK: for.inc21: 32; CHECK-NEXT: br i1 undef, label [[FOR_END23:%.*]], label [[FOR_BODY6]] 33; CHECK: for.end23: 34; CHECK-NEXT: br i1 undef, label [[IF_THEN25:%.*]], label [[IF_THEN26:%.*]] 35; CHECK: if.then25: 36; CHECK-NEXT: br i1 undef, label [[FOR_END44:%.*]], label [[FOR_COND4_PREHEADER]] 37; CHECK: if.then26: 38; CHECK-NEXT: unreachable 39; CHECK: for.end44: 40; CHECK-NEXT: br i1 undef, label [[FOR_END48:%.*]], label [[FOR_BODY]] 41; CHECK: for.end48: 42; CHECK-NEXT: ret void 43; 44entry: 45 br label %for.body 46 47for.body: ; preds = %for.end44, %entry 48 br label %for.cond4.preheader 49 50for.cond4.preheader: ; preds = %if.then25, %for.body 51 br label %for.body6 52 53for.body6: ; preds = %for.inc21, %for.cond4.preheader 54 br label %for.body12 55 56for.body12: ; preds = %if.end, %for.body6 57 %fZImg.069 = phi double [ undef, %for.body6 ], [ %add19, %if.end ] 58 %fZReal.068 = phi double [ undef, %for.body6 ], [ %add20, %if.end ] 59 %mul13 = fmul double %fZReal.068, %fZReal.068 60 %mul14 = fmul double %fZImg.069, %fZImg.069 61 %add15 = fadd double %mul13, %mul14 62 %cmp16 = fcmp ogt double %add15, 4.000000e+00 63 br i1 %cmp16, label %for.inc21, label %if.end 64 65if.end: ; preds = %for.body12 66 %mul18 = fmul double undef, %fZImg.069 67 %add19 = fadd double undef, %mul18 68 %sub = fsub double %mul13, %mul14 69 %add20 = fadd double undef, %sub 70 br i1 undef, label %for.body12, label %for.inc21 71 72for.inc21: ; preds = %if.end, %for.body12 73 br i1 undef, label %for.end23, label %for.body6 74 75for.end23: ; preds = %for.inc21 76 br i1 undef, label %if.then25, label %if.then26 77 78if.then25: ; preds = %for.end23 79 br i1 undef, label %for.end44, label %for.cond4.preheader 80 81if.then26: ; preds = %for.end23 82 unreachable 83 84for.end44: ; preds = %if.then25 85 br i1 undef, label %for.end48, label %for.body 86 87for.end48: ; preds = %for.end44 88 ret void 89} 90 91%struct.hoge = type { double, double, double} 92 93define void @zot(%struct.hoge* %arg) { 94; CHECK-LABEL: @zot( 95; CHECK-NEXT: bb: 96; CHECK-NEXT: [[TMP:%.*]] = load double, double* undef, align 8 97; CHECK-NEXT: [[TMP2:%.*]] = load double, double* undef, align 8 98; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[TMP2]], i32 0 99; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[TMP]], i32 1 100; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> [[TMP1]], undef 101; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_HOGE:%.*]], %struct.hoge* [[ARG:%.*]], i64 0, i32 1 102; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP2]], undef 103; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP3]], undef 104; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TMP7]] to <2 x double>* 105; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP5]], align 8 106; CHECK-NEXT: br i1 undef, label [[BB11:%.*]], label [[BB12:%.*]] 107; CHECK: bb11: 108; CHECK-NEXT: br label [[BB14:%.*]] 109; CHECK: bb12: 110; CHECK-NEXT: br label [[BB14]] 111; CHECK: bb14: 112; CHECK-NEXT: ret void 113; 114bb: 115 %tmp = load double, double* undef, align 8 116 %tmp1 = fsub double %tmp, undef 117 %tmp2 = load double, double* undef, align 8 118 %tmp3 = fsub double %tmp2, undef 119 %tmp4 = fmul double %tmp3, undef 120 %tmp5 = fmul double %tmp3, undef 121 %tmp6 = fsub double %tmp5, undef 122 %tmp7 = getelementptr inbounds %struct.hoge, %struct.hoge* %arg, i64 0, i32 1 123 store double %tmp6, double* %tmp7, align 8 124 %tmp8 = fmul double %tmp1, undef 125 %tmp9 = fsub double %tmp8, undef 126 %tmp10 = getelementptr inbounds %struct.hoge, %struct.hoge* %arg, i64 0, i32 2 127 store double %tmp9, double* %tmp10, align 8 128 br i1 undef, label %bb11, label %bb12 129 130bb11: ; preds = %bb 131 br label %bb14 132 133bb12: ; preds = %bb 134 %tmp13 = fmul double undef, %tmp2 135 br label %bb14 136 137bb14: ; preds = %bb12, %bb11 138 ret void 139} 140 141 142%struct.rc4_state.0.24 = type { i32, i32, [256 x i32] } 143 144define void @rc4_crypt(%struct.rc4_state.0.24* nocapture %s) { 145; CHECK-LABEL: @rc4_crypt( 146; CHECK-NEXT: entry: 147; CHECK-NEXT: [[X1:%.*]] = getelementptr inbounds [[STRUCT_RC4_STATE_0_24:%.*]], %struct.rc4_state.0.24* [[S:%.*]], i64 0, i32 0 148; CHECK-NEXT: [[Y2:%.*]] = getelementptr inbounds [[STRUCT_RC4_STATE_0_24]], %struct.rc4_state.0.24* [[S]], i64 0, i32 1 149; CHECK-NEXT: br i1 undef, label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 150; CHECK: for.body: 151; CHECK-NEXT: [[CONV4:%.*]] = and i32 undef, 255 152; CHECK-NEXT: [[CONV7:%.*]] = and i32 undef, 255 153; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]] 154; CHECK: for.end: 155; CHECK-NEXT: [[X_0_LCSSA:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[CONV4]], [[FOR_BODY]] ] 156; CHECK-NEXT: [[Y_0_LCSSA:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[CONV7]], [[FOR_BODY]] ] 157; CHECK-NEXT: store i32 [[X_0_LCSSA]], i32* [[X1]], align 4 158; CHECK-NEXT: store i32 [[Y_0_LCSSA]], i32* [[Y2]], align 4 159; CHECK-NEXT: ret void 160; 161entry: 162 %x1 = getelementptr inbounds %struct.rc4_state.0.24, %struct.rc4_state.0.24* %s, i64 0, i32 0 163 %y2 = getelementptr inbounds %struct.rc4_state.0.24, %struct.rc4_state.0.24* %s, i64 0, i32 1 164 br i1 undef, label %for.body, label %for.end 165 166for.body: ; preds = %for.body, %entry 167 %x.045 = phi i32 [ %conv4, %for.body ], [ undef, %entry ] 168 %conv4 = and i32 undef, 255 169 %conv7 = and i32 undef, 255 170 %idxprom842 = zext i32 %conv7 to i64 171 br i1 undef, label %for.end, label %for.body 172 173for.end: ; preds = %for.body, %entry 174 %x.0.lcssa = phi i32 [ undef, %entry ], [ %conv4, %for.body ] 175 %y.0.lcssa = phi i32 [ undef, %entry ], [ %conv7, %for.body ] 176 store i32 %x.0.lcssa, i32* %x1, align 4 177 store i32 %y.0.lcssa, i32* %y2, align 4 178 ret void 179} 180 181