1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3 3# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4 4# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM5 5 6 sub w0, w1, w2, sxtb #0 7 add x3, x4, w5, sxth #1 8 subs x6, x7, w8, uxtw #2 9 adds x9, x10, x11, uxtx #3 10 sub w12, w13, w14, uxtb #0 11 add x15, x16, w17, uxth #1 12 subs x18, x19, w20, sxtw #2 13 adds x21, x22, x23, sxtx #3 14 15# ALL: Iterations: 100 16# ALL-NEXT: Instructions: 800 17 18# EM3-NEXT: Total Cycles: 304 19# EM4-NEXT: Total Cycles: 304 20# EM5-NEXT: Total Cycles: 254 21 22# ALL-NEXT: Total uOps: 800 23 24# EM3: Dispatch Width: 6 25# EM3-NEXT: uOps Per Cycle: 2.63 26# EM3-NEXT: IPC: 2.63 27# EM3-NEXT: Block RThroughput: 3.0 28 29# EM4: Dispatch Width: 6 30# EM4-NEXT: uOps Per Cycle: 2.63 31# EM4-NEXT: IPC: 2.63 32# EM4-NEXT: Block RThroughput: 3.0 33 34# EM5: Dispatch Width: 6 35# EM5-NEXT: uOps Per Cycle: 3.15 36# EM5-NEXT: IPC: 3.15 37# EM5-NEXT: Block RThroughput: 2.5 38 39# ALL: Instruction Info: 40# ALL-NEXT: [1]: #uOps 41# ALL-NEXT: [2]: Latency 42# ALL-NEXT: [3]: RThroughput 43# ALL-NEXT: [4]: MayLoad 44# ALL-NEXT: [5]: MayStore 45# ALL-NEXT: [6]: HasSideEffects (U) 46 47# ALL: [1] [2] [3] [4] [5] [6] Instructions: 48 49# EM3-NEXT: 1 1 0.25 sub w0, w1, w2, sxtb 50# EM3-NEXT: 1 2 0.50 add x3, x4, w5, sxth #1 51# EM3-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #2 52# EM3-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #3 53# EM3-NEXT: 1 1 0.25 sub w12, w13, w14, uxtb 54# EM3-NEXT: 1 2 0.50 add x15, x16, w17, uxth #1 55# EM3-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #2 56# EM3-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #3 57 58# EM4-NEXT: 1 1 0.25 sub w0, w1, w2, sxtb 59# EM4-NEXT: 1 2 0.50 add x3, x4, w5, sxth #1 60# EM4-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #2 61# EM4-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #3 62# EM4-NEXT: 1 1 0.25 sub w12, w13, w14, uxtb 63# EM4-NEXT: 1 2 0.50 add x15, x16, w17, uxth #1 64# EM4-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #2 65# EM4-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #3 66 67# EM5-NEXT: 1 1 0.17 sub w0, w1, w2, sxtb 68# EM5-NEXT: 1 2 0.50 add x3, x4, w5, sxth #1 69# EM5-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #2 70# EM5-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #3 71# EM5-NEXT: 1 1 0.17 sub w12, w13, w14, uxtb 72# EM5-NEXT: 1 2 0.50 add x15, x16, w17, uxth #1 73# EM5-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #2 74# EM5-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #3 75